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[209.85.221.47]) by smtp.gmail.com with ESMTPSA id gi20-20020a1709070c9400b0077d6f628e14sm2391078ejc.83.2022.12.01.16.50.02 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 01 Dec 2022 16:50:02 -0800 (PST) Received: by mail-wr1-f47.google.com with SMTP id h12so5513842wrv.10 for ; Thu, 01 Dec 2022 16:50:02 -0800 (PST) X-Received: by 2002:adf:fb4c:0:b0:236:5270:735e with SMTP id c12-20020adffb4c000000b002365270735emr31203152wrs.659.1669942201820; Thu, 01 Dec 2022 16:50:01 -0800 (PST) MIME-Version: 1.0 References: <20221118164201.321147-1-krzysztof.kozlowski@linaro.org> In-Reply-To: <20221118164201.321147-1-krzysztof.kozlowski@linaro.org> From: Doug Anderson Date: Thu, 1 Dec 2022 16:49:49 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFT PATCH v2 1/2] arm64: dts: qcom: sdm845-db845c: drop unneeded qup_spi0_default To: Krzysztof Kozlowski , Vinod Koul , Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On Fri, Nov 18, 2022 at 8:42 AM Krzysztof Kozlowski wrote: > > The qup_spi0_default pin override is exactly the same as one already in > sdm845.dtsi. > > Signed-off-by: Krzysztof Kozlowski > > --- > > Cc: Doug Anderson > > Changes since v1: > 1. New patch. > --- > arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 8 -------- > 1 file changed, 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts > index 02dcf75c0745..56a7afb697ed 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts > +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts > @@ -1274,11 +1274,3 @@ ov7251_ep: endpoint { > }; > }; > }; > - > -/* PINCTRL - additions to nodes defined in sdm845.dtsi */ > -&qup_spi0_default { > - config { > - drive-strength = <6>; > - bias-disable; > - }; > -}; I guess it's more of a question for what Bjorn thinks, but I view the fact that the drive-strength / bias are in the dtsi file to begin with as more as a bug in commit 8f6e20adaaf3 ("arm64: dts: qcom: sdm845: enable dma for spi"), which is where these properties were introduced to sdm845.dtsi. The historical guidance from Bjorn was that things like "drive-strength" and "bias" didn't belong in the SoC dtsi file. Later we came to an agreement that it could be OK to put drive-strength in the SoC dtsi file but that bias was still problematic because it meant ugly "/delete-property/" stuff in the board dtsi files [1]. [1] https://lore.kernel.org/r/YnSQvyAN3v69an8k@ripper