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[209.85.221.174]) by smtp.gmail.com with ESMTPSA id u66sm963168vke.8.2020.12.17.13.21.26 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Dec 2020 13:21:26 -0800 (PST) Received: by mail-vk1-f174.google.com with SMTP id w66so32360vka.3 for ; Thu, 17 Dec 2020 13:21:26 -0800 (PST) X-Received: by 2002:a1f:3fc9:: with SMTP id m192mr1317831vka.17.1608240085900; Thu, 17 Dec 2020 13:21:25 -0800 (PST) MIME-Version: 1.0 References: <20201216144114.v2.1.I99ee04f0cb823415df59bd4f550d6ff5756e43d6@changeid> <20201216144114.v2.3.I07afdedcc49655c5d26880f8df9170aac5792378@changeid> <160817911850.1580929.16402785505110078436@swboyd.mtv.corp.google.com> In-Reply-To: <160817911850.1580929.16402785505110078436@swboyd.mtv.corp.google.com> From: Doug Anderson Date: Thu, 17 Dec 2020 13:21:14 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/4] spi: spi-geni-qcom: Don't try to set CS if an xfer is pending To: Stephen Boyd Cc: Mark Brown , msavaliy@qti.qualcomm.com, Akash Asthana , Roja Rani Yarubandi , Andy Gross , Bjorn Andersson , linux-arm-msm , LKML , linux-spi Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On Wed, Dec 16, 2020 at 8:25 PM Stephen Boyd wrote: > > Quoting Douglas Anderson (2020-12-16 14:41:51) > > If we get a timeout sending then this happens: > > * spi_transfer_wait() will get a timeout. > > * We'll set the chip select > > * We'll call handle_err() => handle_fifo_timeout(). > > > > Unfortunately that won't work so well on geni. If we got a timeout > > transferring then it's likely that our interrupt handler is blocked, > > but we need that same interrupt handler to adjust the chip select. > > Trying to set the chip select doesn't crash us but ends up confusing > > our state machine and leads to messages like: > > Premature done. rx_rem = 32 bpw8 > > > > Let's just drop the chip select request in this case. Sure, we might > > leave the chip select in the wrong state but it's likely it was going > > to fail anyway and this avoids getting the driver even more confused > > about what it's doing. > > > > The SPI core in general assumes that setting chip select is a simple > > operation that doesn't fail. Yet another reason to just reconfigure > > the chip select line as GPIOs. > > Indeed. > > > > > Signed-off-by: Douglas Anderson > > --- > > > > Changes in v2: > > - ("spi: spi-geni-qcom: Don't try to set CS if an xfer is pending") new for v2. > > > > drivers/spi/spi-geni-qcom.c | 9 +++++++-- > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c > > index d988463e606f..0e4fa52ac017 100644 > > --- a/drivers/spi/spi-geni-qcom.c > > +++ b/drivers/spi/spi-geni-qcom.c > > @@ -204,9 +204,14 @@ static void spi_geni_set_cs(struct spi_device *slv, bool set_flag) > > goto exit; > > } > > > > - mas->cs_flag = set_flag; > > - > > spin_lock_irq(&mas->lock); > > + if (mas->cur_xfer) { > > How is it possible that cs change happens when cur_xfer is non-NULL? I'll add this to the commit message: spi_transfer_one_message() ->transfer_one() AKA spi_geni_transfer_one() setup_fifo_xfer() mas->cur_xfer = non-NULL spi_transfer_wait() => TIMES OUT msg->status != -EINPROGRESS => goto out if (ret != 0 ...) spi_set_cs() ->set_cs AKA spi_geni_set_cs() # mas->cur_xfer is non-NULL Specifically the place where cur_xfer is usually made NULL is in the interrupt handler. If that doesn't run then it will be non-NULL. > > + dev_err(mas->dev, "Can't set CS when prev xfter running\n"); > > xfer? or xfter? Will fix. -Doug