From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932935AbaIEPUd (ORCPT ); Fri, 5 Sep 2014 11:20:33 -0400 Received: from mail-vc0-f179.google.com ([209.85.220.179]:57093 "EHLO mail-vc0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756447AbaIEPUY (ORCPT ); Fri, 5 Sep 2014 11:20:24 -0400 MIME-Version: 1.0 In-Reply-To: <54098DA6.4090704@rock-chips.com> References: <1409884333-3544-1-git-send-email-addy.ke@rock-chips.com> <54098DA6.4090704@rock-chips.com> Date: Fri, 5 Sep 2014 08:20:23 -0700 X-Google-Sender-Auth: qJzr8OnZZwU40ubHdUixzpKHwzg Message-ID: Subject: Re: [PATCH] i2c: rk3x: fix divisor calculation for SCL frequency From: Doug Anderson To: addy ke Cc: Wolfram Sang , max.schwarz@online.de, =?UTF-8?Q?Heiko_St=C3=BCbner?= , Olof Johansson , "linux-i2c@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , linux-rockchip@lists.infradead.org, Eddie Cai , Jianqun Xu , Tao Huang , Chris , =?UTF-8?B?5aea5pm65oOF?= , han jiang , Kever Yang , Lin Huang , =?UTF-8?B?5pmT6IW+546L?= , Shunqian Zheng Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Addy, On Fri, Sep 5, 2014 at 3:17 AM, addy ke wrote: > The following modifications is reasonable? > > static void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate) > { > unsigned long i2c_rate = clk_get_rate(i2c->clk); > unsigned int div; > > /* set DIV = DIVH = DIVL > * SCL rate = (clk rate) / (8 * (DIVH + 1 + DIVL + 1)) > * = (clk rate) / (16 * (DIV + 1)) > */ > div = DIV_ROUND_UP(i2c_rate, scl_rate * 16) - 1; > > i2c_writel(i2c, (div << 16) | (div & 0xffff), REG_CLKDIV); > } Yes, that looks much cleaner and is a nice solution, thanks! Can you send up a new patch version? -Doug From mboxrd@z Thu Jan 1 00:00:00 1970 From: dianders@chromium.org (Doug Anderson) Date: Fri, 5 Sep 2014 08:20:23 -0700 Subject: [PATCH] i2c: rk3x: fix divisor calculation for SCL frequency In-Reply-To: <54098DA6.4090704@rock-chips.com> References: <1409884333-3544-1-git-send-email-addy.ke@rock-chips.com> <54098DA6.4090704@rock-chips.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Addy, On Fri, Sep 5, 2014 at 3:17 AM, addy ke wrote: > The following modifications is reasonable? > > static void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate) > { > unsigned long i2c_rate = clk_get_rate(i2c->clk); > unsigned int div; > > /* set DIV = DIVH = DIVL > * SCL rate = (clk rate) / (8 * (DIVH + 1 + DIVL + 1)) > * = (clk rate) / (16 * (DIV + 1)) > */ > div = DIV_ROUND_UP(i2c_rate, scl_rate * 16) - 1; > > i2c_writel(i2c, (div << 16) | (div & 0xffff), REG_CLKDIV); > } Yes, that looks much cleaner and is a nice solution, thanks! Can you send up a new patch version? -Doug