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[209.85.221.44]) by smtp.gmail.com with ESMTPSA id q28-20020a056402249c00b0043cab10f702sm2051392eda.90.2022.07.27.14.58.39 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Jul 2022 14:58:42 -0700 (PDT) Received: by mail-wr1-f44.google.com with SMTP id u5so26215761wrm.4 for ; Wed, 27 Jul 2022 14:58:39 -0700 (PDT) X-Received: by 2002:adf:ead2:0:b0:21d:8b49:6138 with SMTP id o18-20020adfead2000000b0021d8b496138mr16061950wrn.138.1658959119013; Wed, 27 Jul 2022 14:58:39 -0700 (PDT) MIME-Version: 1.0 References: <20220726212354.1.I5b9006878bdabd6493b866b46dbd6149968d545b@changeid> <20220727160320.GA2755147-robh@kernel.org> In-Reply-To: From: Doug Anderson Date: Wed, 27 Jul 2022 14:58:25 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/2] dt-bindings: arm: qcom: document zoglin board To: Rob Herring Cc: Bob Moragues , LKML , Bob Moragues , Andy Gross , Bjorn Andersson , Stephen Boyd , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On Wed, Jul 27, 2022 at 12:43 PM Rob Herring wrote: > > On Wed, Jul 27, 2022 at 11:40 AM Doug Anderson wrote: > > > > Hi, > > > > On Wed, Jul 27, 2022 at 9:03 AM Rob Herring wrote: > > > > > > On Tue, Jul 26, 2022 at 09:24:31PM -0700, Bob Moragues wrote: > > > > Zoglin is a Hoglin Chromebook with SPI Flash reduced from 64MB to 8MB. > > > > Zoglin is identical to Hoglin except for the SPI Flash. > > > > The actual SPI Flash is dynamically probed at and not specified in DTS. > > > > > > > > Signed-off-by: Bob Moragues > > > > > > > > Signed-off-by: Bob Moragues > > > > --- > > > > > > > > Documentation/devicetree/bindings/arm/qcom.yaml | 1 + > > > > 1 file changed, 1 insertion(+) > > > > > > > > diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml > > > > index 581485392404..63091df3cbb3 100644 > > > > --- a/Documentation/devicetree/bindings/arm/qcom.yaml > > > > +++ b/Documentation/devicetree/bindings/arm/qcom.yaml > > > > @@ -475,6 +475,7 @@ properties: > > > > > > > > - description: Qualcomm Technologies, Inc. sc7280 CRD platform (newest rev) > > > > items: > > > > + - const: google,zoglin > > > > - const: google,hoglin > > > > - const: qcom,sc7280 > > > > > > Is just "google,hoglin", "qcom,sc7280" no longer valid? If it is valid, > > > you need another entry. > > > > If it makes people happy to have another entry then it wouldn't hurt, > > but it has no long term benefit and I would recommend against it. The > > next patch in this series changes the existing "hoglin" device tree to > > have all 3 compatible strings and thus when both patches land then > > make dtbs_check will pass. I assume that is the only goal of > > documenting these boards here. Certainly if you had a device tree that > > had only "google,zoglin" it would boot fine on zoglin devices and if > > you had a device tree that had only "google,hoglin" it would boot fine > > on hoglin device. This is true of all of the entries for Chromebooks > > that have multiple compatible entries. > > Why even add the entry? If it is just a different SPI flash, you can > tell that from the SPI flash compatible or device ID. Yeah, it's really unfortunate. :( The issue is a limitation in the ChromeOS bootloader infrastructure. The ChromeOS build infrastructure cannot handle something that it considers the same "board" as having different SPI flash sizes. This is because the infrastructure always requires that the bootloader "image" be the exact same size as the SPI flash and it assumes a universal firmware (single image) per board. It's unfortunately not very flexible but normally for a given board the SPI flash size is chosen at the start and never changed. The CRD board was an exception here. Though it's not beautiful, this means that the firmware considers this as a different board and looks for a different compatible string on the kernel command line. -Doug