From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E88DC433E1 for ; Wed, 19 Aug 2020 18:21:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2B09D214F1 for ; Wed, 19 Aug 2020 18:21:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="MJ511LjL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726685AbgHSSVD (ORCPT ); Wed, 19 Aug 2020 14:21:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726735AbgHSSVC (ORCPT ); Wed, 19 Aug 2020 14:21:02 -0400 Received: from mail-vs1-xe43.google.com (mail-vs1-xe43.google.com [IPv6:2607:f8b0:4864:20::e43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08343C061757 for ; Wed, 19 Aug 2020 11:21:00 -0700 (PDT) Received: by mail-vs1-xe43.google.com with SMTP id j188so12462245vsd.2 for ; Wed, 19 Aug 2020 11:20:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=AacBmJ1F+/EQU2Ta6hd78j336wiWeooUogfDqt5vhVU=; b=MJ511LjL0Gf8T+5otwSMIHAYNGoOTa7oOz3vFzBU6AZJ6dAX+nI9cC7118htwG/ORX eBs8xHYraAXfTg3+3J/RFpfkMga9Cj17oTb4p/TBhXJhoh4jgceQywdVOQqMSK/JOJ3l PwBzJDQ8H04HrV4VQtbb6ovc5H+eRX5T4ho3g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=AacBmJ1F+/EQU2Ta6hd78j336wiWeooUogfDqt5vhVU=; b=Jp0SgAaoILceeWJlLmOuaHfJ0PSukmZ8bx1nxBe5XoY0ky3H42kznyESGv+QXoHKxe 0KW4D9qODVPHH+o5p3WBvmVsyNG0VDpTSrqUGUK/ZHtlzjQhBTxx7QYGR4LZZSWNxyDH gieWqRJ8z6QpEc7PDPPNpZvhpZJy+YUTgiKFmW2rv0UbyLAlQ2zB3YiYiots1SJTdaGj JJrFzfEEyFgwzv2CNbY7TazGChBD8zPNJ7kDD3rkPSkM8mosz/AnLh4k+YGLxNc6jiDV MHZkVb52JCAIJCUdEIB7+jNJ4IFe+NXksOl5auYp4ctPvoZv6PPdHd7HYiJcWMSXyQlN re2w== X-Gm-Message-State: AOAM5324fxy1hHQBMRSQmnRsZGXy6Ei2o82OawZOC3EbmAc1MayCv4bf KbIbvyXqOH/7vrF3Uu5y12J8+I2WwZsWXg== X-Google-Smtp-Source: ABdhPJwe0kDAp4qeOBybvSMup0sGG1pvP7CEaukng5LLQuRdKzXfPrDZiqY1GxT5aEQMcYIdXdZ2CQ== X-Received: by 2002:a67:3285:: with SMTP id y127mr17258481vsy.221.1597861258811; Wed, 19 Aug 2020 11:20:58 -0700 (PDT) Received: from mail-vk1-f174.google.com (mail-vk1-f174.google.com. [209.85.221.174]) by smtp.gmail.com with ESMTPSA id u3sm5023378vkb.0.2020.08.19.11.20.57 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Aug 2020 11:20:57 -0700 (PDT) Received: by mail-vk1-f174.google.com with SMTP id l184so5337101vki.10 for ; Wed, 19 Aug 2020 11:20:57 -0700 (PDT) X-Received: by 2002:a1f:2fc1:: with SMTP id v184mr15612583vkv.42.1597861257099; Wed, 19 Aug 2020 11:20:57 -0700 (PDT) MIME-Version: 1.0 References: <20200817220238.603465-1-robdclark@gmail.com> <20200817220238.603465-11-robdclark@gmail.com> In-Reply-To: From: Doug Anderson Date: Wed, 19 Aug 2020 11:20:44 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 10/20] dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU To: Rob Clark Cc: dri-devel , "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , linux-arm-msm , Sai Prakash Ranjan , Will Deacon , freedreno , Bjorn Andersson , Sibi Sankar , Vivek Gautam , Stephen Boyd , Robin Murphy , Joerg Roedel , Jordan Crouse , Rob Herring , Rob Clark , Rob Herring , "moderated list:ARM SMMU DRIVERS" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list Content-Type: text/plain; charset="UTF-8" Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On Wed, Aug 19, 2020 at 10:36 AM Rob Clark wrote: > > On Wed, Aug 19, 2020 at 10:03 AM Doug Anderson wrote: > > > > Hi, > > > > On Mon, Aug 17, 2020 at 3:03 PM Rob Clark wrote: > > > > > > From: Jordan Crouse > > > > > > Every Qcom Adreno GPU has an embedded SMMU for its own use. These > > > devices depend on unique features such as split pagetables, > > > different stall/halt requirements and other settings. Identify them > > > with a compatible string so that they can be identified in the > > > arm-smmu implementation specific code. > > > > > > Signed-off-by: Jordan Crouse > > > Reviewed-by: Rob Herring > > > Signed-off-by: Rob Clark > > > --- > > > Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 ++++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > index 503160a7b9a0..5ec5d0d691f6 100644 > > > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > @@ -40,6 +40,10 @@ properties: > > > - qcom,sm8150-smmu-500 > > > - qcom,sm8250-smmu-500 > > > - const: arm,mmu-500 > > > + - description: Qcom Adreno GPUs implementing "arm,smmu-v2" > > > + items: > > > + - const: qcom,adreno-smmu > > > + - const: qcom,smmu-v2 > > > > I know I'm kinda late to the game, but this seems weird to me, > > especially given the later patches in the series like: > > > > https://lore.kernel.org/r/20200817220238.603465-19-robdclark@gmail.com > > > > Specifically in that patch you can see that this IOMMU already had a > > compatible string and we're changing it and throwing away the > > model-specific string? I'm guessing that you're just trying to make > > it easier for code to identify the adreno iommu, but it seems like a > > better way would have been to just add the adreno compatible in the > > middle, like: > > > > - description: Qcom Adreno GPUs implementing "arm,smmu-v2" > > items: > > - enum: > > - qcom,msm8996-smmu-v2 > > - qcom,msm8998-smmu-v2 > > - qcom,sc7180-smmu-v2 > > - qcom,sdm845-smmu-v2 > > - const: qcom,adreno-smmu > > - const: qcom,smmu-v2 > > > > Then we still have the SoC-specific compatible string in case we need > > it but we also have the generic one? It also means that we're not > > deleting the old compatible string... > > I did bring up the thing about removing the compat string in an > earlier revision of the series.. but then we realized that > qcom,sc7180-smmu-v2 was never actually used anywhere. Right, so at least there's not going to be weird issues where landing the dts before the code change will break anything. > But I guess we could: compatible = "qcom,sc7180-smmu-v2", > "qcom,adreno-smmu", "qcom,smmu-v2"; Yeah, that was what I was suggesting. -Doug From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A78BC433DF for ; Wed, 19 Aug 2020 18:21:05 +0000 (UTC) Received: from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1E01520786 for ; Wed, 19 Aug 2020 18:21:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="MJ511LjL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1E01520786 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by silver.osuosl.org (Postfix) with ESMTP id BC63120476; Wed, 19 Aug 2020 18:21:04 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from silver.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ohn4C7-RVkeM; Wed, 19 Aug 2020 18:21:03 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by silver.osuosl.org (Postfix) with ESMTP id 120671FEDF; Wed, 19 Aug 2020 18:21:03 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id E5F48C07FF; Wed, 19 Aug 2020 18:21:02 +0000 (UTC) Received: from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136]) by lists.linuxfoundation.org (Postfix) with ESMTP id AE09EC0051 for ; Wed, 19 Aug 2020 18:21:01 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by silver.osuosl.org (Postfix) with ESMTP id 86FEA20419 for ; Wed, 19 Aug 2020 18:21:01 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from silver.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5SQHSQfUG41e for ; Wed, 19 Aug 2020 18:21:00 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from mail-vs1-f65.google.com (mail-vs1-f65.google.com [209.85.217.65]) by silver.osuosl.org (Postfix) with ESMTPS id C43551FEDF for ; Wed, 19 Aug 2020 18:20:59 +0000 (UTC) Received: by mail-vs1-f65.google.com with SMTP id y8so12445277vsq.8 for ; Wed, 19 Aug 2020 11:20:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=AacBmJ1F+/EQU2Ta6hd78j336wiWeooUogfDqt5vhVU=; b=MJ511LjL0Gf8T+5otwSMIHAYNGoOTa7oOz3vFzBU6AZJ6dAX+nI9cC7118htwG/ORX eBs8xHYraAXfTg3+3J/RFpfkMga9Cj17oTb4p/TBhXJhoh4jgceQywdVOQqMSK/JOJ3l PwBzJDQ8H04HrV4VQtbb6ovc5H+eRX5T4ho3g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=AacBmJ1F+/EQU2Ta6hd78j336wiWeooUogfDqt5vhVU=; b=dB/eXVTNHWiieh0zyVBe6EaewW9gdnWDn9uNC2rTEWgE+qLRwlAg9gMVN49XVOsClP 0R1VOXEkxIg1CEp6UIe/oQhr2aLh+38/y/Sks/RYE4cCRrCeAyGpop1sNAhDvatVU31I L0UT74SQYUcDlDh6fQh6Aj1Iuba2vy/wM7Iu3e3j62yTGFDKr64bVsnDWrvhBpdiubJp /RPdJp1Zdkewt7RFEYeJ+NKmaQ5ldMHh3NgKY6gIlQkiTNPDKfHJsTQlwfCOvMr4nZ0c gTJ2WjgyZIK4B5+hofJkAgiGovF7V90RsuvY+/JLC2/80RwUgtlSLpQ/D5BarbuJglBS 1Mvw== X-Gm-Message-State: AOAM531DD05lLfPZ/kF/oeMLuSxtix3ohf7cNClGic57c7sxyfzjD/D/ dANd48OYA6F5sd9Opk5xytOhxJy6L2sKnA== X-Google-Smtp-Source: ABdhPJyKqAKu1tZOaGeiT1YdwWgS9ulJFBceI86G5Yt+aDgdlzyf/rBLyJBiTL8ZHFfddhpgu9wwEw== X-Received: by 2002:a67:fb4e:: with SMTP id e14mr5316159vsr.98.1597861258522; Wed, 19 Aug 2020 11:20:58 -0700 (PDT) Received: from mail-vk1-f178.google.com (mail-vk1-f178.google.com. [209.85.221.178]) by smtp.gmail.com with ESMTPSA id a26sm844691uaq.19.2020.08.19.11.20.57 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Aug 2020 11:20:57 -0700 (PDT) Received: by mail-vk1-f178.google.com with SMTP id x187so5338811vkc.1 for ; Wed, 19 Aug 2020 11:20:57 -0700 (PDT) X-Received: by 2002:a1f:2fc1:: with SMTP id v184mr15612583vkv.42.1597861257099; Wed, 19 Aug 2020 11:20:57 -0700 (PDT) MIME-Version: 1.0 References: <20200817220238.603465-1-robdclark@gmail.com> <20200817220238.603465-11-robdclark@gmail.com> In-Reply-To: From: Doug Anderson Date: Wed, 19 Aug 2020 11:20:44 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 10/20] dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU To: Rob Clark Cc: Rob Clark , Rob Herring , open list , Will Deacon , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm , Robin Murphy , dri-devel , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , Rob Herring , Sibi Sankar , Vivek Gautam , Stephen Boyd , freedreno , "moderated list:ARM SMMU DRIVERS" X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hi, On Wed, Aug 19, 2020 at 10:36 AM Rob Clark wrote: > > On Wed, Aug 19, 2020 at 10:03 AM Doug Anderson wrote: > > > > Hi, > > > > On Mon, Aug 17, 2020 at 3:03 PM Rob Clark wrote: > > > > > > From: Jordan Crouse > > > > > > Every Qcom Adreno GPU has an embedded SMMU for its own use. These > > > devices depend on unique features such as split pagetables, > > > different stall/halt requirements and other settings. Identify them > > > with a compatible string so that they can be identified in the > > > arm-smmu implementation specific code. > > > > > > Signed-off-by: Jordan Crouse > > > Reviewed-by: Rob Herring > > > Signed-off-by: Rob Clark > > > --- > > > Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 ++++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > index 503160a7b9a0..5ec5d0d691f6 100644 > > > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > @@ -40,6 +40,10 @@ properties: > > > - qcom,sm8150-smmu-500 > > > - qcom,sm8250-smmu-500 > > > - const: arm,mmu-500 > > > + - description: Qcom Adreno GPUs implementing "arm,smmu-v2" > > > + items: > > > + - const: qcom,adreno-smmu > > > + - const: qcom,smmu-v2 > > > > I know I'm kinda late to the game, but this seems weird to me, > > especially given the later patches in the series like: > > > > https://lore.kernel.org/r/20200817220238.603465-19-robdclark@gmail.com > > > > Specifically in that patch you can see that this IOMMU already had a > > compatible string and we're changing it and throwing away the > > model-specific string? I'm guessing that you're just trying to make > > it easier for code to identify the adreno iommu, but it seems like a > > better way would have been to just add the adreno compatible in the > > middle, like: > > > > - description: Qcom Adreno GPUs implementing "arm,smmu-v2" > > items: > > - enum: > > - qcom,msm8996-smmu-v2 > > - qcom,msm8998-smmu-v2 > > - qcom,sc7180-smmu-v2 > > - qcom,sdm845-smmu-v2 > > - const: qcom,adreno-smmu > > - const: qcom,smmu-v2 > > > > Then we still have the SoC-specific compatible string in case we need > > it but we also have the generic one? It also means that we're not > > deleting the old compatible string... > > I did bring up the thing about removing the compat string in an > earlier revision of the series.. but then we realized that > qcom,sc7180-smmu-v2 was never actually used anywhere. Right, so at least there's not going to be weird issues where landing the dts before the code change will break anything. > But I guess we could: compatible = "qcom,sc7180-smmu-v2", > "qcom,adreno-smmu", "qcom,smmu-v2"; Yeah, that was what I was suggesting. -Doug _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C8DCC433DF for ; Wed, 19 Aug 2020 18:22:28 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4BBDE20758 for ; Wed, 19 Aug 2020 18:22:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="T1tdMgZd"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="MJ511LjL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4BBDE20758 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From:In-Reply-To: References:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=k3yQuwquGKVXFXHyP0/i+8RxWu1LktsKphCmtaHvTDE=; b=T1tdMgZdll3+9F9saBgSPa/L9 gqwc5UXHY+JsUi1KN7v+JOnnBURkDMA4LLUjdNlZyA1CcOtIDF1bVy8m1whTb6n5yVxZSjo8qqL88 j8LDYXDAee7aD+ZDRREnDH/4eW1QDNgd1QIckJtF3WvD9Mor/ZL0CIecUKx6Xl4oGpbA9vCcd3TGW RQw3UmYoilCH63gHM2PpihjUQ73YncS9SguZT3wqCMNnM71Edbf/53kyKrFl8teJquEaWZcxPnO6T rXv5w9wCL0igSZIXtZbVEsYibNDdx2ww0BYPBxcbQZQ/leKnPzdwbC321JisBtWLvy33LRYdTNPsL 1I3x8JMOA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k8Shs-0002DM-CL; Wed, 19 Aug 2020 18:21:04 +0000 Received: from mail-vs1-xe43.google.com ([2607:f8b0:4864:20::e43]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k8Shp-0002Be-Hh for linux-arm-kernel@lists.infradead.org; Wed, 19 Aug 2020 18:21:02 +0000 Received: by mail-vs1-xe43.google.com with SMTP id b26so12429586vsa.13 for ; Wed, 19 Aug 2020 11:21:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=AacBmJ1F+/EQU2Ta6hd78j336wiWeooUogfDqt5vhVU=; b=MJ511LjL0Gf8T+5otwSMIHAYNGoOTa7oOz3vFzBU6AZJ6dAX+nI9cC7118htwG/ORX eBs8xHYraAXfTg3+3J/RFpfkMga9Cj17oTb4p/TBhXJhoh4jgceQywdVOQqMSK/JOJ3l PwBzJDQ8H04HrV4VQtbb6ovc5H+eRX5T4ho3g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=AacBmJ1F+/EQU2Ta6hd78j336wiWeooUogfDqt5vhVU=; b=oi+2+r2VqPAcQyFBeIjY7iv2EK5Px3imoalzw6GRfpcPpG1Tm51s0sCF5DzQAGa4qz Mu1zLC8e4cuKF2v00szRdW/UTGengb5iH58oyB8l0ycSQ3eEwF+oP745xqgW7njGVEdH y0LCnEGmCJhmvVxUYd35K2shtJWCY1qzckVB1b3VbBfFsJl+Jhn3j6xjKZwR1lwazXFM M/JUzbC29YsImHolWeDKdhl/Avx1k8o80m8wGfg91sPghTJawITimBY1vhr1VIUmEl2I ZKGw96vFoPr8E4fvEQIr862MiJZSNXL0Myt+NbyURGryDIXqZC5aOTPfzxgiUPfOLPr5 k5kA== X-Gm-Message-State: AOAM530mlctAnWkEd0/cyl01KbD59HhQoA3azmKjvseGCu7+yFHIJe9h rcXOOV8WwIYQj4u7tn7Vc/TtJ2QVR4siHg== X-Google-Smtp-Source: ABdhPJw6d5R9UfukUEMTpWaYYz1v6X9So8NgpEy7M5TqN06bc9IR2ASu9dLXRkkbFquARujEyHmhcg== X-Received: by 2002:a67:f116:: with SMTP id n22mr9104132vsk.228.1597861259398; Wed, 19 Aug 2020 11:20:59 -0700 (PDT) Received: from mail-vk1-f175.google.com (mail-vk1-f175.google.com. [209.85.221.175]) by smtp.gmail.com with ESMTPSA id m20sm2083419vsl.7.2020.08.19.11.20.57 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Aug 2020 11:20:57 -0700 (PDT) Received: by mail-vk1-f175.google.com with SMTP id l184so5337102vki.10 for ; Wed, 19 Aug 2020 11:20:57 -0700 (PDT) X-Received: by 2002:a1f:2fc1:: with SMTP id v184mr15612583vkv.42.1597861257099; Wed, 19 Aug 2020 11:20:57 -0700 (PDT) MIME-Version: 1.0 References: <20200817220238.603465-1-robdclark@gmail.com> <20200817220238.603465-11-robdclark@gmail.com> In-Reply-To: From: Doug Anderson Date: Wed, 19 Aug 2020 11:20:44 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 10/20] dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU To: Rob Clark X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200819_142101_625141_9D18BE4A X-CRM114-Status: GOOD ( 30.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Rob Herring , Sai Prakash Ranjan , Jordan Crouse , open list , Will Deacon , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm , Joerg Roedel , Robin Murphy , dri-devel , Bjorn Andersson , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , Rob Herring , Sibi Sankar , Vivek Gautam , Stephen Boyd , freedreno , "moderated list:ARM SMMU DRIVERS" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On Wed, Aug 19, 2020 at 10:36 AM Rob Clark wrote: > > On Wed, Aug 19, 2020 at 10:03 AM Doug Anderson wrote: > > > > Hi, > > > > On Mon, Aug 17, 2020 at 3:03 PM Rob Clark wrote: > > > > > > From: Jordan Crouse > > > > > > Every Qcom Adreno GPU has an embedded SMMU for its own use. These > > > devices depend on unique features such as split pagetables, > > > different stall/halt requirements and other settings. Identify them > > > with a compatible string so that they can be identified in the > > > arm-smmu implementation specific code. > > > > > > Signed-off-by: Jordan Crouse > > > Reviewed-by: Rob Herring > > > Signed-off-by: Rob Clark > > > --- > > > Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 ++++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > index 503160a7b9a0..5ec5d0d691f6 100644 > > > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > @@ -40,6 +40,10 @@ properties: > > > - qcom,sm8150-smmu-500 > > > - qcom,sm8250-smmu-500 > > > - const: arm,mmu-500 > > > + - description: Qcom Adreno GPUs implementing "arm,smmu-v2" > > > + items: > > > + - const: qcom,adreno-smmu > > > + - const: qcom,smmu-v2 > > > > I know I'm kinda late to the game, but this seems weird to me, > > especially given the later patches in the series like: > > > > https://lore.kernel.org/r/20200817220238.603465-19-robdclark@gmail.com > > > > Specifically in that patch you can see that this IOMMU already had a > > compatible string and we're changing it and throwing away the > > model-specific string? I'm guessing that you're just trying to make > > it easier for code to identify the adreno iommu, but it seems like a > > better way would have been to just add the adreno compatible in the > > middle, like: > > > > - description: Qcom Adreno GPUs implementing "arm,smmu-v2" > > items: > > - enum: > > - qcom,msm8996-smmu-v2 > > - qcom,msm8998-smmu-v2 > > - qcom,sc7180-smmu-v2 > > - qcom,sdm845-smmu-v2 > > - const: qcom,adreno-smmu > > - const: qcom,smmu-v2 > > > > Then we still have the SoC-specific compatible string in case we need > > it but we also have the generic one? It also means that we're not > > deleting the old compatible string... > > I did bring up the thing about removing the compat string in an > earlier revision of the series.. but then we realized that > qcom,sc7180-smmu-v2 was never actually used anywhere. Right, so at least there's not going to be weird issues where landing the dts before the code change will break anything. > But I guess we could: compatible = "qcom,sc7180-smmu-v2", > "qcom,adreno-smmu", "qcom,smmu-v2"; Yeah, that was what I was suggesting. -Doug _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72D6BC433E1 for ; Wed, 19 Aug 2020 18:21:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4D3EA20786 for ; Wed, 19 Aug 2020 18:21:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="MJ511LjL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4D3EA20786 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A11866E0B9; Wed, 19 Aug 2020 18:21:01 +0000 (UTC) Received: from mail-vs1-xe41.google.com (mail-vs1-xe41.google.com [IPv6:2607:f8b0:4864:20::e41]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5B5156E0B9 for ; Wed, 19 Aug 2020 18:21:00 +0000 (UTC) Received: by mail-vs1-xe41.google.com with SMTP id j23so12439956vsq.7 for ; Wed, 19 Aug 2020 11:21:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=AacBmJ1F+/EQU2Ta6hd78j336wiWeooUogfDqt5vhVU=; b=MJ511LjL0Gf8T+5otwSMIHAYNGoOTa7oOz3vFzBU6AZJ6dAX+nI9cC7118htwG/ORX eBs8xHYraAXfTg3+3J/RFpfkMga9Cj17oTb4p/TBhXJhoh4jgceQywdVOQqMSK/JOJ3l PwBzJDQ8H04HrV4VQtbb6ovc5H+eRX5T4ho3g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=AacBmJ1F+/EQU2Ta6hd78j336wiWeooUogfDqt5vhVU=; b=HS7afv9FPCmYfsKbEUlTbo07UawHsdUVI3ivy2XkXHYWVYaWzAwrkQORUiLPZM5A4s rYoAQzUAOzHrXouikPIRtU8Onfz7eJOWjRGGOj6tRaK1OY5nnfZb0O3M01D+HWQbamT0 mGuYUnmaRcDpX+3nmHTUkVfgbOGxjHu+3wwknN4TJP678fZV01INerQquwspX5gTiaKF mtNp3b/ylcH7GuGZdQgj+6WaxPkvz7aywjIaL2vVZa2hT0vEdavNLM4LYdajvr43p8C9 a5osHUnJAGmUrqT3dxiAdsk0W3R32gACF98LoWJHSC0s5khFhRUaDoMkReD1DeLtwGq1 aAyg== X-Gm-Message-State: AOAM5318APn27WGc+VQxZ48mTHezenRXWmj/iBzgDkZCd8cROc0Fq7du 5NhAVx5XIm1PLyT2mRaAVBuSiFLu+YQFmg== X-Google-Smtp-Source: ABdhPJwZ1C6kdMmYYo1v1BeNuHn+NtEKLdfoGCrq5wb1BcfjXh/bxxUTXpI0DJrASGNeKc1BAfBoGA== X-Received: by 2002:a67:de03:: with SMTP id q3mr16590801vsk.160.1597861259070; Wed, 19 Aug 2020 11:20:59 -0700 (PDT) Received: from mail-vk1-f182.google.com (mail-vk1-f182.google.com. [209.85.221.182]) by smtp.gmail.com with ESMTPSA id g62sm4880256vkf.56.2020.08.19.11.20.57 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Aug 2020 11:20:57 -0700 (PDT) Received: by mail-vk1-f182.google.com with SMTP id i20so5341532vkk.2 for ; Wed, 19 Aug 2020 11:20:57 -0700 (PDT) X-Received: by 2002:a1f:2fc1:: with SMTP id v184mr15612583vkv.42.1597861257099; Wed, 19 Aug 2020 11:20:57 -0700 (PDT) MIME-Version: 1.0 References: <20200817220238.603465-1-robdclark@gmail.com> <20200817220238.603465-11-robdclark@gmail.com> In-Reply-To: From: Doug Anderson Date: Wed, 19 Aug 2020 11:20:44 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 10/20] dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU To: Rob Clark X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Sai Prakash Ranjan , open list , Will Deacon , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm , Joerg Roedel , Robin Murphy , dri-devel , Bjorn Andersson , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , Rob Herring , Sibi Sankar , Vivek Gautam , Stephen Boyd , freedreno , "moderated list:ARM SMMU DRIVERS" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi, On Wed, Aug 19, 2020 at 10:36 AM Rob Clark wrote: > > On Wed, Aug 19, 2020 at 10:03 AM Doug Anderson wrote: > > > > Hi, > > > > On Mon, Aug 17, 2020 at 3:03 PM Rob Clark wrote: > > > > > > From: Jordan Crouse > > > > > > Every Qcom Adreno GPU has an embedded SMMU for its own use. These > > > devices depend on unique features such as split pagetables, > > > different stall/halt requirements and other settings. Identify them > > > with a compatible string so that they can be identified in the > > > arm-smmu implementation specific code. > > > > > > Signed-off-by: Jordan Crouse > > > Reviewed-by: Rob Herring > > > Signed-off-by: Rob Clark > > > --- > > > Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 ++++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > index 503160a7b9a0..5ec5d0d691f6 100644 > > > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > > @@ -40,6 +40,10 @@ properties: > > > - qcom,sm8150-smmu-500 > > > - qcom,sm8250-smmu-500 > > > - const: arm,mmu-500 > > > + - description: Qcom Adreno GPUs implementing "arm,smmu-v2" > > > + items: > > > + - const: qcom,adreno-smmu > > > + - const: qcom,smmu-v2 > > > > I know I'm kinda late to the game, but this seems weird to me, > > especially given the later patches in the series like: > > > > https://lore.kernel.org/r/20200817220238.603465-19-robdclark@gmail.com > > > > Specifically in that patch you can see that this IOMMU already had a > > compatible string and we're changing it and throwing away the > > model-specific string? I'm guessing that you're just trying to make > > it easier for code to identify the adreno iommu, but it seems like a > > better way would have been to just add the adreno compatible in the > > middle, like: > > > > - description: Qcom Adreno GPUs implementing "arm,smmu-v2" > > items: > > - enum: > > - qcom,msm8996-smmu-v2 > > - qcom,msm8998-smmu-v2 > > - qcom,sc7180-smmu-v2 > > - qcom,sdm845-smmu-v2 > > - const: qcom,adreno-smmu > > - const: qcom,smmu-v2 > > > > Then we still have the SoC-specific compatible string in case we need > > it but we also have the generic one? It also means that we're not > > deleting the old compatible string... > > I did bring up the thing about removing the compat string in an > earlier revision of the series.. but then we realized that > qcom,sc7180-smmu-v2 was never actually used anywhere. Right, so at least there's not going to be weird issues where landing the dts before the code change will break anything. > But I guess we could: compatible = "qcom,sc7180-smmu-v2", > "qcom,adreno-smmu", "qcom,smmu-v2"; Yeah, that was what I was suggesting. -Doug _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel