From mboxrd@z Thu Jan 1 00:00:00 1970 From: Li Yang Subject: Re: [PATCH 1/2] ls2080a/dts: Add little endian property for GPIO IP block Date: Mon, 16 Nov 2015 12:56:46 -0600 Message-ID: References: <1446549552-40675-1-git-send-email-Gang.Liu@freescale.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Received: from mail-lb0-f194.google.com ([209.85.217.194]:32925 "EHLO mail-lb0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751151AbbKPS4s (ORCPT ); Mon, 16 Nov 2015 13:56:48 -0500 In-Reply-To: Sender: linux-gpio-owner@vger.kernel.org List-Id: linux-gpio@vger.kernel.org To: Linus Walleij Cc: Liu Gang , Rob Herring , Bhupesh Sharma , "devicetree@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Wood Scott-B07421 , Li Yang-R58472 On Mon, Nov 16, 2015 at 9:11 AM, Linus Walleij wrote: > On Tue, Nov 3, 2015 at 12:19 PM, Liu Gang wrote: > >> The GPIO block for ls2080a platform has little endian registers, >> the GPIO driver needs this property to read/write registers by >> right interface. >> >> Signed-off-by: Liu Gang >> >> diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> index f2455c5..c836dab 100644 >> --- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> +++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> @@ -10,6 +10,9 @@ Required properties: >> the second cell is used to specify the gpio polarity: >> 0 = active high >> 1 = active low >> +- little-endian : Should be set if the GPIO has little endian >> + registers. No the property means the GPIO >> + registers are big endian mode. > > That is a very generic binding and I would like the devicetree > maintainers to say something about this. > > I would be OK if this is specified for *all* gpiochips in > Documentation/devicetree/bindings/gpio/gpio.txt > or even higher up in the desriptions. > > Just for Freescale seems a bit too local. There is already a generic definition at Documentation/devicetree/bindings/common-properties.txt. But it will be special for Freescale controller to say that the default is big-endian for backward compatibility. Regards, Leo From mboxrd@z Thu Jan 1 00:00:00 1970 From: leoli@freescale.com (Li Yang) Date: Mon, 16 Nov 2015 12:56:46 -0600 Subject: [PATCH 1/2] ls2080a/dts: Add little endian property for GPIO IP block In-Reply-To: References: <1446549552-40675-1-git-send-email-Gang.Liu@freescale.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Nov 16, 2015 at 9:11 AM, Linus Walleij wrote: > On Tue, Nov 3, 2015 at 12:19 PM, Liu Gang wrote: > >> The GPIO block for ls2080a platform has little endian registers, >> the GPIO driver needs this property to read/write registers by >> right interface. >> >> Signed-off-by: Liu Gang >> >> diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> index f2455c5..c836dab 100644 >> --- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> +++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> @@ -10,6 +10,9 @@ Required properties: >> the second cell is used to specify the gpio polarity: >> 0 = active high >> 1 = active low >> +- little-endian : Should be set if the GPIO has little endian >> + registers. No the property means the GPIO >> + registers are big endian mode. > > That is a very generic binding and I would like the devicetree > maintainers to say something about this. > > I would be OK if this is specified for *all* gpiochips in > Documentation/devicetree/bindings/gpio/gpio.txt > or even higher up in the desriptions. > > Just for Freescale seems a bit too local. There is already a generic definition at Documentation/devicetree/bindings/common-properties.txt. But it will be special for Freescale controller to say that the default is big-endian for backward compatibility. Regards, Leo