From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4509C433EF for ; Fri, 1 Oct 2021 16:17:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BD248611C8 for ; Fri, 1 Oct 2021 16:17:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354848AbhJAQTk (ORCPT ); Fri, 1 Oct 2021 12:19:40 -0400 Received: from mail-qt1-f178.google.com ([209.85.160.178]:35593 "EHLO mail-qt1-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231992AbhJAQTh (ORCPT ); Fri, 1 Oct 2021 12:19:37 -0400 Received: by mail-qt1-f178.google.com with SMTP id c20so9462226qtb.2; Fri, 01 Oct 2021 09:17:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=tKg9mgF1rfjAjrXayimdKxGF/3vx77dbe9y4qadsSBo=; b=1gUGaYLxlraOXeNXD3H1pE9r+L1QrRlCCI+f7ysn58EgQRcOBBGAoMhi0nrqO3WP4s Y9kQFHlGyBc2HUzsKr9G9+L8sCrYe1Osz6NooTAhRBYjkO91Sf+i5h4l1MfZGaZf3Kx2 czjI4OLLCyf4MC6VH4pehNfvuYzjLWToaUCDkJLv1eghKirec9KOgos+gLHHNgjXnHFK 79iRpA78CSTIujt7MPP4kYoZJLjAz5N6XLuMu9OkXVOhDDQ6RuOb92jP5DomQ1wf2eG8 iFs60GEzDy8QyLyS55SbIEAt2eKKA3YvszzGkDo4cydkuGB6oyCXcesqvIkf9XgKYscA lyGw== X-Gm-Message-State: AOAM532Ww3e2pCKjWakJI2rlBIr1z3IF2rZh2e2X3Js97RndWYZEkBnT mLVDrRSt0r5kPVDWueoTyKs8z+wtnkI= X-Google-Smtp-Source: ABdhPJwwmdNJ8cSAQ3rL0+dq6ULxndc0wybqoH/+G7OFoXG4AUOUO6vW+fjwkfvk6wtU48GaF9blpg== X-Received: by 2002:ac8:4547:: with SMTP id z7mr13835420qtn.131.1633105071862; Fri, 01 Oct 2021 09:17:51 -0700 (PDT) Received: from mail-qt1-f180.google.com (mail-qt1-f180.google.com. [209.85.160.180]) by smtp.gmail.com with ESMTPSA id o15sm3116569qkk.129.2021.10.01.09.17.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 01 Oct 2021 09:17:51 -0700 (PDT) Received: by mail-qt1-f180.google.com with SMTP id m26so9474521qtn.1; Fri, 01 Oct 2021 09:17:50 -0700 (PDT) X-Received: by 2002:a05:622a:1341:: with SMTP id w1mr14334812qtk.127.1633105070007; Fri, 01 Oct 2021 09:17:50 -0700 (PDT) MIME-Version: 1.0 References: <20211001000924.15421-1-leoyang.li@nxp.com> <20211001000924.15421-2-leoyang.li@nxp.com> In-Reply-To: From: Li Yang Date: Fri, 1 Oct 2021 11:17:38 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/5] dt-bindings: memory: fsl: convert ifc binding to yaml schema To: Krzysztof Kozlowski Cc: Shawn Guo , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Michael Ellerman , linuxppc-dev , lkml Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 1, 2021 at 5:01 AM Krzysztof Kozlowski wrote: > > On 01/10/2021 02:09, Li Yang wrote: > > Convert the txt binding to yaml format and add description. Drop the > > "simple-bus" compatible string from the example and not allowed by the > > binding any more. This will help to enforce the correct probe order > > between parent device and child devices, but will require the ifc driver > > to probe the child devices to work properly. > > > > Signed-off-by: Li Yang > > --- > > updates from previous submission: > > - Drop "simple-bus" from binding and only "fsl,ifc" as compatible > > - Fix one identiation problem of "reg" > > - Add type restriction to "little-endian" property > > > > .../bindings/memory-controllers/fsl/ifc.txt | 82 ----------- > > .../bindings/memory-controllers/fsl/ifc.yaml | 137 ++++++++++++++++++ > > 2 files changed, 137 insertions(+), 82 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > deleted file mode 100644 > > index 89427b018ba7..000000000000 > > --- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > +++ /dev/null > > @@ -1,82 +0,0 @@ > > -Integrated Flash Controller > > - > > -Properties: > > -- name : Should be ifc > > -- compatible : should contain "fsl,ifc". The version of the integrated > > - flash controller can be found in the IFC_REV register at > > - offset zero. > > - > > -- #address-cells : Should be either two or three. The first cell is the > > - chipselect number, and the remaining cells are the > > - offset into the chipselect. > > -- #size-cells : Either one or two, depending on how large each chipselect > > - can be. > > -- reg : Offset and length of the register set for the device > > -- interrupts: IFC may have one or two interrupts. If two interrupt > > - specifiers are present, the first is the "common" > > - interrupt (CM_EVTER_STAT), and the second is the NAND > > - interrupt (NAND_EVTER_STAT). If there is only one, > > - that interrupt reports both types of event. > > - > > -- little-endian : If this property is absent, the big-endian mode will > > - be in use as default for registers. > > - > > -- ranges : Each range corresponds to a single chipselect, and covers > > - the entire access window as configured. > > - > > -Child device nodes describe the devices connected to IFC such as NOR (e.g. > > -cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices > > -like FPGAs, CPLDs, etc. > > - > > -Example: > > - > > - ifc@ffe1e000 { > > - compatible = "fsl,ifc", "simple-bus"; > > - #address-cells = <2>; > > - #size-cells = <1>; > > - reg = <0x0 0xffe1e000 0 0x2000>; > > - interrupts = <16 2 19 2>; > > - little-endian; > > - > > - /* NOR, NAND Flashes and CPLD on board */ > > - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 > > - 0x1 0x0 0x0 0xffa00000 0x00010000 > > - 0x3 0x0 0x0 0xffb00000 0x00020000>; > > - > > - flash@0,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "cfi-flash"; > > - reg = <0x0 0x0 0x2000000>; > > - bank-width = <2>; > > - device-width = <1>; > > - > > - partition@0 { > > - /* 32MB for user data */ > > - reg = <0x0 0x02000000>; > > - label = "NOR Data"; > > - }; > > - }; > > - > > - flash@1,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "fsl,ifc-nand"; > > - reg = <0x1 0x0 0x10000>; > > - > > - partition@0 { > > - /* This location must not be altered */ > > - /* 1MB for u-boot Bootloader Image */ > > - reg = <0x0 0x00100000>; > > - label = "NAND U-Boot Image"; > > - read-only; > > - }; > > - }; > > - > > - cpld@3,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "fsl,p1010rdb-cpld"; > > - reg = <0x3 0x0 0x000001f>; > > - }; > > - }; > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > new file mode 100644 > > index 000000000000..19871ce39fe3 > > Thanks for the patch. > > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > @@ -0,0 +1,137 @@ > > +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) > > Checkpatch should scream here. If it doesn't, maybe you work on some old > tree, which would also explain why you send it to my old address (not > the one from get_maintainers). Please use both checkpatch and > get_maintainers. > > You basically relicense bindings from GPL-2.0 only to new license, > including GPL-3.0. Ok. Will update the license. > > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/memory-controllers/fsl/ifc.yaml# > > File name should be "fsl,ifc.yaml" Ok. But probably it is a little bit redundant as the upper level folder also has fsl. > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: FSL/NXP Integrated Flash Controller > > + > > +maintainers: > > + - Li Yang > > + > > +description: | > > + NXP's integrated flash controller (IFC) is an advanced version of the > > + enhanced local bus controller which includes similar programming and signal > > + interfaces with an extended feature set. The IFC provides access to multiple > > + external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM, > > + SRAM and other memories where address and data are shared on a bus. > > + > > +properties: > > + $nodename: > > + pattern: "^ifc@[0-9a-f]+$" > > Nodes should be generic, so this looks like "memory-controller". Ok. > > > + > > + compatible: > > + const: fsl,ifc > > + > > + "#address-cells": > > + enum: [2, 3] > > + description: | > > + Should be either two or three. The first cell is the chipselect > > + number, and the remaining cells are the offset into the chipselect. > > + > > + "#size-cells": > > + enum: [1, 2] > > + description: | > > + Either one or two, depending on how large each chipselect can be. > > + > > + reg: > > + maxItems: 1 > > + description: | > > + Offset and length of the register set for the device. > > Skip the description, it's obvious. Ok. > > > + > > + interrupts: > > + minItems: 1 > > + maxItems: 2 > > + description: | > > + IFC may have one or two interrupts. If two interrupt specifiers are > > + present, the first is the "common" interrupt (CM_EVTER_STAT), and the > > + second is the NAND interrupt (NAND_EVTER_STAT). If there is only one, > > + that interrupt reports both types of event. > > + > > + little-endian: > > + $ref: '/schemas/types.yaml#/definitions/flag' > > type: boolean It will not have a true or false value, but only present or not. Is the boolean type taking care of this too? > > > Best regards, > Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 061AFC433F5 for ; Fri, 1 Oct 2021 16:18:26 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 34A58611C8 for ; Fri, 1 Oct 2021 16:18:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 34A58611C8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HLZzM42tGz3c7n for ; Sat, 2 Oct 2021 02:18:23 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=209.85.222.179; helo=mail-qk1-f179.google.com; envelope-from=pku.leo@gmail.com; receiver=) Received: from mail-qk1-f179.google.com (mail-qk1-f179.google.com [209.85.222.179]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4HLZyr5h7gz2yPR for ; Sat, 2 Oct 2021 02:17:55 +1000 (AEST) Received: by mail-qk1-f179.google.com with SMTP id c7so9680601qka.2 for ; Fri, 01 Oct 2021 09:17:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=tKg9mgF1rfjAjrXayimdKxGF/3vx77dbe9y4qadsSBo=; b=u5UrMpi8XFuJ+zNDJyyRPihwyLctEOinkwjzp8xCGS52VIVMmEtK3AGigKrW3oe+WF MxaKDCeOfpN8btpGbixWQ627tOYXzyGsgy3zxRpBfwhN6RaVQLaChxaZu81IlRwVfwYl KLZv5UXxsgixVoWXLtToQ2Fp+z2u9Xi9xX7dBBh6bINzhE2acsY1z5Ec2hv0XExCabBi 8BhnoD70A5nyCW53TBtpoznKEK9ojrlOPvrFTfP+psKTjB0lS+uYuH6NO3H1R4GeIoBV qLodODwVTafQ+rjAmH3XIJdoUNpFrzuCwF5+pu4Dsx6Q3VSZlaWkzNrTF+5O4atBKKfG BhHw== X-Gm-Message-State: AOAM531wh7ri9O4zGGGWA5UC09VJfrROqxLbRhYtllIPRdZOZytFnIKJ hczJ8BMX67iUTEHmRHRAb1jBSCaQ1yY= X-Google-Smtp-Source: ABdhPJxlUMN0w/zWy0Bb0/R60Q8zxWF0Tx784xgsFlSgl/6cwMpXw79Sw8W88r/uLkA2UDhVOWQSDQ== X-Received: by 2002:a05:620a:53d:: with SMTP id h29mr10308714qkh.395.1633105071689; Fri, 01 Oct 2021 09:17:51 -0700 (PDT) Received: from mail-qt1-f180.google.com (mail-qt1-f180.google.com. [209.85.160.180]) by smtp.gmail.com with ESMTPSA id c139sm3223846qkg.2.2021.10.01.09.17.50 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 01 Oct 2021 09:17:50 -0700 (PDT) Received: by mail-qt1-f180.google.com with SMTP id x9so9517617qtv.0 for ; Fri, 01 Oct 2021 09:17:50 -0700 (PDT) X-Received: by 2002:a05:622a:1341:: with SMTP id w1mr14334812qtk.127.1633105070007; Fri, 01 Oct 2021 09:17:50 -0700 (PDT) MIME-Version: 1.0 References: <20211001000924.15421-1-leoyang.li@nxp.com> <20211001000924.15421-2-leoyang.li@nxp.com> In-Reply-To: From: Li Yang Date: Fri, 1 Oct 2021 11:17:38 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/5] dt-bindings: memory: fsl: convert ifc binding to yaml schema To: Krzysztof Kozlowski Content-Type: text/plain; charset="UTF-8" X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linuxppc-dev , lkml , Rob Herring , Shawn Guo , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, Oct 1, 2021 at 5:01 AM Krzysztof Kozlowski wrote: > > On 01/10/2021 02:09, Li Yang wrote: > > Convert the txt binding to yaml format and add description. Drop the > > "simple-bus" compatible string from the example and not allowed by the > > binding any more. This will help to enforce the correct probe order > > between parent device and child devices, but will require the ifc driver > > to probe the child devices to work properly. > > > > Signed-off-by: Li Yang > > --- > > updates from previous submission: > > - Drop "simple-bus" from binding and only "fsl,ifc" as compatible > > - Fix one identiation problem of "reg" > > - Add type restriction to "little-endian" property > > > > .../bindings/memory-controllers/fsl/ifc.txt | 82 ----------- > > .../bindings/memory-controllers/fsl/ifc.yaml | 137 ++++++++++++++++++ > > 2 files changed, 137 insertions(+), 82 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > deleted file mode 100644 > > index 89427b018ba7..000000000000 > > --- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > +++ /dev/null > > @@ -1,82 +0,0 @@ > > -Integrated Flash Controller > > - > > -Properties: > > -- name : Should be ifc > > -- compatible : should contain "fsl,ifc". The version of the integrated > > - flash controller can be found in the IFC_REV register at > > - offset zero. > > - > > -- #address-cells : Should be either two or three. The first cell is the > > - chipselect number, and the remaining cells are the > > - offset into the chipselect. > > -- #size-cells : Either one or two, depending on how large each chipselect > > - can be. > > -- reg : Offset and length of the register set for the device > > -- interrupts: IFC may have one or two interrupts. If two interrupt > > - specifiers are present, the first is the "common" > > - interrupt (CM_EVTER_STAT), and the second is the NAND > > - interrupt (NAND_EVTER_STAT). If there is only one, > > - that interrupt reports both types of event. > > - > > -- little-endian : If this property is absent, the big-endian mode will > > - be in use as default for registers. > > - > > -- ranges : Each range corresponds to a single chipselect, and covers > > - the entire access window as configured. > > - > > -Child device nodes describe the devices connected to IFC such as NOR (e.g. > > -cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices > > -like FPGAs, CPLDs, etc. > > - > > -Example: > > - > > - ifc@ffe1e000 { > > - compatible = "fsl,ifc", "simple-bus"; > > - #address-cells = <2>; > > - #size-cells = <1>; > > - reg = <0x0 0xffe1e000 0 0x2000>; > > - interrupts = <16 2 19 2>; > > - little-endian; > > - > > - /* NOR, NAND Flashes and CPLD on board */ > > - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 > > - 0x1 0x0 0x0 0xffa00000 0x00010000 > > - 0x3 0x0 0x0 0xffb00000 0x00020000>; > > - > > - flash@0,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "cfi-flash"; > > - reg = <0x0 0x0 0x2000000>; > > - bank-width = <2>; > > - device-width = <1>; > > - > > - partition@0 { > > - /* 32MB for user data */ > > - reg = <0x0 0x02000000>; > > - label = "NOR Data"; > > - }; > > - }; > > - > > - flash@1,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "fsl,ifc-nand"; > > - reg = <0x1 0x0 0x10000>; > > - > > - partition@0 { > > - /* This location must not be altered */ > > - /* 1MB for u-boot Bootloader Image */ > > - reg = <0x0 0x00100000>; > > - label = "NAND U-Boot Image"; > > - read-only; > > - }; > > - }; > > - > > - cpld@3,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "fsl,p1010rdb-cpld"; > > - reg = <0x3 0x0 0x000001f>; > > - }; > > - }; > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > new file mode 100644 > > index 000000000000..19871ce39fe3 > > Thanks for the patch. > > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > @@ -0,0 +1,137 @@ > > +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) > > Checkpatch should scream here. If it doesn't, maybe you work on some old > tree, which would also explain why you send it to my old address (not > the one from get_maintainers). Please use both checkpatch and > get_maintainers. > > You basically relicense bindings from GPL-2.0 only to new license, > including GPL-3.0. Ok. Will update the license. > > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/memory-controllers/fsl/ifc.yaml# > > File name should be "fsl,ifc.yaml" Ok. But probably it is a little bit redundant as the upper level folder also has fsl. > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: FSL/NXP Integrated Flash Controller > > + > > +maintainers: > > + - Li Yang > > + > > +description: | > > + NXP's integrated flash controller (IFC) is an advanced version of the > > + enhanced local bus controller which includes similar programming and signal > > + interfaces with an extended feature set. The IFC provides access to multiple > > + external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM, > > + SRAM and other memories where address and data are shared on a bus. > > + > > +properties: > > + $nodename: > > + pattern: "^ifc@[0-9a-f]+$" > > Nodes should be generic, so this looks like "memory-controller". Ok. > > > + > > + compatible: > > + const: fsl,ifc > > + > > + "#address-cells": > > + enum: [2, 3] > > + description: | > > + Should be either two or three. The first cell is the chipselect > > + number, and the remaining cells are the offset into the chipselect. > > + > > + "#size-cells": > > + enum: [1, 2] > > + description: | > > + Either one or two, depending on how large each chipselect can be. > > + > > + reg: > > + maxItems: 1 > > + description: | > > + Offset and length of the register set for the device. > > Skip the description, it's obvious. Ok. > > > + > > + interrupts: > > + minItems: 1 > > + maxItems: 2 > > + description: | > > + IFC may have one or two interrupts. If two interrupt specifiers are > > + present, the first is the "common" interrupt (CM_EVTER_STAT), and the > > + second is the NAND interrupt (NAND_EVTER_STAT). If there is only one, > > + that interrupt reports both types of event. > > + > > + little-endian: > > + $ref: '/schemas/types.yaml#/definitions/flag' > > type: boolean It will not have a true or false value, but only present or not. Is the boolean type taking care of this too? > > > Best regards, > Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2411DC433EF for ; Fri, 1 Oct 2021 16:20:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DD25A6138F for ; Fri, 1 Oct 2021 16:20:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org DD25A6138F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KbzI4nRNirHYv1OtsKRofvIUeEtQqLQ5laQlYJpvOj8=; b=u5BN4yZ2ir35gK oVTyWxay0Y42R5htcbaW0HH9vvznwwCGI1LAzbioOycZY/0b2bX08beuC5Gb4VtqKv6bi06ZaVvvp cOeXIjJ1Qm/5/xCuhQxW4F9lW7TP1hPckBSPWmeq0l/IUjZ90t7m+4uDuTyIn2Ilwif2a55tR75MY dEa7rvPe7SA6hzo1H8wwN7MuRLlk6Yq/yfpYE9zt/7nMwIsypeMAuLTbt7G1zCcszvFar6AhhsMnM f7AWvTMMeq/tJ2Kso8FAlgvcq3Y66evyqlcz6Wk8hseBZSJgU71W8dnjrnypmiXhmaEd2kTmShjM5 FDHNCdndX6HIAVHQNZEQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mWLEV-000pdn-Tz; Fri, 01 Oct 2021 16:18:00 +0000 Received: from mail-qt1-f175.google.com ([209.85.160.175]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mWLER-000pbs-F0 for linux-arm-kernel@lists.infradead.org; Fri, 01 Oct 2021 16:17:57 +0000 Received: by mail-qt1-f175.google.com with SMTP id l13so9467976qtv.3 for ; Fri, 01 Oct 2021 09:17:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=tKg9mgF1rfjAjrXayimdKxGF/3vx77dbe9y4qadsSBo=; b=i6t9pn2LsAsA+rLT0ctgVbVKsVlsNP96riD7c428Ha+oyFCqOBWr8leTqeVmMPqjOc eYBy4vqAfoDPHPGshzlXjKHZU170olpO3lhoqsBTplAuhSze0H3QTsn+nYKsbSaU08ir pXucbL4XLuzngtHZmn4rbzyd8xvWITuMNmWF0ZipQC+Gv2WWDfiVWlaX1riyOpKK1bcp pWgG0fjcAIEJKZmkR8T68+2bL9lAxVpRkQ1UD+//KckwvaZOhC6yIUH82PjvShMQ6Q+/ 8vcpslOd0vHZHfsuShEwPu9LVRpbIMHIxEWuZeXqsfZ2MPDaIEvPkcntjGgwV/sBJa2s XLfw== X-Gm-Message-State: AOAM530qhPY1NqgUr1TJ+iCEztkhdRfLv3ziJ74mFNawU7InBeXh+PHF j6y4KnB7RoY09tTzdH4ZYHzRPtc6h68= X-Google-Smtp-Source: ABdhPJyNAnHoXfdSZBnh8bBUv+4JJUAiv1Jsus92SpkHFS0alhJJpK+T51GDtZIo5pU/pvjq8MejzA== X-Received: by 2002:ac8:202:: with SMTP id k2mr14254318qtg.398.1633105071773; Fri, 01 Oct 2021 09:17:51 -0700 (PDT) Received: from mail-qt1-f175.google.com (mail-qt1-f175.google.com. [209.85.160.175]) by smtp.gmail.com with ESMTPSA id a22sm3979678qtx.7.2021.10.01.09.17.50 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 01 Oct 2021 09:17:50 -0700 (PDT) Received: by mail-qt1-f175.google.com with SMTP id e16so9410674qte.13 for ; Fri, 01 Oct 2021 09:17:50 -0700 (PDT) X-Received: by 2002:a05:622a:1341:: with SMTP id w1mr14334812qtk.127.1633105070007; Fri, 01 Oct 2021 09:17:50 -0700 (PDT) MIME-Version: 1.0 References: <20211001000924.15421-1-leoyang.li@nxp.com> <20211001000924.15421-2-leoyang.li@nxp.com> In-Reply-To: From: Li Yang Date: Fri, 1 Oct 2021 11:17:38 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/5] dt-bindings: memory: fsl: convert ifc binding to yaml schema To: Krzysztof Kozlowski Cc: Shawn Guo , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Michael Ellerman , linuxppc-dev , lkml X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211001_091755_567205_9C8F127C X-CRM114-Status: GOOD ( 48.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Oct 1, 2021 at 5:01 AM Krzysztof Kozlowski wrote: > > On 01/10/2021 02:09, Li Yang wrote: > > Convert the txt binding to yaml format and add description. Drop the > > "simple-bus" compatible string from the example and not allowed by the > > binding any more. This will help to enforce the correct probe order > > between parent device and child devices, but will require the ifc driver > > to probe the child devices to work properly. > > > > Signed-off-by: Li Yang > > --- > > updates from previous submission: > > - Drop "simple-bus" from binding and only "fsl,ifc" as compatible > > - Fix one identiation problem of "reg" > > - Add type restriction to "little-endian" property > > > > .../bindings/memory-controllers/fsl/ifc.txt | 82 ----------- > > .../bindings/memory-controllers/fsl/ifc.yaml | 137 ++++++++++++++++++ > > 2 files changed, 137 insertions(+), 82 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > deleted file mode 100644 > > index 89427b018ba7..000000000000 > > --- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt > > +++ /dev/null > > @@ -1,82 +0,0 @@ > > -Integrated Flash Controller > > - > > -Properties: > > -- name : Should be ifc > > -- compatible : should contain "fsl,ifc". The version of the integrated > > - flash controller can be found in the IFC_REV register at > > - offset zero. > > - > > -- #address-cells : Should be either two or three. The first cell is the > > - chipselect number, and the remaining cells are the > > - offset into the chipselect. > > -- #size-cells : Either one or two, depending on how large each chipselect > > - can be. > > -- reg : Offset and length of the register set for the device > > -- interrupts: IFC may have one or two interrupts. If two interrupt > > - specifiers are present, the first is the "common" > > - interrupt (CM_EVTER_STAT), and the second is the NAND > > - interrupt (NAND_EVTER_STAT). If there is only one, > > - that interrupt reports both types of event. > > - > > -- little-endian : If this property is absent, the big-endian mode will > > - be in use as default for registers. > > - > > -- ranges : Each range corresponds to a single chipselect, and covers > > - the entire access window as configured. > > - > > -Child device nodes describe the devices connected to IFC such as NOR (e.g. > > -cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices > > -like FPGAs, CPLDs, etc. > > - > > -Example: > > - > > - ifc@ffe1e000 { > > - compatible = "fsl,ifc", "simple-bus"; > > - #address-cells = <2>; > > - #size-cells = <1>; > > - reg = <0x0 0xffe1e000 0 0x2000>; > > - interrupts = <16 2 19 2>; > > - little-endian; > > - > > - /* NOR, NAND Flashes and CPLD on board */ > > - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 > > - 0x1 0x0 0x0 0xffa00000 0x00010000 > > - 0x3 0x0 0x0 0xffb00000 0x00020000>; > > - > > - flash@0,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "cfi-flash"; > > - reg = <0x0 0x0 0x2000000>; > > - bank-width = <2>; > > - device-width = <1>; > > - > > - partition@0 { > > - /* 32MB for user data */ > > - reg = <0x0 0x02000000>; > > - label = "NOR Data"; > > - }; > > - }; > > - > > - flash@1,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "fsl,ifc-nand"; > > - reg = <0x1 0x0 0x10000>; > > - > > - partition@0 { > > - /* This location must not be altered */ > > - /* 1MB for u-boot Bootloader Image */ > > - reg = <0x0 0x00100000>; > > - label = "NAND U-Boot Image"; > > - read-only; > > - }; > > - }; > > - > > - cpld@3,0 { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - compatible = "fsl,p1010rdb-cpld"; > > - reg = <0x3 0x0 0x000001f>; > > - }; > > - }; > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > new file mode 100644 > > index 000000000000..19871ce39fe3 > > Thanks for the patch. > > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml > > @@ -0,0 +1,137 @@ > > +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) > > Checkpatch should scream here. If it doesn't, maybe you work on some old > tree, which would also explain why you send it to my old address (not > the one from get_maintainers). Please use both checkpatch and > get_maintainers. > > You basically relicense bindings from GPL-2.0 only to new license, > including GPL-3.0. Ok. Will update the license. > > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/memory-controllers/fsl/ifc.yaml# > > File name should be "fsl,ifc.yaml" Ok. But probably it is a little bit redundant as the upper level folder also has fsl. > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: FSL/NXP Integrated Flash Controller > > + > > +maintainers: > > + - Li Yang > > + > > +description: | > > + NXP's integrated flash controller (IFC) is an advanced version of the > > + enhanced local bus controller which includes similar programming and signal > > + interfaces with an extended feature set. The IFC provides access to multiple > > + external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM, > > + SRAM and other memories where address and data are shared on a bus. > > + > > +properties: > > + $nodename: > > + pattern: "^ifc@[0-9a-f]+$" > > Nodes should be generic, so this looks like "memory-controller". Ok. > > > + > > + compatible: > > + const: fsl,ifc > > + > > + "#address-cells": > > + enum: [2, 3] > > + description: | > > + Should be either two or three. The first cell is the chipselect > > + number, and the remaining cells are the offset into the chipselect. > > + > > + "#size-cells": > > + enum: [1, 2] > > + description: | > > + Either one or two, depending on how large each chipselect can be. > > + > > + reg: > > + maxItems: 1 > > + description: | > > + Offset and length of the register set for the device. > > Skip the description, it's obvious. Ok. > > > + > > + interrupts: > > + minItems: 1 > > + maxItems: 2 > > + description: | > > + IFC may have one or two interrupts. If two interrupt specifiers are > > + present, the first is the "common" interrupt (CM_EVTER_STAT), and the > > + second is the NAND interrupt (NAND_EVTER_STAT). If there is only one, > > + that interrupt reports both types of event. > > + > > + little-endian: > > + $ref: '/schemas/types.yaml#/definitions/flag' > > type: boolean It will not have a true or false value, but only present or not. Is the boolean type taking care of this too? > > > Best regards, > Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel