From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Date: Tue, 10 Oct 2017 17:56:47 -0500 Subject: [U-Boot] [PATCH v2 08/14] arm: dts: Add dts for Stratix10 SoC In-Reply-To: <1507208851-32672-9-git-send-email-chin.liang.see@intel.com> References: <1507208851-32672-1-git-send-email-chin.liang.see@intel.com> <1507208851-32672-9-git-send-email-chin.liang.see@intel.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Device tree for Stratix10 SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/socfpga_stratix10_socdk.dts | 180 +++++++++++++++++++++++++++++++ > 2 files changed, 182 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/socfpga_stratix10_socdk.dts Shouldn't you have a dtsi base file for the SOC, and then subsequent boards would be the dts? > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 7c062f0..f66b9c9 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -171,7 +171,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \ > socfpga_cyclone5_sockit.dtb \ > socfpga_cyclone5_socrates.dtb \ > socfpga_cyclone5_sr1500.dtb \ > - socfpga_cyclone5_vining_fpga.dtb > + socfpga_cyclone5_vining_fpga.dtb \ > + socfpga_stratix10_socdk.dtb > > dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \ > dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb > diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts > new file mode 100644 > index 0000000..26b407f > --- /dev/null > +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts > @@ -0,0 +1,180 @@ > +/* > + * Copyright (C) 2016-2017 Intel Corporation > + * > + * SPDX-License-Identifier: GPL-2.0 > + */ > + > +/dts-v1/; > +#include "skeleton.dtsi" > +#include > + > +/ { > + model = "Intel SOCFPGA Stratix 10 SoC Development Kit"; > + compatible = "altr,socfpga-stratix10", "altr,socfpga"; > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + chosen { > + bootargs = "console=ttyS0,115200"; > + }; > + > + aliases { > + ethernet0 = &gmac0; > + spi0 = &qspi; > + }; > + > + memory { > + name = "memory"; > + device_type = "memory"; > + reg = <0x0 0x80000000>; /* 2GB */ > + }; > + > + regulator_3_3v: 3-3-v-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "3.3V"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu at 0 { > + compatible = "arm,cortex-a53", "arm,armv8"; > + device_type = "cpu"; > + enable-method = "psci"; > + reg = <0x0>; > + }; > + > + cpu at 1 { > + compatible = "arm,cortex-a53", "arm,armv8"; > + device_type = "cpu"; > + enable-method = "psci"; > + reg = <0x1>; > + }; > + > + cpu at 2 { > + compatible = "arm,cortex-a53", "arm,armv8"; > + device_type = "cpu"; > + enable-method = "psci"; > + reg = <0x2>; > + }; > + > + cpu at 3 { > + compatible = "arm,cortex-a53", "arm,armv8"; > + device_type = "cpu"; > + enable-method = "psci"; > + reg = <0x3>; > + }; > + }; > + > + soc { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "simple-bus"; > + device_type = "soc"; > + ranges; > + u-boot,dm-pre-reloc; > + > + rst: rstmgr at ffd11000 { > + #reset-cells = <1>; > + compatible = "altr,rst-mgr"; > + reg = <0xffd11000 0x100>; > + altr,modrst-offset = <0x20>; > + }; > + > + mdio { > + phy0: ethernet-phy at 0 { > + txd0-skew-ps = <0>; /* -420ps */ > + txd1-skew-ps = <0>; /* -420ps */ > + txd2-skew-ps = <0>; /* -420ps */ > + txd3-skew-ps = <0>; /* -420ps */ > + rxd0-skew-ps = <420>; /* 0ps */ > + rxd1-skew-ps = <420>; /* 0ps */ > + rxd2-skew-ps = <420>; /* 0ps */ > + rxd3-skew-ps = <420>; /* 0ps */ > + txen-skew-ps = <0>; /* -420ps */ > + txc-skew-ps = <1860>; /* 960ps */ > + rxdv-skew-ps = <420>; /* 0ps */ > + rxc-skew-ps = <1680>; /* 780ps */ > + }; > + }; > + > + gmac0: ethernet at ff800000 { > + compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac"; > + reg = <0xff800000 0x2000>; > + interrupts = <0 90 4>; > + interrupt-names = "macirq"; > + mac-address = [00 00 00 00 00 00]; > + resets = <&rst EMAC0_RESET>; > + reset-names = "stmmaceth"; > + phy-mode = "rgmii"; > + phy-addr = <0xffffffff>; /* probe for phy addr */ I don't a usage for 'phy-addr' in the code anymore. Dinh