Re: [PATCH] drm/amdgpu: Move IH clientid defs to separate file

[Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

On Thu, Mar 8, 2018 at 11:26 PM, Alex Deucher <alexdeucher@gmail.com> wrote:
> On Thu, Mar 8, 2018 at 6:24 PM, Oak Zeng <zengshanjun@gmail.com> wrote:
>> This is preparation for sharing client ID definitions
>> between amdgpu and amdkfd
>>
>> Change-Id: Ie0b7b14c9c2366fd896745a51b74a9ba97ee3224
>> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h          | 44 +--------------
>>  drivers/gpu/drm/amd/include/soc15_ih_clientid.h | 72 +++++++++++++++++++++++++
>>  2 files changed, 73 insertions(+), 43 deletions(-)
>>  create mode 100644 drivers/gpu/drm/amd/include/soc15_ih_clientid.h
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
>> index b8a7dba..62a9869 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
>> @@ -25,51 +25,9 @@
>>  #define __AMDGPU_IH_H__
>>
>>  #include <linux/chash.h>
>> +#include "soc15_ih_clientid.h"
>>
>>  struct amdgpu_device;
>> - /*
>> -  * vega10+ IH clients
>> - */
>> -enum amdgpu_ih_clientid
>> -{
>> -    AMDGPU_IH_CLIENTID_IH          = 0x00,
>> -    AMDGPU_IH_CLIENTID_ACP         = 0x01,
>> -    AMDGPU_IH_CLIENTID_ATHUB       = 0x02,
>> -    AMDGPU_IH_CLIENTID_BIF         = 0x03,
>> -    AMDGPU_IH_CLIENTID_DCE         = 0x04,
>> -    AMDGPU_IH_CLIENTID_ISP         = 0x05,
>> -    AMDGPU_IH_CLIENTID_PCIE0       = 0x06,
>> -    AMDGPU_IH_CLIENTID_RLC         = 0x07,
>> -    AMDGPU_IH_CLIENTID_SDMA0       = 0x08,
>> -    AMDGPU_IH_CLIENTID_SDMA1       = 0x09,
>> -    AMDGPU_IH_CLIENTID_SE0SH       = 0x0a,
>> -    AMDGPU_IH_CLIENTID_SE1SH       = 0x0b,
>> -    AMDGPU_IH_CLIENTID_SE2SH       = 0x0c,
>> -    AMDGPU_IH_CLIENTID_SE3SH       = 0x0d,
>> -    AMDGPU_IH_CLIENTID_SYSHUB      = 0x0e,
>> -    AMDGPU_IH_CLIENTID_THM         = 0x0f,
>> -    AMDGPU_IH_CLIENTID_UVD         = 0x10,
>> -    AMDGPU_IH_CLIENTID_VCE0        = 0x11,
>> -    AMDGPU_IH_CLIENTID_VMC         = 0x12,
>> -    AMDGPU_IH_CLIENTID_XDMA        = 0x13,
>> -    AMDGPU_IH_CLIENTID_GRBM_CP     = 0x14,
>> -    AMDGPU_IH_CLIENTID_ATS         = 0x15,
>> -    AMDGPU_IH_CLIENTID_ROM_SMUIO    = 0x16,
>> -    AMDGPU_IH_CLIENTID_DF          = 0x17,
>> -    AMDGPU_IH_CLIENTID_VCE1        = 0x18,
>> -    AMDGPU_IH_CLIENTID_PWR         = 0x19,
>> -    AMDGPU_IH_CLIENTID_UTCL2       = 0x1b,
>> -    AMDGPU_IH_CLIENTID_EA          = 0x1c,
>> -    AMDGPU_IH_CLIENTID_UTCL2LOG            = 0x1d,
>> -    AMDGPU_IH_CLIENTID_MP0         = 0x1e,
>> -    AMDGPU_IH_CLIENTID_MP1         = 0x1f,
>> -
>> -    AMDGPU_IH_CLIENTID_MAX,
>> -
>> -    AMDGPU_IH_CLIENTID_VCN         = AMDGPU_IH_CLIENTID_UVD
>> -};
>> -
>> -#define AMDGPU_IH_CLIENTID_LEGACY 0
>
> You may want to leave the LEGACY define in this header since it's only
> used for pre-soc15 asics.

Although, if you will use it with kfd as well, I suppose it makes
sense to keep in together.  Either way:
Acked-by: Alex Deucher <alexander.deucher@amd.com>

>
> Alex
>
>
>>
>>  #define AMDGPU_PAGEFAULT_HASH_BITS 8
>>  struct amdgpu_retryfault_hashtable {
>> diff --git a/drivers/gpu/drm/amd/include/soc15_ih_clientid.h b/drivers/gpu/drm/amd/include/soc15_ih_clientid.h
>> new file mode 100644
>> index 0000000..e2e8c63
>> --- /dev/null
>> +++ b/drivers/gpu/drm/amd/include/soc15_ih_clientid.h
>> @@ -0,0 +1,72 @@
>> +/*
>> + * Copyright 2018 Advanced Micro Devices, Inc.
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be included in
>> + * all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
>> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + *
>> + */
>> +
>> +#ifndef __SOC15_IH_CLIENTID_H__
>> +#define __SOC15_IH_CLIENTID_H__
>> +
>> + /*
>> +  * vega10+ IH clients
>> + */
>> +enum amdgpu_ih_clientid {
>> +       AMDGPU_IH_CLIENTID_IH           = 0x00,
>> +       AMDGPU_IH_CLIENTID_ACP          = 0x01,
>> +       AMDGPU_IH_CLIENTID_ATHUB        = 0x02,
>> +       AMDGPU_IH_CLIENTID_BIF          = 0x03,
>> +       AMDGPU_IH_CLIENTID_DCE          = 0x04,
>> +       AMDGPU_IH_CLIENTID_ISP          = 0x05,
>> +       AMDGPU_IH_CLIENTID_PCIE0        = 0x06,
>> +       AMDGPU_IH_CLIENTID_RLC          = 0x07,
>> +       AMDGPU_IH_CLIENTID_SDMA0        = 0x08,
>> +       AMDGPU_IH_CLIENTID_SDMA1        = 0x09,
>> +       AMDGPU_IH_CLIENTID_SE0SH        = 0x0a,
>> +       AMDGPU_IH_CLIENTID_SE1SH        = 0x0b,
>> +       AMDGPU_IH_CLIENTID_SE2SH        = 0x0c,
>> +       AMDGPU_IH_CLIENTID_SE3SH        = 0x0d,
>> +       AMDGPU_IH_CLIENTID_SYSHUB       = 0x0e,
>> +       AMDGPU_IH_CLIENTID_THM          = 0x0f,
>> +       AMDGPU_IH_CLIENTID_UVD          = 0x10,
>> +       AMDGPU_IH_CLIENTID_VCE0         = 0x11,
>> +       AMDGPU_IH_CLIENTID_VMC          = 0x12,
>> +       AMDGPU_IH_CLIENTID_XDMA         = 0x13,
>> +       AMDGPU_IH_CLIENTID_GRBM_CP      = 0x14,
>> +       AMDGPU_IH_CLIENTID_ATS          = 0x15,
>> +       AMDGPU_IH_CLIENTID_ROM_SMUIO    = 0x16,
>> +       AMDGPU_IH_CLIENTID_DF           = 0x17,
>> +       AMDGPU_IH_CLIENTID_VCE1         = 0x18,
>> +       AMDGPU_IH_CLIENTID_PWR          = 0x19,
>> +       AMDGPU_IH_CLIENTID_UTCL2        = 0x1b,
>> +       AMDGPU_IH_CLIENTID_EA           = 0x1c,
>> +       AMDGPU_IH_CLIENTID_UTCL2LOG     = 0x1d,
>> +       AMDGPU_IH_CLIENTID_MP0          = 0x1e,
>> +       AMDGPU_IH_CLIENTID_MP1          = 0x1f,
>> +
>> +       AMDGPU_IH_CLIENTID_MAX,
>> +
>> +       AMDGPU_IH_CLIENTID_VCN          = AMDGPU_IH_CLIENTID_UVD
>> +};
>> +
>> +#define AMDGPU_IH_CLIENTID_LEGACY 0
>> +
>> +#endif
>> +
>> +
>> --
>> 2.7.4
>>
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