* [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits
@ 2021-05-20 14:29 Graham Sider
2021-05-20 14:29 ` [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation Graham Sider
` (5 more replies)
0 siblings, 6 replies; 16+ messages in thread
From: Graham Sider @ 2021-05-20 14:29 UTC (permalink / raw)
To: amd-gfx; +Cc: Harish.Kasiviswanathan, Graham Sider, Elena.Sakhnovitch
Add new defines for thermal throttle status bits which are ASIC
independent. This bit field will be visible to userspace via
gpu_metrics, replacing the previous ASIC dependent bit fields.
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 32 +++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 523f9d2982e9..fbbebb1da913 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -35,6 +35,38 @@
#define SMU_DPM_USER_PROFILE_RESTORE (1 << 0)
+#define INDEP_THROTTLER_PPT0_BIT 0
+#define INDEP_THROTTLER_PPT1_BIT 1
+#define INDEP_THROTTLER_PPT2_BIT 2
+#define INDEP_THROTTLER_PPT3_BIT 3
+#define INDEP_THROTTLER_TDC_GFX_BIT 4
+#define INDEP_THROTTLER_TDC_SOC_BIT 5
+#define INDEP_THROTTLER_TDC_HBM_BIT 6
+#define INDEP_THROTTLER_TEMP_GPU_BIT 7
+#define INDEP_THROTTLER_TEMP_MEM_BIT 8
+#define INDEP_THROTTLER_TEMP_EDGE_BIT 9
+#define INDEP_THROTTLER_TEMP_HOTSPOT_BIT 10
+#define INDEP_THROTTLER_TEMP_VR_GFX_BIT 11
+#define INDEP_THROTTLER_TEMP_VR_SOC_BIT 12
+#define INDEP_THROTTLER_TEMP_VR_MEM_BIT 13
+#define INDEP_THROTTLER_TEMP_LIQUID_BIT 14
+#define INDEP_THROTTLER_APCC_BIT 15
+#define INDEP_THROTTLER_PPM_BIT 16
+#define INDEP_THROTTLER_FIT_BIT 17
+#define INDEP_THROTTLER_VRHOT0_BIT 18
+#define INDEP_THROTTLER_VRHOT1_BIT 19
+#define INDEP_THROTTLER_STATUS_BIT_SPL 20
+#define INDEP_THROTTLER_STATUS_BIT_FPPT 21
+#define INDEP_THROTTLER_STATUS_BIT_SPPT 22
+#define INDEP_THROTTLER_STATUS_BIT_SPPT_APU 23
+#define INDEP_THROTTLER_STATUS_BIT_THM_CORE 24
+#define INDEP_THROTTLER_STATUS_BIT_THM_GFX 25
+#define INDEP_THROTTLER_STATUS_BIT_THM_SOC 26
+#define INDEP_THROTTLER_STATUS_BIT_TDC_VDD 27
+#define INDEP_THROTTLER_STATUS_BIT_TDC_SOC 28
+#define INDEP_THROTTLER_STATUS_BIT_TDC_GFX 29
+#define INDEP_THROTTLER_STATUS_BIT_TDC_CVIP 30
+
struct smu_hw_power_state {
unsigned int magic;
};
--
2.17.1
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* [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-20 14:29 [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
@ 2021-05-20 14:29 ` Graham Sider
2021-05-21 14:25 ` Kasiviswanathan, Harish
2021-05-21 14:27 ` Alex Deucher
2021-05-20 14:29 ` [PATCH 3/6] drm/amd/pm: Add navi1x " Graham Sider
` (4 subsequent siblings)
5 siblings, 2 replies; 16+ messages in thread
From: Graham Sider @ 2021-05-20 14:29 UTC (permalink / raw)
To: amd-gfx; +Cc: Harish.Kasiviswanathan, Graham Sider, Elena.Sakhnovitch
Perform dependent to independent throttle status translation for
arcturus.
---
.../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62 ++++++++++++++++---
1 file changed, 53 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
index 1735a96dd307..7c01c0bf2073 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
@@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
return (abs(frequency1 - frequency2) <= EPSILON);
}
+static uint32_t arcturus_get_indep_throttler_status(
+ unsigned long dep_throttler_status)
+{
+ unsigned long indep_throttler_status = 0;
+
+ __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_VRHOT1_BIT, &dep_throttler_status));
+
+ return (uint32_t)indep_throttler_status;
+}
+
static int arcturus_get_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)
@@ -629,7 +672,7 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_CURR_FANSPEED:
*value = metrics->CurrFanSpeed;
@@ -2213,13 +2256,13 @@ static const struct throttling_logging_label {
uint32_t feature_mask;
const char *label;
} logging_label[] = {
- {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
- {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
- {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
- {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
- {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
- {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
- {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
+ {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
+ {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
+ {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
+ {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
};
static void arcturus_log_thermal_throttling_event(struct smu_context *smu)
{
@@ -2314,7 +2357,8 @@ static ssize_t arcturus_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
- gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
--
2.17.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 3/6] drm/amd/pm: Add navi1x throttler translation
2021-05-20 14:29 [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
2021-05-20 14:29 ` [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation Graham Sider
@ 2021-05-20 14:29 ` Graham Sider
2021-05-20 14:29 ` [PATCH 4/6] drm/amd/pm: Add sienna cichlid " Graham Sider
` (3 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Graham Sider @ 2021-05-20 14:29 UTC (permalink / raw)
To: amd-gfx; +Cc: Harish.Kasiviswanathan, Graham Sider, Elena.Sakhnovitch
Perform dependent to independent throttle status translation for
navi1x (navi10, navi12).
---
.../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 63 ++++++++++++++++---
1 file changed, 55 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 78fe13183e8b..8d216c46d057 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -524,6 +524,49 @@ static int navi10_tables_init(struct smu_context *smu)
return -ENOMEM;
}
+static uint32_t navi1x_get_indep_throttler_status(
+ unsigned long dep_throttler_status)
+{
+ unsigned long indep_throttler_status = 0;
+
+ __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_MEM0_BIT, &dep_throttler_status) ||
+ test_bit(THROTTLER_TEMP_VR_MEM1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_LIQUID_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_LIQUID0_BIT, &dep_throttler_status) ||
+ test_bit(THROTTLER_TEMP_LIQUID1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
+
+ return (uint32_t)indep_throttler_status;
+}
+
static int navi10_get_legacy_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)
@@ -601,7 +644,7 @@ static int navi10_get_legacy_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = navi1x_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_CURR_FANSPEED:
*value = metrics->CurrFanSpeed;
@@ -696,7 +739,7 @@ static int navi10_get_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = navi1x_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_CURR_FANSPEED:
*value = metrics->CurrFanSpeed;
@@ -788,7 +831,7 @@ static int navi12_get_legacy_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = navi1x_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_CURR_FANSPEED:
*value = metrics->CurrFanSpeed;
@@ -883,7 +926,7 @@ static int navi12_get_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = navi1x_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_CURR_FANSPEED:
*value = metrics->CurrFanSpeed;
@@ -2672,7 +2715,8 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
- gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ navi1x_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2749,7 +2793,8 @@ static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
- gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ navi1x_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2825,7 +2870,8 @@ static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
- gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ navi1x_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2907,7 +2953,8 @@ static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
- gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ navi1x_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
--
2.17.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 4/6] drm/amd/pm: Add sienna cichlid throttler translation
2021-05-20 14:29 [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
2021-05-20 14:29 ` [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation Graham Sider
2021-05-20 14:29 ` [PATCH 3/6] drm/amd/pm: Add navi1x " Graham Sider
@ 2021-05-20 14:29 ` Graham Sider
2021-05-20 14:29 ` [PATCH 5/6] drm/amd/pm: Add vangogh " Graham Sider
` (2 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Graham Sider @ 2021-05-20 14:29 UTC (permalink / raw)
To: amd-gfx; +Cc: Harish.Kasiviswanathan, Graham Sider, Elena.Sakhnovitch
Perform dependent to independent throttle status translation for
sienna cichlid.
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 48 ++++++++++++++++++-
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 75acdb80c499..023b10306c3e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -453,6 +453,49 @@ static int sienna_cichlid_tables_init(struct smu_context *smu)
return -ENOMEM;
}
+static uint32_t sienna_cichlid_get_indep_throttler_status(
+ unsigned long dep_throttler_status)
+{
+ unsigned long indep_throttler_status = 0;
+
+ __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_MEM0_BIT, &dep_throttler_status) ||
+ test_bit(THROTTLER_TEMP_VR_MEM1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_LIQUID_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_LIQUID0_BIT, &dep_throttler_status) ||
+ test_bit(THROTTLER_TEMP_LIQUID1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
+
+ return (uint32_t)indep_throttler_status;
+}
+
static int sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)
@@ -542,7 +585,7 @@ static int sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = sienna_cichlid_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_CURR_FANSPEED:
*value = metrics->CurrFanSpeed;
@@ -3666,7 +3709,8 @@ static ssize_t sienna_cichlid_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk1 = metrics->CurrClock[PPCLK_VCLK_1];
gpu_metrics->current_dclk1 = metrics->CurrClock[PPCLK_DCLK_1];
- gpu_metrics->throttle_status = metrics->ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ sienna_cichlid_get_indep_throttler_status(metrics->ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics->CurrFanSpeed;
--
2.17.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 5/6] drm/amd/pm: Add vangogh throttler translation
2021-05-20 14:29 [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
` (2 preceding siblings ...)
2021-05-20 14:29 ` [PATCH 4/6] drm/amd/pm: Add sienna cichlid " Graham Sider
@ 2021-05-20 14:29 ` Graham Sider
2021-05-20 14:29 ` [PATCH 6/6] drm/amd/pm: Add aldebaran " Graham Sider
2021-05-24 6:58 ` [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Lijo Lazar
5 siblings, 0 replies; 16+ messages in thread
From: Graham Sider @ 2021-05-20 14:29 UTC (permalink / raw)
To: amd-gfx; +Cc: Harish.Kasiviswanathan, Graham Sider, Elena.Sakhnovitch
Perform dependent to independent throttle status translation for
vangogh.
---
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 41 +++++++++++++++++--
1 file changed, 37 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 77f532a49e37..6e3cfb4bda1d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -251,6 +251,37 @@ static int vangogh_tables_init(struct smu_context *smu)
return -ENOMEM;
}
+static uint32_t vangogh_get_indep_throttler_status(
+ unsigned long dep_throttler_status)
+{
+ unsigned long indep_throttler_status = 0;
+
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_SPL, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_SPL, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_FPPT, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_FPPT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_SPPT, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_SPPT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_SPPT_APU, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_SPPT_APU, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_THM_CORE, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_THM_CORE, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_THM_GFX, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_THM_GFX, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_THM_SOC, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_THM_SOC, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_TDC_VDD, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_TDC_VDD, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_TDC_SOC, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_TDC_SOC, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_TDC_GFX, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_TDC_GFX, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_STATUS_BIT_TDC_CVIP, &indep_throttler_status,
+ test_bit(THROTTLER_STATUS_BIT_TDC_CVIP, &dep_throttler_status));
+
+ return (uint32_t)indep_throttler_status;
+}
+
static int vangogh_get_legacy_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)
@@ -304,7 +335,7 @@ static int vangogh_get_legacy_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = vangogh_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_VOLTAGE_VDDGFX:
*value = metrics->Voltage[2];
@@ -379,7 +410,7 @@ static int vangogh_get_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->Current.ThrottlerStatus;
+ *value = vangogh_get_indep_throttler_status(metrics->Current.ThrottlerStatus);
break;
case METRICS_VOLTAGE_VDDGFX:
*value = metrics->Current.Voltage[2];
@@ -1673,7 +1704,8 @@ static ssize_t vangogh_get_legacy_gpu_metrics(struct smu_context *smu,
sizeof(uint16_t) * 4);
gpu_metrics->current_l3clk[0] = metrics.L3Frequency[0];
- gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ vangogh_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
@@ -1734,7 +1766,8 @@ static ssize_t vangogh_get_gpu_metrics(struct smu_context *smu,
sizeof(uint16_t) * 4);
gpu_metrics->current_l3clk[0] = metrics.Current.L3Frequency[0];
- gpu_metrics->throttle_status = metrics.Current.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ vangogh_get_indep_throttler_status(metrics.Current.ThrottlerStatus);
gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
--
2.17.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 6/6] drm/amd/pm: Add aldebaran throttler translation
2021-05-20 14:29 [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
` (3 preceding siblings ...)
2021-05-20 14:29 ` [PATCH 5/6] drm/amd/pm: Add vangogh " Graham Sider
@ 2021-05-20 14:29 ` Graham Sider
2021-05-24 6:58 ` [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Lijo Lazar
5 siblings, 0 replies; 16+ messages in thread
From: Graham Sider @ 2021-05-20 14:29 UTC (permalink / raw)
To: amd-gfx; +Cc: Harish.Kasiviswanathan, Graham Sider, Elena.Sakhnovitch
Perform dependent to independent throttle status translation for
aldebaran.
---
.../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 44 ++++++++++++++++---
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index fb744f3e17d7..1281c74980b7 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -511,6 +511,37 @@ static int aldebaran_freqs_in_same_level(int32_t frequency1,
return (abs(frequency1 - frequency2) <= EPSILON);
}
+static uint32_t aldebaran_get_indep_throttler_status(
+ unsigned long dep_throttler_status)
+{
+ unsigned long indep_throttler_status = 0;
+
+ __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_HBM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_HBM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_GPU_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_GPU_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
+
+ return (uint32_t)indep_throttler_status;
+}
+
static int aldebaran_get_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)
@@ -591,7 +622,7 @@ static int aldebaran_get_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = aldebaran_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
default:
*value = UINT_MAX;
@@ -1645,10 +1676,10 @@ static const struct throttling_logging_label {
uint32_t feature_mask;
const char *label;
} logging_label[] = {
- {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
- {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
- {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
- {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
+ {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
};
static void aldebaran_log_thermal_throttling_event(struct smu_context *smu)
{
@@ -1745,7 +1776,8 @@ static ssize_t aldebaran_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
- gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ aldebaran_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = 0;
--
2.17.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* RE: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-20 14:29 ` [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation Graham Sider
@ 2021-05-21 14:25 ` Kasiviswanathan, Harish
2021-05-21 14:27 ` Alex Deucher
1 sibling, 0 replies; 16+ messages in thread
From: Kasiviswanathan, Harish @ 2021-05-21 14:25 UTC (permalink / raw)
To: Sider, Graham, amd-gfx; +Cc: Sakhnovitch, Elena (Elen)
[AMD Official Use Only]
Hi Graham,
This patch series looks good. Please add "Signed-off-by" to all the commit messages.
One additional comment inline below.
-----Original Message-----
From: Sider, Graham <Graham.Sider@amd.com>
Sent: Thursday, May 20, 2021 10:29 AM
To: amd-gfx@lists.freedesktop.org
Cc: Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@amd.com>; Sider, Graham <Graham.Sider@amd.com>
Subject: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
Perform dependent to independent throttle status translation for
arcturus.
---
.../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62 ++++++++++++++++---
1 file changed, 53 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
index 1735a96dd307..7c01c0bf2073 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
@@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
return (abs(frequency1 - frequency2) <= EPSILON);
}
+static uint32_t arcturus_get_indep_throttler_status(
+ unsigned long dep_throttler_status)
+{
+ unsigned long indep_throttler_status = 0;
+
[HK] You can a simple optimization here. During most of the time throttler_status would be 0. So if (dep_throttler_status == 0) you could just return here. You can add this to other commits too.
+ __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_VRHOT1_BIT, &dep_throttler_status));
+
+ return (uint32_t)indep_throttler_status;
+}
+
static int arcturus_get_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)
@@ -629,7 +672,7 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_CURR_FANSPEED:
*value = metrics->CurrFanSpeed;
@@ -2213,13 +2256,13 @@ static const struct throttling_logging_label {
uint32_t feature_mask;
const char *label;
} logging_label[] = {
- {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
- {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
- {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
- {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
- {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
- {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
- {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
+ {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
+ {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
+ {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
+ {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
+ {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
};
static void arcturus_log_thermal_throttling_event(struct smu_context *smu)
{
@@ -2314,7 +2357,8 @@ static ssize_t arcturus_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
- gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
--
2.17.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-20 14:29 ` [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation Graham Sider
2021-05-21 14:25 ` Kasiviswanathan, Harish
@ 2021-05-21 14:27 ` Alex Deucher
2021-05-21 17:39 ` Sider, Graham
1 sibling, 1 reply; 16+ messages in thread
From: Alex Deucher @ 2021-05-21 14:27 UTC (permalink / raw)
To: Graham Sider; +Cc: Harish Kasiviswanathan, amd-gfx list, Elena.Sakhnovitch
General comment on the patch series, do you want to bump the metrics
table version since the meaning of the throttler status has changed?
Alex
On Thu, May 20, 2021 at 10:30 AM Graham Sider <Graham.Sider@amd.com> wrote:
>
> Perform dependent to independent throttle status translation for
> arcturus.
> ---
> .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62 ++++++++++++++++---
> 1 file changed, 53 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> index 1735a96dd307..7c01c0bf2073 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> @@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
> return (abs(frequency1 - frequency2) <= EPSILON);
> }
>
> +static uint32_t arcturus_get_indep_throttler_status(
> + unsigned long dep_throttler_status)
> +{
> + unsigned long indep_throttler_status = 0;
> +
> + __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_VRHOT1_BIT, &dep_throttler_status));
> +
> + return (uint32_t)indep_throttler_status;
> +}
> +
> static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> MetricsMember_t member,
> uint32_t *value)
> @@ -629,7 +672,7 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
> break;
> case METRICS_THROTTLER_STATUS:
> - *value = metrics->ThrottlerStatus;
> + *value = arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
> break;
> case METRICS_CURR_FANSPEED:
> *value = metrics->CurrFanSpeed;
> @@ -2213,13 +2256,13 @@ static const struct throttling_logging_label {
> uint32_t feature_mask;
> const char *label;
> } logging_label[] = {
> - {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> - {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
> - {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> - {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> - {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> - {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> - {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> + {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> + {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
> + {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> + {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> + {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> + {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> + {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> };
> static void arcturus_log_thermal_throttling_event(struct smu_context *smu)
> {
> @@ -2314,7 +2357,8 @@ static ssize_t arcturus_get_gpu_metrics(struct smu_context *smu,
> gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
> gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
>
> - gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> + gpu_metrics->throttle_status =
> + arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
>
> gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
>
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-21 14:27 ` Alex Deucher
@ 2021-05-21 17:39 ` Sider, Graham
2021-05-21 20:14 ` Alex Deucher
0 siblings, 1 reply; 16+ messages in thread
From: Sider, Graham @ 2021-05-21 17:39 UTC (permalink / raw)
To: Alex Deucher
Cc: Kasiviswanathan, Harish, amd-gfx list, Sakhnovitch, Elena (Elen)
Hi Alex,
Are you referring to bumping the gpu_metrics_vX_Y version number? Different ASICs are currently using different version numbers already, so I'm not sure how feasible this might be (e.g. arcturus == gpu_metrics_v1_1, navi1x == gpu_metrics_v1_3, vangogh == gpu_metrics_v2_1).
Technically speaking no new fields have been added to any of the gpu_metrics versions, just a change in representation in the throttle_status field. Let me know your thoughts on this.
Best,
Graham
-----Original Message-----
From: Alex Deucher <alexdeucher@gmail.com>
Sent: Friday, May 21, 2021 10:27 AM
To: Sider, Graham <Graham.Sider@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@amd.com>
Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
[CAUTION: External Email]
General comment on the patch series, do you want to bump the metrics table version since the meaning of the throttler status has changed?
Alex
On Thu, May 20, 2021 at 10:30 AM Graham Sider <Graham.Sider@amd.com> wrote:
>
> Perform dependent to independent throttle status translation for
> arcturus.
> ---
> .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62
> ++++++++++++++++---
> 1 file changed, 53 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> index 1735a96dd307..7c01c0bf2073 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> @@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
> return (abs(frequency1 - frequency2) <= EPSILON); }
>
> +static uint32_t arcturus_get_indep_throttler_status(
> + unsigned long
> +dep_throttler_status) {
> + unsigned long indep_throttler_status = 0;
> +
> + __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
> + __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
> + test_bit(THROTTLER_VRHOT1_BIT,
> + &dep_throttler_status));
> +
> + return (uint32_t)indep_throttler_status; }
> +
> static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> MetricsMember_t member,
> uint32_t *value) @@ -629,7
> +672,7 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
> break;
> case METRICS_THROTTLER_STATUS:
> - *value = metrics->ThrottlerStatus;
> + *value =
> + arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
> break;
> case METRICS_CURR_FANSPEED:
> *value = metrics->CurrFanSpeed; @@ -2213,13 +2256,13
> @@ static const struct throttling_logging_label {
> uint32_t feature_mask;
> const char *label;
> } logging_label[] = {
> - {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> - {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
> - {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> - {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> - {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> - {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> - {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> + {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> + {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
> + {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> + {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> + {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> + {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> + {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> };
> static void arcturus_log_thermal_throttling_event(struct smu_context
> *smu) { @@ -2314,7 +2357,8 @@ static ssize_t
> arcturus_get_gpu_metrics(struct smu_context *smu,
> gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
> gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
>
> - gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> + gpu_metrics->throttle_status =
> +
> + arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
>
> gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
>
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7CGr
> aham.Sider%40amd.com%7Ca3ca9a6b0576479e545808d91c648f50%7C3dd8961fe488
> 4e608e11a82d994e183d%7C0%7C0%7C637572040495495758%7CUnknown%7CTWFpbGZs
> b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
> %7C1000&sdata=YxUx7BrsQKBauKE3fHpNrkWMAG4dBy11fV9xnJdMHns%3D&r
> eserved=0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-21 17:39 ` Sider, Graham
@ 2021-05-21 20:14 ` Alex Deucher
2021-05-21 21:32 ` Sider, Graham
0 siblings, 1 reply; 16+ messages in thread
From: Alex Deucher @ 2021-05-21 20:14 UTC (permalink / raw)
To: Sider, Graham
Cc: Kasiviswanathan, Harish, amd-gfx list, Sakhnovitch, Elena (Elen)
On Fri, May 21, 2021 at 1:39 PM Sider, Graham <Graham.Sider@amd.com> wrote:
>
> Hi Alex,
>
> Are you referring to bumping the gpu_metrics_vX_Y version number? Different ASICs are currently using different version numbers already, so I'm not sure how feasible this might be (e.g. arcturus == gpu_metrics_v1_1, navi1x == gpu_metrics_v1_3, vangogh == gpu_metrics_v2_1).
>
> Technically speaking no new fields have been added to any of the gpu_metrics versions, just a change in representation in the throttle_status field. Let me know your thoughts on this.
>
I don't know if we have any existing tools out there that parse this
data, but if so, they would interpret it incorrectly after this
change. If we bump the version, at least the tools will know how to
handle it.
Alex
> Best,
> Graham
>
> -----Original Message-----
> From: Alex Deucher <alexdeucher@gmail.com>
> Sent: Friday, May 21, 2021 10:27 AM
> To: Sider, Graham <Graham.Sider@amd.com>
> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@amd.com>
> Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
>
> [CAUTION: External Email]
>
> General comment on the patch series, do you want to bump the metrics table version since the meaning of the throttler status has changed?
>
> Alex
>
> On Thu, May 20, 2021 at 10:30 AM Graham Sider <Graham.Sider@amd.com> wrote:
> >
> > Perform dependent to independent throttle status translation for
> > arcturus.
> > ---
> > .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62
> > ++++++++++++++++---
> > 1 file changed, 53 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > index 1735a96dd307..7c01c0bf2073 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > @@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
> > return (abs(frequency1 - frequency2) <= EPSILON); }
> >
> > +static uint32_t arcturus_get_indep_throttler_status(
> > + unsigned long
> > +dep_throttler_status) {
> > + unsigned long indep_throttler_status = 0;
> > +
> > + __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_VRHOT1_BIT,
> > + &dep_throttler_status));
> > +
> > + return (uint32_t)indep_throttler_status; }
> > +
> > static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> > MetricsMember_t member,
> > uint32_t *value) @@ -629,7
> > +672,7 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> > SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
> > break;
> > case METRICS_THROTTLER_STATUS:
> > - *value = metrics->ThrottlerStatus;
> > + *value =
> > + arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
> > break;
> > case METRICS_CURR_FANSPEED:
> > *value = metrics->CurrFanSpeed; @@ -2213,13 +2256,13
> > @@ static const struct throttling_logging_label {
> > uint32_t feature_mask;
> > const char *label;
> > } logging_label[] = {
> > - {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > - {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
> > - {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > - {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > - {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > - {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > - {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > + {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > + {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
> > + {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > + {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > + {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > + {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > + {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > };
> > static void arcturus_log_thermal_throttling_event(struct smu_context
> > *smu) { @@ -2314,7 +2357,8 @@ static ssize_t
> > arcturus_get_gpu_metrics(struct smu_context *smu,
> > gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
> > gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
> >
> > - gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> > + gpu_metrics->throttle_status =
> > +
> > + arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
> >
> > gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
> >
> > --
> > 2.17.1
> >
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> > s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7CGr
> > aham.Sider%40amd.com%7Ca3ca9a6b0576479e545808d91c648f50%7C3dd8961fe488
> > 4e608e11a82d994e183d%7C0%7C0%7C637572040495495758%7CUnknown%7CTWFpbGZs
> > b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
> > %7C1000&sdata=YxUx7BrsQKBauKE3fHpNrkWMAG4dBy11fV9xnJdMHns%3D&r
> > eserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-21 20:14 ` Alex Deucher
@ 2021-05-21 21:32 ` Sider, Graham
2021-05-21 21:47 ` Alex Deucher
0 siblings, 1 reply; 16+ messages in thread
From: Sider, Graham @ 2021-05-21 21:32 UTC (permalink / raw)
To: Alex Deucher
Cc: Kasiviswanathan, Harish, amd-gfx list, Sakhnovitch, Elena (Elen)
Would this be referring to tools that may parse /sys/class/.../device/gpu_metrics or the actual gpu_metrics_vX_Y structs? For the latter, if there are tools that parse dependent on version vX_Y, I agree that we would not want to break those.
Since most ASICs are using different version currently, we would have to create a duplicate struct for each gpu_metrics version currently being used, unless I'm misunderstanding. I'm not sure if this is what you had in mind - let me know.
Best,
Graham
-----Original Message-----
From: Alex Deucher <alexdeucher@gmail.com>
Sent: Friday, May 21, 2021 4:15 PM
To: Sider, Graham <Graham.Sider@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@amd.com>
Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
[CAUTION: External Email]
On Fri, May 21, 2021 at 1:39 PM Sider, Graham <Graham.Sider@amd.com> wrote:
>
> Hi Alex,
>
> Are you referring to bumping the gpu_metrics_vX_Y version number? Different ASICs are currently using different version numbers already, so I'm not sure how feasible this might be (e.g. arcturus == gpu_metrics_v1_1, navi1x == gpu_metrics_v1_3, vangogh == gpu_metrics_v2_1).
>
> Technically speaking no new fields have been added to any of the gpu_metrics versions, just a change in representation in the throttle_status field. Let me know your thoughts on this.
>
I don't know if we have any existing tools out there that parse this data, but if so, they would interpret it incorrectly after this change. If we bump the version, at least the tools will know how to handle it.
Alex
> Best,
> Graham
>
> -----Original Message-----
> From: Alex Deucher <alexdeucher@gmail.com>
> Sent: Friday, May 21, 2021 10:27 AM
> To: Sider, Graham <Graham.Sider@amd.com>
> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan,
> Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen)
> <Elena.Sakhnovitch@amd.com>
> Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler
> translation
>
> [CAUTION: External Email]
>
> General comment on the patch series, do you want to bump the metrics table version since the meaning of the throttler status has changed?
>
> Alex
>
> On Thu, May 20, 2021 at 10:30 AM Graham Sider <Graham.Sider@amd.com> wrote:
> >
> > Perform dependent to independent throttle status translation for
> > arcturus.
> > ---
> > .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62
> > ++++++++++++++++---
> > 1 file changed, 53 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > index 1735a96dd307..7c01c0bf2073 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > @@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
> > return (abs(frequency1 - frequency2) <= EPSILON); }
> >
> > +static uint32_t arcturus_get_indep_throttler_status(
> > + unsigned long
> > +dep_throttler_status) {
> > + unsigned long indep_throttler_status = 0;
> > +
> > + __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
> > + __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
> > + test_bit(THROTTLER_VRHOT1_BIT,
> > + &dep_throttler_status));
> > +
> > + return (uint32_t)indep_throttler_status; }
> > +
> > static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> > MetricsMember_t member,
> > uint32_t *value) @@ -629,7
> > +672,7 @@ static int arcturus_get_smu_metrics_data(struct
> > +smu_context *smu,
> > SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
> > break;
> > case METRICS_THROTTLER_STATUS:
> > - *value = metrics->ThrottlerStatus;
> > + *value =
> > + arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
> > break;
> > case METRICS_CURR_FANSPEED:
> > *value = metrics->CurrFanSpeed; @@ -2213,13 +2256,13
> > @@ static const struct throttling_logging_label {
> > uint32_t feature_mask;
> > const char *label;
> > } logging_label[] = {
> > - {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > - {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
> > - {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > - {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > - {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > - {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > - {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > + {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > + {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
> > + {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > + {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > + {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > + {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > + {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > };
> > static void arcturus_log_thermal_throttling_event(struct
> > smu_context
> > *smu) { @@ -2314,7 +2357,8 @@ static ssize_t
> > arcturus_get_gpu_metrics(struct smu_context *smu,
> > gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
> > gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
> >
> > - gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> > + gpu_metrics->throttle_status =
> > +
> > + arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
> >
> > gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
> >
> > --
> > 2.17.1
> >
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fli
> > st
> > s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7C
> > Gr
> > aham.Sider%40amd.com%7Ca3ca9a6b0576479e545808d91c648f50%7C3dd8961fe4
> > 88
> > 4e608e11a82d994e183d%7C0%7C0%7C637572040495495758%7CUnknown%7CTWFpbG
> > Zs
> > b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
> > 3D
> > %7C1000&sdata=YxUx7BrsQKBauKE3fHpNrkWMAG4dBy11fV9xnJdMHns%3D&
> > ;r
> > eserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-21 21:32 ` Sider, Graham
@ 2021-05-21 21:47 ` Alex Deucher
2021-05-21 21:49 ` Alex Deucher
0 siblings, 1 reply; 16+ messages in thread
From: Alex Deucher @ 2021-05-21 21:47 UTC (permalink / raw)
To: Sider, Graham
Cc: Kasiviswanathan, Harish, amd-gfx list, Sakhnovitch, Elena (Elen)
On Fri, May 21, 2021 at 5:32 PM Sider, Graham <Graham.Sider@amd.com> wrote:
>
> Would this be referring to tools that may parse /sys/class/.../device/gpu_metrics or the actual gpu_metrics_vX_Y structs? For the latter, if there are tools that parse dependent on version vX_Y, I agree that we would not want to break those.
>
> Since most ASICs are using different version currently, we would have to create a duplicate struct for each gpu_metrics version currently being used, unless I'm misunderstanding. I'm not sure if this is what you had in mind - let me know.
>
Just update them all to the latest version. The newer ones are just
supersets of the previous versions. I think a newer revision just
went in in the last day or two for some additional new data, you can
probably just piggy back on that since the code is not upstream yet.
Alex
> Best,
> Graham
>
> -----Original Message-----
> From: Alex Deucher <alexdeucher@gmail.com>
> Sent: Friday, May 21, 2021 4:15 PM
> To: Sider, Graham <Graham.Sider@amd.com>
> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@amd.com>
> Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
>
> [CAUTION: External Email]
>
> On Fri, May 21, 2021 at 1:39 PM Sider, Graham <Graham.Sider@amd.com> wrote:
> >
> > Hi Alex,
> >
> > Are you referring to bumping the gpu_metrics_vX_Y version number? Different ASICs are currently using different version numbers already, so I'm not sure how feasible this might be (e.g. arcturus == gpu_metrics_v1_1, navi1x == gpu_metrics_v1_3, vangogh == gpu_metrics_v2_1).
> >
> > Technically speaking no new fields have been added to any of the gpu_metrics versions, just a change in representation in the throttle_status field. Let me know your thoughts on this.
> >
>
> I don't know if we have any existing tools out there that parse this data, but if so, they would interpret it incorrectly after this change. If we bump the version, at least the tools will know how to handle it.
>
> Alex
>
>
> > Best,
> > Graham
> >
> > -----Original Message-----
> > From: Alex Deucher <alexdeucher@gmail.com>
> > Sent: Friday, May 21, 2021 10:27 AM
> > To: Sider, Graham <Graham.Sider@amd.com>
> > Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan,
> > Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen)
> > <Elena.Sakhnovitch@amd.com>
> > Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler
> > translation
> >
> > [CAUTION: External Email]
> >
> > General comment on the patch series, do you want to bump the metrics table version since the meaning of the throttler status has changed?
> >
> > Alex
> >
> > On Thu, May 20, 2021 at 10:30 AM Graham Sider <Graham.Sider@amd.com> wrote:
> > >
> > > Perform dependent to independent throttle status translation for
> > > arcturus.
> > > ---
> > > .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62
> > > ++++++++++++++++---
> > > 1 file changed, 53 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > index 1735a96dd307..7c01c0bf2073 100644
> > > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > @@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
> > > return (abs(frequency1 - frequency2) <= EPSILON); }
> > >
> > > +static uint32_t arcturus_get_indep_throttler_status(
> > > + unsigned long
> > > +dep_throttler_status) {
> > > + unsigned long indep_throttler_status = 0;
> > > +
> > > + __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
> > > + __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
> > > + test_bit(THROTTLER_VRHOT1_BIT,
> > > + &dep_throttler_status));
> > > +
> > > + return (uint32_t)indep_throttler_status; }
> > > +
> > > static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> > > MetricsMember_t member,
> > > uint32_t *value) @@ -629,7
> > > +672,7 @@ static int arcturus_get_smu_metrics_data(struct
> > > +smu_context *smu,
> > > SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
> > > break;
> > > case METRICS_THROTTLER_STATUS:
> > > - *value = metrics->ThrottlerStatus;
> > > + *value =
> > > + arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
> > > break;
> > > case METRICS_CURR_FANSPEED:
> > > *value = metrics->CurrFanSpeed; @@ -2213,13 +2256,13
> > > @@ static const struct throttling_logging_label {
> > > uint32_t feature_mask;
> > > const char *label;
> > > } logging_label[] = {
> > > - {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > > - {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
> > > - {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > > - {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > > - {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > > - {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > > - {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > > + {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > > + {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
> > > + {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > > + {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > > + {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > > + {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > > + {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > > };
> > > static void arcturus_log_thermal_throttling_event(struct
> > > smu_context
> > > *smu) { @@ -2314,7 +2357,8 @@ static ssize_t
> > > arcturus_get_gpu_metrics(struct smu_context *smu,
> > > gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
> > > gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
> > >
> > > - gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> > > + gpu_metrics->throttle_status =
> > > +
> > > + arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
> > >
> > > gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
> > >
> > > --
> > > 2.17.1
> > >
> > > _______________________________________________
> > > amd-gfx mailing list
> > > amd-gfx@lists.freedesktop.org
> > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fli
> > > st
> > > s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7C
> > > Gr
> > > aham.Sider%40amd.com%7Ca3ca9a6b0576479e545808d91c648f50%7C3dd8961fe4
> > > 88
> > > 4e608e11a82d994e183d%7C0%7C0%7C637572040495495758%7CUnknown%7CTWFpbG
> > > Zs
> > > b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
> > > 3D
> > > %7C1000&sdata=YxUx7BrsQKBauKE3fHpNrkWMAG4dBy11fV9xnJdMHns%3D&
> > > ;r
> > > eserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-21 21:47 ` Alex Deucher
@ 2021-05-21 21:49 ` Alex Deucher
2021-05-21 22:04 ` Sider, Graham
0 siblings, 1 reply; 16+ messages in thread
From: Alex Deucher @ 2021-05-21 21:49 UTC (permalink / raw)
To: Sider, Graham
Cc: Kasiviswanathan, Harish, amd-gfx list, Sakhnovitch, Elena (Elen)
On Fri, May 21, 2021 at 5:47 PM Alex Deucher <alexdeucher@gmail.com> wrote:
>
> On Fri, May 21, 2021 at 5:32 PM Sider, Graham <Graham.Sider@amd.com> wrote:
> >
> > Would this be referring to tools that may parse /sys/class/.../device/gpu_metrics or the actual gpu_metrics_vX_Y structs? For the latter, if there are tools that parse dependent on version vX_Y, I agree that we would not want to break those.
> >
> > Since most ASICs are using different version currently, we would have to create a duplicate struct for each gpu_metrics version currently being used, unless I'm misunderstanding. I'm not sure if this is what you had in mind - let me know.
> >
>
> Just update them all to the latest version. The newer ones are just
> supersets of the previous versions. I think a newer revision just
> went in in the last day or two for some additional new data, you can
> probably just piggy back on that since the code is not upstream yet.
Another option would be to leave the current throttle status as is,
and add a new one that provides the standardized format. Not sure if
there is much value in having both though. That said, we could
increase the size of the new one to 64 bits to accommodate future
throttle status bits.
Alex
>
> Alex
>
>
> > Best,
> > Graham
> >
> > -----Original Message-----
> > From: Alex Deucher <alexdeucher@gmail.com>
> > Sent: Friday, May 21, 2021 4:15 PM
> > To: Sider, Graham <Graham.Sider@amd.com>
> > Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@amd.com>
> > Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
> >
> > [CAUTION: External Email]
> >
> > On Fri, May 21, 2021 at 1:39 PM Sider, Graham <Graham.Sider@amd.com> wrote:
> > >
> > > Hi Alex,
> > >
> > > Are you referring to bumping the gpu_metrics_vX_Y version number? Different ASICs are currently using different version numbers already, so I'm not sure how feasible this might be (e.g. arcturus == gpu_metrics_v1_1, navi1x == gpu_metrics_v1_3, vangogh == gpu_metrics_v2_1).
> > >
> > > Technically speaking no new fields have been added to any of the gpu_metrics versions, just a change in representation in the throttle_status field. Let me know your thoughts on this.
> > >
> >
> > I don't know if we have any existing tools out there that parse this data, but if so, they would interpret it incorrectly after this change. If we bump the version, at least the tools will know how to handle it.
> >
> > Alex
> >
> >
> > > Best,
> > > Graham
> > >
> > > -----Original Message-----
> > > From: Alex Deucher <alexdeucher@gmail.com>
> > > Sent: Friday, May 21, 2021 10:27 AM
> > > To: Sider, Graham <Graham.Sider@amd.com>
> > > Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan,
> > > Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen)
> > > <Elena.Sakhnovitch@amd.com>
> > > Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler
> > > translation
> > >
> > > [CAUTION: External Email]
> > >
> > > General comment on the patch series, do you want to bump the metrics table version since the meaning of the throttler status has changed?
> > >
> > > Alex
> > >
> > > On Thu, May 20, 2021 at 10:30 AM Graham Sider <Graham.Sider@amd.com> wrote:
> > > >
> > > > Perform dependent to independent throttle status translation for
> > > > arcturus.
> > > > ---
> > > > .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62
> > > > ++++++++++++++++---
> > > > 1 file changed, 53 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > > b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > > index 1735a96dd307..7c01c0bf2073 100644
> > > > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > > @@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
> > > > return (abs(frequency1 - frequency2) <= EPSILON); }
> > > >
> > > > +static uint32_t arcturus_get_indep_throttler_status(
> > > > + unsigned long
> > > > +dep_throttler_status) {
> > > > + unsigned long indep_throttler_status = 0;
> > > > +
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_VRHOT1_BIT,
> > > > + &dep_throttler_status));
> > > > +
> > > > + return (uint32_t)indep_throttler_status; }
> > > > +
> > > > static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> > > > MetricsMember_t member,
> > > > uint32_t *value) @@ -629,7
> > > > +672,7 @@ static int arcturus_get_smu_metrics_data(struct
> > > > +smu_context *smu,
> > > > SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
> > > > break;
> > > > case METRICS_THROTTLER_STATUS:
> > > > - *value = metrics->ThrottlerStatus;
> > > > + *value =
> > > > + arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
> > > > break;
> > > > case METRICS_CURR_FANSPEED:
> > > > *value = metrics->CurrFanSpeed; @@ -2213,13 +2256,13
> > > > @@ static const struct throttling_logging_label {
> > > > uint32_t feature_mask;
> > > > const char *label;
> > > > } logging_label[] = {
> > > > - {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > > > - {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
> > > > - {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > > > - {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > > > - {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > > > - {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > > > - {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > > > + {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > > > + {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > > > };
> > > > static void arcturus_log_thermal_throttling_event(struct
> > > > smu_context
> > > > *smu) { @@ -2314,7 +2357,8 @@ static ssize_t
> > > > arcturus_get_gpu_metrics(struct smu_context *smu,
> > > > gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
> > > > gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
> > > >
> > > > - gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> > > > + gpu_metrics->throttle_status =
> > > > +
> > > > + arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
> > > >
> > > > gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
> > > >
> > > > --
> > > > 2.17.1
> > > >
> > > > _______________________________________________
> > > > amd-gfx mailing list
> > > > amd-gfx@lists.freedesktop.org
> > > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fli
> > > > st
> > > > s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7C
> > > > Gr
> > > > aham.Sider%40amd.com%7Ca3ca9a6b0576479e545808d91c648f50%7C3dd8961fe4
> > > > 88
> > > > 4e608e11a82d994e183d%7C0%7C0%7C637572040495495758%7CUnknown%7CTWFpbG
> > > > Zs
> > > > b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
> > > > 3D
> > > > %7C1000&sdata=YxUx7BrsQKBauKE3fHpNrkWMAG4dBy11fV9xnJdMHns%3D&
> > > > ;r
> > > > eserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
2021-05-21 21:49 ` Alex Deucher
@ 2021-05-21 22:04 ` Sider, Graham
0 siblings, 0 replies; 16+ messages in thread
From: Sider, Graham @ 2021-05-21 22:04 UTC (permalink / raw)
To: Alex Deucher
Cc: Kasiviswanathan, Harish, amd-gfx list, Sakhnovitch, Elena (Elen)
Right, that all makes sense. I'm fine with either of these options. Thanks for the insights -- I'll give this a bit more thought and get back to you.
Best,
Graham
-----Original Message-----
From: Alex Deucher <alexdeucher@gmail.com>
Sent: Friday, May 21, 2021 5:50 PM
To: Sider, Graham <Graham.Sider@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@amd.com>
Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation
[CAUTION: External Email]
On Fri, May 21, 2021 at 5:47 PM Alex Deucher <alexdeucher@gmail.com> wrote:
>
> On Fri, May 21, 2021 at 5:32 PM Sider, Graham <Graham.Sider@amd.com> wrote:
> >
> > Would this be referring to tools that may parse /sys/class/.../device/gpu_metrics or the actual gpu_metrics_vX_Y structs? For the latter, if there are tools that parse dependent on version vX_Y, I agree that we would not want to break those.
> >
> > Since most ASICs are using different version currently, we would have to create a duplicate struct for each gpu_metrics version currently being used, unless I'm misunderstanding. I'm not sure if this is what you had in mind - let me know.
> >
>
> Just update them all to the latest version. The newer ones are just
> supersets of the previous versions. I think a newer revision just
> went in in the last day or two for some additional new data, you can
> probably just piggy back on that since the code is not upstream yet.
Another option would be to leave the current throttle status as is, and add a new one that provides the standardized format. Not sure if there is much value in having both though. That said, we could increase the size of the new one to 64 bits to accommodate future throttle status bits.
Alex
>
> Alex
>
>
> > Best,
> > Graham
> >
> > -----Original Message-----
> > From: Alex Deucher <alexdeucher@gmail.com>
> > Sent: Friday, May 21, 2021 4:15 PM
> > To: Sider, Graham <Graham.Sider@amd.com>
> > Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan,
> > Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen)
> > <Elena.Sakhnovitch@amd.com>
> > Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler
> > translation
> >
> > [CAUTION: External Email]
> >
> > On Fri, May 21, 2021 at 1:39 PM Sider, Graham <Graham.Sider@amd.com> wrote:
> > >
> > > Hi Alex,
> > >
> > > Are you referring to bumping the gpu_metrics_vX_Y version number? Different ASICs are currently using different version numbers already, so I'm not sure how feasible this might be (e.g. arcturus == gpu_metrics_v1_1, navi1x == gpu_metrics_v1_3, vangogh == gpu_metrics_v2_1).
> > >
> > > Technically speaking no new fields have been added to any of the gpu_metrics versions, just a change in representation in the throttle_status field. Let me know your thoughts on this.
> > >
> >
> > I don't know if we have any existing tools out there that parse this data, but if so, they would interpret it incorrectly after this change. If we bump the version, at least the tools will know how to handle it.
> >
> > Alex
> >
> >
> > > Best,
> > > Graham
> > >
> > > -----Original Message-----
> > > From: Alex Deucher <alexdeucher@gmail.com>
> > > Sent: Friday, May 21, 2021 10:27 AM
> > > To: Sider, Graham <Graham.Sider@amd.com>
> > > Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Kasiviswanathan,
> > > Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen)
> > > <Elena.Sakhnovitch@amd.com>
> > > Subject: Re: [PATCH 2/6] drm/amd/pm: Add arcturus throttler
> > > translation
> > >
> > > [CAUTION: External Email]
> > >
> > > General comment on the patch series, do you want to bump the metrics table version since the meaning of the throttler status has changed?
> > >
> > > Alex
> > >
> > > On Thu, May 20, 2021 at 10:30 AM Graham Sider <Graham.Sider@amd.com> wrote:
> > > >
> > > > Perform dependent to independent throttle status translation for
> > > > arcturus.
> > > > ---
> > > > .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 62
> > > > ++++++++++++++++---
> > > > 1 file changed, 53 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > > b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > > index 1735a96dd307..7c01c0bf2073 100644
> > > > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > > > @@ -540,6 +540,49 @@ static int arcturus_freqs_in_same_level(int32_t frequency1,
> > > > return (abs(frequency1 - frequency2) <= EPSILON); }
> > > >
> > > > +static uint32_t arcturus_get_indep_throttler_status(
> > > > + unsigned long
> > > > +dep_throttler_status) {
> > > > + unsigned long indep_throttler_status = 0;
> > > > +
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_VR_MEM_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_VRHOT0_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_VRHOT0_BIT, &dep_throttler_status));
> > > > + __assign_bit(INDEP_THROTTLER_VRHOT1_BIT, &indep_throttler_status,
> > > > + test_bit(THROTTLER_VRHOT1_BIT,
> > > > + &dep_throttler_status));
> > > > +
> > > > + return (uint32_t)indep_throttler_status; }
> > > > +
> > > > static int arcturus_get_smu_metrics_data(struct smu_context *smu,
> > > > MetricsMember_t member,
> > > > uint32_t *value) @@
> > > > -629,7
> > > > +672,7 @@ static int arcturus_get_smu_metrics_data(struct
> > > > +smu_context *smu,
> > > > SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
> > > > break;
> > > > case METRICS_THROTTLER_STATUS:
> > > > - *value = metrics->ThrottlerStatus;
> > > > + *value =
> > > > + arcturus_get_indep_throttler_status(metrics->ThrottlerStatus);
> > > > break;
> > > > case METRICS_CURR_FANSPEED:
> > > > *value = metrics->CurrFanSpeed; @@ -2213,13
> > > > +2256,13 @@ static const struct throttling_logging_label {
> > > > uint32_t feature_mask;
> > > > const char *label;
> > > > } logging_label[] = {
> > > > - {(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > > > - {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
> > > > - {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > > > - {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > > > - {(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > > > - {(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > > > - {(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_MEM_BIT), "HBM"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
> > > > + {(1U << INDEP_THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
> > > > + {(1U << INDEP_THROTTLER_VRHOT0_BIT), "VR0 HOT"},
> > > > + {(1U << INDEP_THROTTLER_VRHOT1_BIT), "VR1 HOT"},
> > > > };
> > > > static void arcturus_log_thermal_throttling_event(struct
> > > > smu_context
> > > > *smu) { @@ -2314,7 +2357,8 @@ static ssize_t
> > > > arcturus_get_gpu_metrics(struct smu_context *smu,
> > > > gpu_metrics->current_vclk0 = metrics.CurrClock[PPCLK_VCLK];
> > > > gpu_metrics->current_dclk0 =
> > > > metrics.CurrClock[PPCLK_DCLK];
> > > >
> > > > - gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> > > > + gpu_metrics->throttle_status =
> > > > +
> > > > + arcturus_get_indep_throttler_status(metrics.ThrottlerStatus);
> > > >
> > > > gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
> > > >
> > > > --
> > > > 2.17.1
> > > >
> > > > _______________________________________________
> > > > amd-gfx mailing list
> > > > amd-gfx@lists.freedesktop.org
> > > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%
> > > > 2Fli
> > > > st
> > > > s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C0
> > > > 1%7C
> > > > Gr
> > > > aham.Sider%40amd.com%7Ca3ca9a6b0576479e545808d91c648f50%7C3dd896
> > > > 1fe4
> > > > 88
> > > > 4e608e11a82d994e183d%7C0%7C0%7C637572040495495758%7CUnknown%7CTW
> > > > FpbG
> > > > Zs
> > > > b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6
> > > > Mn0%
> > > > 3D
> > > > %7C1000&sdata=YxUx7BrsQKBauKE3fHpNrkWMAG4dBy11fV9xnJdMHns%3D
> > > > &
> > > > ;r
> > > > eserved=0
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits
2021-05-20 14:29 [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
` (4 preceding siblings ...)
2021-05-20 14:29 ` [PATCH 6/6] drm/amd/pm: Add aldebaran " Graham Sider
@ 2021-05-24 6:58 ` Lijo Lazar
2021-05-25 16:09 ` Sider, Graham
5 siblings, 1 reply; 16+ messages in thread
From: Lijo Lazar @ 2021-05-24 6:58 UTC (permalink / raw)
To: Graham Sider, amd-gfx; +Cc: Harish.Kasiviswanathan, Elena.Sakhnovitch
There are duplicates in this list. It's better to classify as
Power/Temperature/Current/Others and map; maybe, allocate 16 bit each in
a 64-bit mask. Also, keep the naming consistent and start with "SMU_",
that's what we do for others like SMU messages.
Power throttlers
-----------------
#define SMU_THROTTLER_PPT1_BIT
#define SMU_THROTTLER_PPT0_BIT
#define SMU_THROTTLER_PPT2_BIT
#define SMU_THROTTLER_PPT3_BIT
#define SMU_THROTTLER_SPL_BIT
#define SMU_THROTTLER_FPPT_BIT
#define SMU_THROTTLER_SPPT_BIT
#define SMU_THROTTLER_SPPT_APU_BIT
Current Throttlers
-------------------
#define SMU_THROTTLER_TDC_GFX_BIT
#define SMU_THROTTLER_TDC_VDD_BIT
#define SMU_THROTTLER_TDC_SOC_BIT
#define SMU_THROTTLER_TDC_MEM_BIT => Should be the one used for HBM as well
#define SMU_THROTTLER_TDC_CVIP_BIT
#define SMU_THROTTLER_APCC_BIT
Temperature
------------
#define SMU_THROTTLER_TEMP_GPU_BIT
#define SMU_THROTTLER_TEMP_CORE_BIT
#define SMU_THROTTLER_TEMP_MEM_BIT
#define SMU_THROTTLER_TEMP_EDGE_BIT
#define SMU_THROTTLER_TEMP_HOTSPOT_BIT
#define SMU_THROTTLER_TEMP_VR_GFX_BIT
#define SMU_THROTTLER_TEMP_VR_SOC_BIT
#define SMU_THROTTLER_TEMP_VR_MEM_BIT
#define SMU_THROTTLER_VRHOT0_BIT
#define SMU_THROTTLER_VRHOT1_BIT
#define SMU_THROTTLER_TEMP_LIQUID_BIT
Others
-------
#define SMU_THROTTLER_PPM_BIT
#define SMU_THROTTLER_FIT_BIT
--
Thanks,
Lijo
On 5/20/2021 7:59 PM, Graham Sider wrote:
> Add new defines for thermal throttle status bits which are ASIC
> independent. This bit field will be visible to userspace via
> gpu_metrics, replacing the previous ASIC dependent bit fields.
> ---
> drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 32 +++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> index 523f9d2982e9..fbbebb1da913 100644
> --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> @@ -35,6 +35,38 @@
>
> #define SMU_DPM_USER_PROFILE_RESTORE (1 << 0)
>
> +#define INDEP_THROTTLER_PPT0_BIT 0
> +#define INDEP_THROTTLER_PPT1_BIT 1
> +#define INDEP_THROTTLER_PPT2_BIT 2
> +#define INDEP_THROTTLER_PPT3_BIT 3
> +#define INDEP_THROTTLER_TDC_GFX_BIT 4
> +#define INDEP_THROTTLER_TDC_SOC_BIT 5
> +#define INDEP_THROTTLER_TDC_HBM_BIT 6
> +#define INDEP_THROTTLER_TEMP_GPU_BIT 7
> +#define INDEP_THROTTLER_TEMP_MEM_BIT 8
> +#define INDEP_THROTTLER_TEMP_EDGE_BIT 9
> +#define INDEP_THROTTLER_TEMP_HOTSPOT_BIT 10
> +#define INDEP_THROTTLER_TEMP_VR_GFX_BIT 11
> +#define INDEP_THROTTLER_TEMP_VR_SOC_BIT 12
> +#define INDEP_THROTTLER_TEMP_VR_MEM_BIT 13
> +#define INDEP_THROTTLER_TEMP_LIQUID_BIT 14
> +#define INDEP_THROTTLER_APCC_BIT 15
> +#define INDEP_THROTTLER_PPM_BIT 16
> +#define INDEP_THROTTLER_FIT_BIT 17
> +#define INDEP_THROTTLER_VRHOT0_BIT 18
> +#define INDEP_THROTTLER_VRHOT1_BIT 19
> +#define INDEP_THROTTLER_STATUS_BIT_SPL 20
> +#define INDEP_THROTTLER_STATUS_BIT_FPPT 21
> +#define INDEP_THROTTLER_STATUS_BIT_SPPT 22
> +#define INDEP_THROTTLER_STATUS_BIT_SPPT_APU 23
> +#define INDEP_THROTTLER_STATUS_BIT_THM_CORE 24
> +#define INDEP_THROTTLER_STATUS_BIT_THM_GFX 25
> +#define INDEP_THROTTLER_STATUS_BIT_THM_SOC 26
> +#define INDEP_THROTTLER_STATUS_BIT_TDC_VDD 27
> +#define INDEP_THROTTLER_STATUS_BIT_TDC_SOC 28
> +#define INDEP_THROTTLER_STATUS_BIT_TDC_GFX 29
> +#define INDEP_THROTTLER_STATUS_BIT_TDC_CVIP 30
> +
> struct smu_hw_power_state {
> unsigned int magic;
> };
>
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^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits
2021-05-24 6:58 ` [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Lijo Lazar
@ 2021-05-25 16:09 ` Sider, Graham
0 siblings, 0 replies; 16+ messages in thread
From: Sider, Graham @ 2021-05-25 16:09 UTC (permalink / raw)
To: Lazar, Lijo, amd-gfx; +Cc: Kasiviswanathan, Harish, Sakhnovitch, Elena (Elen)
Most of these changes are due to Van Gogh having a different naming scheme than the rest. Just to confirm, let me know if this translation is what you're referring to with the below defines for Van Gogh:
THROTTLER_STATUS_BIT_SPL -> SMU_THROTTLER_SPL_BIT
THROTTLER_STATUS_BIT_FPPT -> SMU_THROTTLER_FPPT_BIT
THROTTER_STATUS_BIT_SPPT -> SMU_THROTTLER_SPPT_BIT
THROTTLER_STATUS_BIT_SPPT_APU -> SMU_THROTTLER_SPPT_APU_BIT
THROTTLER_STATUS_BIT_THM_CORE -> SMU_THROTTLER_TEMP_CORE_BIT
THROTTLER_STATUS_BIT_THM_GFX -> SMU_THROTTLER_TEMP_VR_GFX_BIT
THROTTLER_STATUS_BIT_THM_SOC -> SMU_THROTTLER_TEMP_VR_SOC_BIT
THROTTLER_STATUS_BIT_TDC_VDD -> SMU_THROTTLER_TDC_VDD_BIT
THROTTLER_STATUS_BIT_TDC_SOC -> SMU_THROTTLER_TDC_SOC_BIT
THROTTLER_STATUS_BIT_TDC_GFX -> SMU_THROTTLER_TDC_GFX_BIT
THROTTLER_STATUS_BIT_TDC_CVIP -> SMU_THROTTLER_TDC_CVIP_BIT
Graham
-----Original Message-----
From: Lazar, Lijo <Lijo.Lazar@amd.com>
Sent: Monday, May 24, 2021 2:58 AM
To: Sider, Graham <Graham.Sider@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@amd.com>
Subject: Re: [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits
There are duplicates in this list. It's better to classify as Power/Temperature/Current/Others and map; maybe, allocate 16 bit each in a 64-bit mask. Also, keep the naming consistent and start with "SMU_", that's what we do for others like SMU messages.
Power throttlers
-----------------
#define SMU_THROTTLER_PPT1_BIT
#define SMU_THROTTLER_PPT0_BIT
#define SMU_THROTTLER_PPT2_BIT
#define SMU_THROTTLER_PPT3_BIT
#define SMU_THROTTLER_SPL_BIT
#define SMU_THROTTLER_FPPT_BIT
#define SMU_THROTTLER_SPPT_BIT
#define SMU_THROTTLER_SPPT_APU_BIT
Current Throttlers
-------------------
#define SMU_THROTTLER_TDC_GFX_BIT
#define SMU_THROTTLER_TDC_VDD_BIT
#define SMU_THROTTLER_TDC_SOC_BIT
#define SMU_THROTTLER_TDC_MEM_BIT => Should be the one used for HBM as well #define SMU_THROTTLER_TDC_CVIP_BIT
#define SMU_THROTTLER_APCC_BIT
Temperature
------------
#define SMU_THROTTLER_TEMP_GPU_BIT
#define SMU_THROTTLER_TEMP_CORE_BIT
#define SMU_THROTTLER_TEMP_MEM_BIT
#define SMU_THROTTLER_TEMP_EDGE_BIT
#define SMU_THROTTLER_TEMP_HOTSPOT_BIT
#define SMU_THROTTLER_TEMP_VR_GFX_BIT
#define SMU_THROTTLER_TEMP_VR_SOC_BIT
#define SMU_THROTTLER_TEMP_VR_MEM_BIT
#define SMU_THROTTLER_VRHOT0_BIT
#define SMU_THROTTLER_VRHOT1_BIT
#define SMU_THROTTLER_TEMP_LIQUID_BIT
Others
-------
#define SMU_THROTTLER_PPM_BIT
#define SMU_THROTTLER_FIT_BIT
--
Thanks,
Lijo
On 5/20/2021 7:59 PM, Graham Sider wrote:
> Add new defines for thermal throttle status bits which are ASIC
> independent. This bit field will be visible to userspace via
> gpu_metrics, replacing the previous ASIC dependent bit fields.
> ---
> drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 32 +++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> index 523f9d2982e9..fbbebb1da913 100644
> --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> @@ -35,6 +35,38 @@
>
> #define SMU_DPM_USER_PROFILE_RESTORE (1 << 0)
>
> +#define INDEP_THROTTLER_PPT0_BIT 0
> +#define INDEP_THROTTLER_PPT1_BIT 1
> +#define INDEP_THROTTLER_PPT2_BIT 2
> +#define INDEP_THROTTLER_PPT3_BIT 3
> +#define INDEP_THROTTLER_TDC_GFX_BIT 4
> +#define INDEP_THROTTLER_TDC_SOC_BIT 5
> +#define INDEP_THROTTLER_TDC_HBM_BIT 6
> +#define INDEP_THROTTLER_TEMP_GPU_BIT 7
> +#define INDEP_THROTTLER_TEMP_MEM_BIT 8
> +#define INDEP_THROTTLER_TEMP_EDGE_BIT 9
> +#define INDEP_THROTTLER_TEMP_HOTSPOT_BIT 10
> +#define INDEP_THROTTLER_TEMP_VR_GFX_BIT 11
> +#define INDEP_THROTTLER_TEMP_VR_SOC_BIT 12
> +#define INDEP_THROTTLER_TEMP_VR_MEM_BIT 13
> +#define INDEP_THROTTLER_TEMP_LIQUID_BIT 14
> +#define INDEP_THROTTLER_APCC_BIT 15
> +#define INDEP_THROTTLER_PPM_BIT 16
> +#define INDEP_THROTTLER_FIT_BIT 17
> +#define INDEP_THROTTLER_VRHOT0_BIT 18
> +#define INDEP_THROTTLER_VRHOT1_BIT 19
> +#define INDEP_THROTTLER_STATUS_BIT_SPL 20
> +#define INDEP_THROTTLER_STATUS_BIT_FPPT 21
> +#define INDEP_THROTTLER_STATUS_BIT_SPPT 22
> +#define INDEP_THROTTLER_STATUS_BIT_SPPT_APU 23
> +#define INDEP_THROTTLER_STATUS_BIT_THM_CORE 24
> +#define INDEP_THROTTLER_STATUS_BIT_THM_GFX 25
> +#define INDEP_THROTTLER_STATUS_BIT_THM_SOC 26
> +#define INDEP_THROTTLER_STATUS_BIT_TDC_VDD 27
> +#define INDEP_THROTTLER_STATUS_BIT_TDC_SOC 28
> +#define INDEP_THROTTLER_STATUS_BIT_TDC_GFX 29
> +#define INDEP_THROTTLER_STATUS_BIT_TDC_CVIP 30
> +
> struct smu_hw_power_state {
> unsigned int magic;
> };
>
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^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2021-05-25 16:09 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-20 14:29 [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
2021-05-20 14:29 ` [PATCH 2/6] drm/amd/pm: Add arcturus throttler translation Graham Sider
2021-05-21 14:25 ` Kasiviswanathan, Harish
2021-05-21 14:27 ` Alex Deucher
2021-05-21 17:39 ` Sider, Graham
2021-05-21 20:14 ` Alex Deucher
2021-05-21 21:32 ` Sider, Graham
2021-05-21 21:47 ` Alex Deucher
2021-05-21 21:49 ` Alex Deucher
2021-05-21 22:04 ` Sider, Graham
2021-05-20 14:29 ` [PATCH 3/6] drm/amd/pm: Add navi1x " Graham Sider
2021-05-20 14:29 ` [PATCH 4/6] drm/amd/pm: Add sienna cichlid " Graham Sider
2021-05-20 14:29 ` [PATCH 5/6] drm/amd/pm: Add vangogh " Graham Sider
2021-05-20 14:29 ` [PATCH 6/6] drm/amd/pm: Add aldebaran " Graham Sider
2021-05-24 6:58 ` [PATCH 1/6] drm/amd/pm: Add ASIC independent throttle bits Lijo Lazar
2021-05-25 16:09 ` Sider, Graham
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