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From: Alex Deucher <alexdeucher@gmail.com>
To: "Limonciello, Mario" <Mario.Limonciello@amd.com>
Cc: "Deucher, Alexander" <Alexander.Deucher@amd.com>,
	"Mahapatra, Rajib" <Rajib.Mahapatra@amd.com>,
	"Liang, Prike" <Prike.Liang@amd.com>,
	"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>,
	"S, Shirish" <Shirish.S@amd.com>
Subject: Re: [PATCH v2] drm/amdgpu: skipping SDMA hw_init and hw_fini for S0ix.
Date: Thu, 10 Feb 2022 11:10:26 -0500	[thread overview]
Message-ID: <CADnq5_N83dyPDSyvS9vbwSRiDdiVq8at4=Do-_=xzinrVDVQ6g@mail.gmail.com> (raw)
In-Reply-To: <BL1PR12MB51578A1CD77547A902BFA03BE22F9@BL1PR12MB5157.namprd12.prod.outlook.com>

On Thu, Feb 10, 2022 at 11:08 AM Limonciello, Mario
<Mario.Limonciello@amd.com> wrote:
>
> [Public]
>
> > > VG doesn't do s0i3 right?
> >
> > Right.
> >
> > > No, YC should not take a similar fix.    YC had an architectural change and to
> > > avoid a "similar" problem takes
> > 26db706a6d77b9e184feb11725e97e53b7a89519.
> >
> > Isn't that likely just a workaround for the same issue?  This seems cleaner.
> >
>
> The SMU doesn't handle the restore of the SDMA registers for YC though, this
> explicitly changed.  So I don't believe we can do an identical fix there.
>
> @Liang, Prike comments?

Ah, ok, in that case, it's probably correct as is.  I assumed the smu
would probably behave the same.

Alex

  reply	other threads:[~2022-02-10 16:10 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-10 13:35 [PATCH v2] drm/amdgpu: skipping SDMA hw_init and hw_fini for S0ix Rajib Mahapatra
2022-02-10 14:04 ` Limonciello, Mario
2022-02-10 15:28   ` Alex Deucher
2022-02-10 15:42     ` Limonciello, Mario
2022-02-10 15:47       ` Alex Deucher
2022-02-10 16:08         ` Limonciello, Mario
2022-02-10 16:10           ` Alex Deucher [this message]
2022-02-11  6:26           ` Liang, Prike

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