From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Deucher Subject: Re: [PATCH 5/6] drm/radeon: add VRAM debugfs access Date: Thu, 12 Dec 2013 08:44:34 -0500 Message-ID: References: <1386837762-8375-1-git-send-email-deathsimple@vodafone.de> <1386837762-8375-6-git-send-email-deathsimple@vodafone.de> <52A9BB9B.3060103@vodafone.de> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-vb0-f41.google.com (mail-vb0-f41.google.com [209.85.212.41]) by gabe.freedesktop.org (Postfix) with ESMTP id AF82BFA977 for ; Thu, 12 Dec 2013 05:44:34 -0800 (PST) Received: by mail-vb0-f41.google.com with SMTP id m10so282983vbh.14 for ; Thu, 12 Dec 2013 05:44:34 -0800 (PST) In-Reply-To: <52A9BB9B.3060103@vodafone.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: =?ISO-8859-1?Q?Christian_K=F6nig?= Cc: Maling list - DRI developers List-Id: dri-devel@lists.freedesktop.org On Thu, Dec 12, 2013 at 8:35 AM, Christian K=F6nig wrote: > Am 12.12.2013 14:31, schrieb Alex Deucher: > >> On Thu, Dec 12, 2013 at 3:42 AM, Christian K=F6nig >> wrote: >>> >>> From: Christian K=F6nig >>> >>> Not very fast, but makes it possible to access even the >>> normally inaccessible parts of VRAM from userspace. >>> >>> Signed-off-by: Christian K=F6nig >>> --- >>> drivers/gpu/drm/radeon/radeon.h | 4 +++ >>> drivers/gpu/drm/radeon/radeon_ttm.c | 72 >>> ++++++++++++++++++++++++++++++++++++- >>> 2 files changed, 75 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/radeon/radeon.h >>> b/drivers/gpu/drm/radeon/radeon.h >>> index b1f990d..49f210c1 100644 >>> --- a/drivers/gpu/drm/radeon/radeon.h >>> +++ b/drivers/gpu/drm/radeon/radeon.h >>> @@ -413,6 +413,10 @@ struct radeon_mman { >>> struct ttm_bo_device bdev; >>> bool mem_global_referenced; >>> bool initialized; >>> + >>> +#if defined(CONFIG_DEBUG_FS) >>> + struct dentry *vram; >>> +#endif >>> }; >>> >>> /* bo virtual address in a specific vm */ >>> diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c >>> b/drivers/gpu/drm/radeon/radeon_ttm.c >>> index a2d6c4f..f5e8eed 100644 >>> --- a/drivers/gpu/drm/radeon/radeon_ttm.c >>> +++ b/drivers/gpu/drm/radeon/radeon_ttm.c >>> @@ -39,12 +39,14 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include "radeon_reg.h" >>> #include "radeon.h" >>> >>> #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) >>> >>> static int radeon_ttm_debugfs_init(struct radeon_device *rdev); >>> +static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); >>> >>> static struct radeon_device *radeon_get_rdev(struct ttm_bo_device >>> *bdev) >>> { >>> @@ -753,6 +755,7 @@ void radeon_ttm_fini(struct radeon_device *rdev) >>> >>> if (!rdev->mman.initialized) >>> return; >>> + radeon_ttm_debugfs_fini(rdev); >>> if (rdev->stollen_vga_memory) { >>> r =3D radeon_bo_reserve(rdev->stollen_vga_memory, fals= e); >>> if (r =3D=3D 0) { >>> @@ -862,12 +865,70 @@ static struct drm_info_list >>> radeon_ttm_debugfs_list[] =3D { >>> #endif >>> }; >>> >>> +static int radeon_ttm_mem_open(struct inode *inode, struct file *filep) >>> +{ >>> + filep->private_data =3D inode->i_private; >>> + return 0; >>> +} >>> + >>> +static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, >>> + size_t size, loff_t *pos) >>> +{ >>> + struct radeon_device *rdev =3D f->private_data; >>> + ssize_t result =3D 0; >>> + int r; >>> + >>> + if (size & 0x3 || *pos & 0x3) >>> + return -EINVAL; >>> + >>> + while (size) { >>> + unsigned long flags; >>> + uint32_t value; >>> + >>> + if (*pos >=3D rdev->mc.mc_vram_size || *pos >=3D 0x7FFF= FFFF) >>> + return result; >>> + >>> + spin_lock_irqsave(&rdev->mmio_idx_lock, flags); >>> + WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); >> >> Starting with evergreen dGPUs, there is also an MM_INDEX_HI register >> at 0x18 for accessing addresses over 30 bits. > > > I know, but I wanted to keep that as simple and stupid as possible. I mean > this code should work from r100 till CIK and except for HAINAN do we real= ly > have cards with more than 2GB or ram? Most Hawaii boards are shipping with 4GB and a number of workstation cards have large amounts of memory. Alex > > And I'm not even sure if radeon_ttm is the right place for this. > > Christian. > > >> >> Alex >> >> >>> + value =3D RREG32(RADEON_MM_DATA); >>> + spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); >>> + >>> + r =3D put_user(value, (uint32_t *)buf); >>> + if (r) >>> + return r; >>> + >>> + result +=3D 4; >>> + buf +=3D 4; >>> + *pos +=3D 4; >>> + size -=3D 4; >>> + } >>> + >>> + return result; >>> +} >>> + >>> +static const struct file_operations radeon_ttm_vram_fops =3D { >>> + .owner =3D THIS_MODULE, >>> + .open =3D radeon_ttm_mem_open, >>> + .read =3D radeon_ttm_vram_read, >>> +}; >>> + >>> #endif >>> >>> static int radeon_ttm_debugfs_init(struct radeon_device *rdev) >>> { >>> #if defined(CONFIG_DEBUG_FS) >>> - unsigned count =3D ARRAY_SIZE(radeon_ttm_debugfs_list); >>> + unsigned count; >>> + >>> + struct drm_minor *minor =3D rdev->ddev->primary; >>> + struct dentry *ent, *root =3D minor->debugfs_root; >>> + >>> + ent =3D debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO, r= oot, >>> + rdev, &radeon_ttm_vram_fops); >>> + if (IS_ERR(ent)) >>> + return PTR_ERR(ent); >>> + rdev->mman.vram =3D ent; >>> + >>> + count =3D ARRAY_SIZE(radeon_ttm_debugfs_list); >>> >>> #ifdef CONFIG_SWIOTLB >>> if (!swiotlb_nr_tbl()) >>> @@ -880,3 +941,12 @@ static int radeon_ttm_debugfs_init(struct >>> radeon_device *rdev) >>> return 0; >>> #endif >>> } >>> + >>> +static void radeon_ttm_debugfs_fini(struct radeon_device *rdev) >>> +{ >>> +#if defined(CONFIG_DEBUG_FS) >>> + >>> + debugfs_remove(rdev->mman.vram); >>> + rdev->mman.vram =3D NULL; >>> +#endif >>> +} >>> -- >>> 1.8.1.2 >>> >>> _______________________________________________ >>> dri-devel mailing list >>> dri-devel@lists.freedesktop.org >>> http://lists.freedesktop.org/mailman/listinfo/dri-devel > >