* [PATCH 01/12] drm/amdgpu: move ring helpers to amdgpu_ring.h
@ 2017-06-30 11:22 Christian König
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
0 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Keep them where they belong.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 44 --------------------------------
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 42 ++++++++++++++++++++++++++++++
2 files changed, 42 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ab1dad2..810796a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1801,50 +1801,6 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
#define RBIOS16(i) (RBIOS8(i) | (RBIOS8((i)+1) << 8))
#define RBIOS32(i) ((RBIOS16(i)) | (RBIOS16((i)+2) << 16))
-/*
- * RING helpers.
- */
-static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)
-{
- if (ring->count_dw <= 0)
- DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
- ring->ring[ring->wptr++ & ring->buf_mask] = v;
- ring->wptr &= ring->ptr_mask;
- ring->count_dw--;
-}
-
-static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, void *src, int count_dw)
-{
- unsigned occupied, chunk1, chunk2;
- void *dst;
-
- if (unlikely(ring->count_dw < count_dw)) {
- DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
- return;
- }
-
- occupied = ring->wptr & ring->buf_mask;
- dst = (void *)&ring->ring[occupied];
- chunk1 = ring->buf_mask + 1 - occupied;
- chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
- chunk2 = count_dw - chunk1;
- chunk1 <<= 2;
- chunk2 <<= 2;
-
- if (chunk1)
- memcpy(dst, src, chunk1);
-
- if (chunk2) {
- src += chunk1;
- dst = (void *)ring->ring;
- memcpy(dst, src, chunk2);
- }
-
- ring->wptr += count_dw;
- ring->wptr &= ring->ptr_mask;
- ring->count_dw -= count_dw;
-}
-
static inline struct amdgpu_sdma_instance *
amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
{
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index bc8dec9..04cbc3a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -212,4 +212,46 @@ static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring)
}
+static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)
+{
+ if (ring->count_dw <= 0)
+ DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
+ ring->ring[ring->wptr++ & ring->buf_mask] = v;
+ ring->wptr &= ring->ptr_mask;
+ ring->count_dw--;
+}
+
+static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,
+ void *src, int count_dw)
+{
+ unsigned occupied, chunk1, chunk2;
+ void *dst;
+
+ if (unlikely(ring->count_dw < count_dw)) {
+ DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
+ return;
+ }
+
+ occupied = ring->wptr & ring->buf_mask;
+ dst = (void *)&ring->ring[occupied];
+ chunk1 = ring->buf_mask + 1 - occupied;
+ chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
+ chunk2 = count_dw - chunk1;
+ chunk1 <<= 2;
+ chunk2 <<= 2;
+
+ if (chunk1)
+ memcpy(dst, src, chunk1);
+
+ if (chunk2) {
+ src += chunk1;
+ dst = (void *)ring->ring;
+ memcpy(dst, src, chunk2);
+ }
+
+ ring->wptr += count_dw;
+ ring->wptr &= ring->ptr_mask;
+ ring->count_dw -= count_dw;
+}
+
#endif
--
2.7.4
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 02/12] drm/amdgpu: fix amdgpu_ring_write_multiple
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 03/12] drm/amdgpu: allow flushing VMID0 before IB execution as well Christian König
` (11 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Overwriting still used ring content has a low probability to cause
problems, not writing at all has 100% probability to cause problems.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 04cbc3a..322d2529 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -227,10 +227,8 @@ static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,
unsigned occupied, chunk1, chunk2;
void *dst;
- if (unlikely(ring->count_dw < count_dw)) {
+ if (unlikely(ring->count_dw < count_dw))
DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
- return;
- }
occupied = ring->wptr & ring->buf_mask;
dst = (void *)&ring->ring[occupied];
--
2.7.4
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 03/12] drm/amdgpu: allow flushing VMID0 before IB execution as well
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 02/12] drm/amdgpu: fix amdgpu_ring_write_multiple Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 04/12] drm/amdgpu: add vm_needs_flush parameter to amdgpu_copy_buffer Christian König
` (10 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
This allows us to queue IBs which needs an up to date system domain as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index f774b3f..1b30d2a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -172,7 +172,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
if (ring->funcs->insert_start)
ring->funcs->insert_start(ring);
- if (vm) {
+ if (job) {
r = amdgpu_vm_flush(ring, job);
if (r) {
amdgpu_ring_undo(ring);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index 3d641e1..4510627 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -81,6 +81,8 @@ int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]);
if (r)
kfree(*job);
+ else
+ (*job)->vm_pd_addr = adev->gart.table_addr;
return r;
}
--
2.7.4
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 04/12] drm/amdgpu: add vm_needs_flush parameter to amdgpu_copy_buffer
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 02/12] drm/amdgpu: fix amdgpu_ring_write_multiple Christian König
2017-06-30 11:22 ` [PATCH 03/12] drm/amdgpu: allow flushing VMID0 before IB execution as well Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 05/12] drm/amdgpu: bind BOs to TTM only once Christian König
` (9 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
This allows us to flush the system VM here.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_test.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 12 ++++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 9 ++++-----
5 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
index 1beae5b..2fb299a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
@@ -40,7 +40,7 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size,
for (i = 0; i < n; i++) {
struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence,
- false);
+ false, false);
if (r)
goto exit_do_move;
r = dma_fence_wait(fence, false);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 8ee6965..c34cf2c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -535,7 +535,7 @@ int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
r = amdgpu_copy_buffer(ring, bo_addr, shadow_addr,
amdgpu_bo_size(bo), resv, fence,
- direct);
+ direct, false);
if (!r)
amdgpu_bo_fence(bo, *fence, true);
@@ -588,7 +588,7 @@ int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
r = amdgpu_copy_buffer(ring, shadow_addr, bo_addr,
amdgpu_bo_size(bo), resv, fence,
- direct);
+ direct, false);
if (!r)
amdgpu_bo_fence(bo, *fence, true);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
index 15510da..d02e611 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
@@ -111,7 +111,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
amdgpu_bo_kunmap(gtt_obj[i]);
r = amdgpu_copy_buffer(ring, gtt_addr, vram_addr,
- size, NULL, &fence, false);
+ size, NULL, &fence, false, false);
if (r) {
DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
@@ -156,7 +156,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
amdgpu_bo_kunmap(vram_obj);
r = amdgpu_copy_buffer(ring, vram_addr, gtt_addr,
- size, NULL, &fence, false);
+ size, NULL, &fence, false, false);
if (r) {
DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e4860ac..bbe1639 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -318,7 +318,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
r = amdgpu_copy_buffer(ring, old_start, new_start,
cur_pages * PAGE_SIZE,
- bo->resv, &next, false);
+ bo->resv, &next, false, false);
if (r)
goto error;
@@ -1256,12 +1256,11 @@ int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma)
return ttm_bo_mmap(filp, vma, &adev->mman.bdev);
}
-int amdgpu_copy_buffer(struct amdgpu_ring *ring,
- uint64_t src_offset,
- uint64_t dst_offset,
- uint32_t byte_count,
+int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
+ uint64_t dst_offset, uint32_t byte_count,
struct reservation_object *resv,
- struct dma_fence **fence, bool direct_submit)
+ struct dma_fence **fence, bool direct_submit,
+ bool vm_needs_flush)
{
struct amdgpu_device *adev = ring->adev;
struct amdgpu_job *job;
@@ -1283,6 +1282,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring,
if (r)
return r;
+ job->vm_needs_flush = vm_needs_flush;
if (resv) {
r = amdgpu_sync_resv(adev, &job->sync, resv,
AMDGPU_FENCE_OWNER_UNDEFINED);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 6bdede8..cd5bbfa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -61,12 +61,11 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
const struct ttm_place *place,
struct ttm_mem_reg *mem);
-int amdgpu_copy_buffer(struct amdgpu_ring *ring,
- uint64_t src_offset,
- uint64_t dst_offset,
- uint32_t byte_count,
+int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
+ uint64_t dst_offset, uint32_t byte_count,
struct reservation_object *resv,
- struct dma_fence **fence, bool direct_submit);
+ struct dma_fence **fence, bool direct_submit,
+ bool vm_needs_flush);
int amdgpu_fill_buffer(struct amdgpu_bo *bo,
uint32_t src_data,
struct reservation_object *resv,
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 05/12] drm/amdgpu: bind BOs to TTM only once
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (2 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 04/12] drm/amdgpu: add vm_needs_flush parameter to amdgpu_copy_buffer Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 06/12] drm/amdgpu: bind BOs with GTT space allocated directly Christian König
` (8 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
No need to do this on every round.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 70 ++++++++++++++-------------------
1 file changed, 29 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index bbe1639..5bfe7f6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -252,29 +252,15 @@ static void amdgpu_move_null(struct ttm_buffer_object *bo,
new_mem->mm_node = NULL;
}
-static int amdgpu_mm_node_addr(struct ttm_buffer_object *bo,
- struct drm_mm_node *mm_node,
- struct ttm_mem_reg *mem,
- uint64_t *addr)
+static uint64_t amdgpu_mm_node_addr(struct ttm_buffer_object *bo,
+ struct drm_mm_node *mm_node,
+ struct ttm_mem_reg *mem)
{
- int r;
-
- switch (mem->mem_type) {
- case TTM_PL_TT:
- r = amdgpu_ttm_bind(bo, mem);
- if (r)
- return r;
-
- case TTM_PL_VRAM:
- *addr = mm_node->start << PAGE_SHIFT;
- *addr += bo->bdev->man[mem->mem_type].gpu_offset;
- break;
- default:
- DRM_ERROR("Unknown placement %d\n", mem->mem_type);
- return -EINVAL;
- }
+ uint64_t addr;
- return 0;
+ addr = mm_node->start << PAGE_SHIFT;
+ addr += bo->bdev->man[mem->mem_type].gpu_offset;
+ return addr;
}
static int amdgpu_move_blit(struct ttm_buffer_object *bo,
@@ -298,18 +284,25 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
return -EINVAL;
}
+ if (old_mem->mem_type == TTM_PL_TT) {
+ r = amdgpu_ttm_bind(bo, old_mem);
+ if (r)
+ return r;
+ }
+
old_mm = old_mem->mm_node;
- r = amdgpu_mm_node_addr(bo, old_mm, old_mem, &old_start);
- if (r)
- return r;
old_size = old_mm->size;
+ old_start = amdgpu_mm_node_addr(bo, old_mm, old_mem);
+ if (new_mem->mem_type == TTM_PL_TT) {
+ r = amdgpu_ttm_bind(bo, new_mem);
+ if (r)
+ return r;
+ }
new_mm = new_mem->mm_node;
- r = amdgpu_mm_node_addr(bo, new_mm, new_mem, &new_start);
- if (r)
- return r;
new_size = new_mm->size;
+ new_start = amdgpu_mm_node_addr(bo, new_mm, new_mem);
num_pages = new_mem->num_pages;
while (num_pages) {
@@ -331,10 +324,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
old_size -= cur_pages;
if (!old_size) {
- r = amdgpu_mm_node_addr(bo, ++old_mm, old_mem,
- &old_start);
- if (r)
- goto error;
+ old_start = amdgpu_mm_node_addr(bo, ++old_mm, old_mem);
old_size = old_mm->size;
} else {
old_start += cur_pages * PAGE_SIZE;
@@ -342,11 +332,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
new_size -= cur_pages;
if (!new_size) {
- r = amdgpu_mm_node_addr(bo, ++new_mm, new_mem,
- &new_start);
- if (r)
- goto error;
-
+ new_start = amdgpu_mm_node_addr(bo, ++new_mm, new_mem);
new_size = new_mm->size;
} else {
new_start += cur_pages * PAGE_SIZE;
@@ -1347,6 +1333,12 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
return -EINVAL;
}
+ if (bo->tbo.mem.mem_type == TTM_PL_TT) {
+ r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
+ if (r)
+ return r;
+ }
+
num_pages = bo->tbo.num_pages;
mm_node = bo->tbo.mem.mm_node;
num_loops = 0;
@@ -1382,11 +1374,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
uint32_t byte_count = mm_node->size << PAGE_SHIFT;
uint64_t dst_addr;
- r = amdgpu_mm_node_addr(&bo->tbo, mm_node,
- &bo->tbo.mem, &dst_addr);
- if (r)
- return r;
-
+ dst_addr = amdgpu_mm_node_addr(&bo->tbo, mm_node, &bo->tbo.mem);
while (byte_count) {
uint32_t cur_size_in_bytes = min(byte_count, max_bytes);
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 06/12] drm/amdgpu: bind BOs with GTT space allocated directly
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (3 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 05/12] drm/amdgpu: bind BOs to TTM only once Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 07/12] drm/amdgpu: reserve the first 2x2MB of GART Christian König
` (7 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
This avoids binding them later on.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 16 +++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 49 ++++++++++++++++++-----------
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 1 +
3 files changed, 46 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index f7d22c4..6fdf83a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -81,6 +81,20 @@ static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man)
}
/**
+ * amdgpu_gtt_mgr_is_allocated - Check if mem has address space
+ *
+ * @mem: the mem object to check
+ *
+ * Check if a mem object has already address space allocated.
+ */
+bool amdgpu_gtt_mgr_is_alloced(struct ttm_mem_reg *mem)
+{
+ struct drm_mm_node *node = mem->mm_node;
+
+ return (node->start != AMDGPU_BO_INVALID_OFFSET);
+}
+
+/**
* amdgpu_gtt_mgr_alloc - allocate new ranges
*
* @man: TTM memory type manager
@@ -101,7 +115,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
unsigned long fpfn, lpfn;
int r;
- if (node->start != AMDGPU_BO_INVALID_OFFSET)
+ if (amdgpu_gtt_mgr_is_alloced(mem))
return 0;
if (place)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 5bfe7f6..eb0d7d7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -681,6 +681,31 @@ static void amdgpu_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
sg_free_table(ttm->sg);
}
+static int amdgpu_ttm_do_bind(struct ttm_tt *ttm, struct ttm_mem_reg *mem)
+{
+ struct amdgpu_ttm_tt *gtt = (void *)ttm;
+ uint64_t flags;
+ int r;
+
+ spin_lock(>t->adev->gtt_list_lock);
+ flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, mem);
+ gtt->offset = (u64)mem->start << PAGE_SHIFT;
+ r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages,
+ ttm->pages, gtt->ttm.dma_address, flags);
+
+ if (r) {
+ DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
+ ttm->num_pages, gtt->offset);
+ goto error_gart_bind;
+ }
+
+ list_add_tail(>t->list, >t->adev->gtt_list);
+error_gart_bind:
+ spin_unlock(>t->adev->gtt_list_lock);
+ return r;
+
+}
+
static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
struct ttm_mem_reg *bo_mem)
{
@@ -704,7 +729,10 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
bo_mem->mem_type == AMDGPU_PL_OA)
return -EINVAL;
- return 0;
+ if (amdgpu_gtt_mgr_is_alloced(bo_mem))
+ r = amdgpu_ttm_do_bind(ttm, bo_mem);
+
+ return r;
}
bool amdgpu_ttm_is_bound(struct ttm_tt *ttm)
@@ -717,8 +745,6 @@ bool amdgpu_ttm_is_bound(struct ttm_tt *ttm)
int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem)
{
struct ttm_tt *ttm = bo->ttm;
- struct amdgpu_ttm_tt *gtt = (void *)bo->ttm;
- uint64_t flags;
int r;
if (!ttm || amdgpu_ttm_is_bound(ttm))
@@ -731,22 +757,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem)
return r;
}
- spin_lock(>t->adev->gtt_list_lock);
- flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, bo_mem);
- gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
- r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages,
- ttm->pages, gtt->ttm.dma_address, flags);
-
- if (r) {
- DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
- ttm->num_pages, gtt->offset);
- goto error_gart_bind;
- }
-
- list_add_tail(>t->list, >t->adev->gtt_list);
-error_gart_bind:
- spin_unlock(>t->adev->gtt_list_lock);
- return r;
+ return amdgpu_ttm_do_bind(ttm, bo_mem);
}
int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index cd5bbfa..2ade5c5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -56,6 +56,7 @@ struct amdgpu_mman {
extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func;
extern const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func;
+bool amdgpu_gtt_mgr_is_alloced(struct ttm_mem_reg *mem);
int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
struct ttm_buffer_object *tbo,
const struct ttm_place *place,
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 07/12] drm/amdgpu: reserve the first 2x2MB of GART
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (4 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 06/12] drm/amdgpu: bind BOs with GTT space allocated directly Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 08/12] drm/amdgpu: add amdgpu_gart_map function Christian König
` (6 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
We want to use them as remap address space.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 5 ++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index 6fdf83a..a0976dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -43,12 +43,15 @@ static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
unsigned long p_size)
{
struct amdgpu_gtt_mgr *mgr;
+ uint64_t start, size;
mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
if (!mgr)
return -ENOMEM;
- drm_mm_init(&mgr->mm, 0, p_size);
+ start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
+ size = p_size - start;
+ drm_mm_init(&mgr->mm, start, size);
spin_lock_init(&mgr->lock);
mgr->available = p_size;
man->priv = mgr;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 2ade5c5..9c4da0a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -34,6 +34,9 @@
#define AMDGPU_PL_FLAG_GWS (TTM_PL_FLAG_PRIV << 1)
#define AMDGPU_PL_FLAG_OA (TTM_PL_FLAG_PRIV << 2)
+#define AMDGPU_GTT_MAX_TRANSFER_SIZE 512
+#define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
+
struct amdgpu_mman {
struct ttm_bo_global_ref bo_global_ref;
struct drm_global_reference mem_global_ref;
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 08/12] drm/amdgpu: add amdgpu_gart_map function
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (5 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 07/12] drm/amdgpu: reserve the first 2x2MB of GART Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-8-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 09/12] drm/amdgpu: use the GTT windows for BO moves Christian König
` (5 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
This allows us to write the mapped PTEs into
an IB instead of the table directly.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 64 ++++++++++++++++++++++++--------
2 files changed, 52 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 810796a..4a2b33d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -572,6 +572,9 @@ int amdgpu_gart_init(struct amdgpu_device *adev);
void amdgpu_gart_fini(struct amdgpu_device *adev);
int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
int pages);
+int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
+ int pages, dma_addr_t *dma_addr, uint64_t flags,
+ void *dst);
int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
int pages, struct page **pagelist,
dma_addr_t *dma_addr, uint64_t flags);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index 8877015..d99b2b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -280,6 +280,43 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
}
/**
+ * amdgpu_gart_map - map dma_addresses into GART entries
+ *
+ * @adev: amdgpu_device pointer
+ * @offset: offset into the GPU's gart aperture
+ * @pages: number of pages to bind
+ * @dma_addr: DMA addresses of pages
+ *
+ * Map the dma_addresses into GART entries (all asics).
+ * Returns 0 for success, -EINVAL for failure.
+ */
+int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
+ int pages, dma_addr_t *dma_addr, uint64_t flags,
+ void *dst)
+{
+ uint64_t page_base;
+ unsigned t, p;
+ int i, j;
+
+ if (!adev->gart.ready) {
+ WARN(1, "trying to bind memory to uninitialized GART !\n");
+ return -EINVAL;
+ }
+
+ t = offset / AMDGPU_GPU_PAGE_SIZE;
+ p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+
+ for (i = 0; i < pages; i++, p++) {
+ page_base = dma_addr[i];
+ for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
+ amdgpu_gart_set_pte_pde(adev, dst, t, page_base, flags);
+ page_base += AMDGPU_GPU_PAGE_SIZE;
+ }
+ }
+ return 0;
+}
+
+/**
* amdgpu_gart_bind - bind pages into the gart page table
*
* @adev: amdgpu_device pointer
@@ -296,31 +333,28 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
int pages, struct page **pagelist, dma_addr_t *dma_addr,
uint64_t flags)
{
- unsigned t;
- unsigned p;
- uint64_t page_base;
- int i, j;
+#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
+ unsigned i;
+#endif
+ int r;
if (!adev->gart.ready) {
WARN(1, "trying to bind memory to uninitialized GART !\n");
return -EINVAL;
}
- t = offset / AMDGPU_GPU_PAGE_SIZE;
- p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
-
- for (i = 0; i < pages; i++, p++) {
#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
+ for (i = 0; i < pages; i++, p++)
adev->gart.pages[p] = pagelist[i];
#endif
- if (adev->gart.ptr) {
- page_base = dma_addr[i];
- for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
- amdgpu_gart_set_pte_pde(adev, adev->gart.ptr, t, page_base, flags);
- page_base += AMDGPU_GPU_PAGE_SIZE;
- }
- }
+
+ if (adev->gart.ptr) {
+ r = amdgpu_gart_map(adev, offset, pages, dma_addr, flags,
+ adev->gart.ptr);
+ if (r)
+ return r;
}
+
mb();
amdgpu_gart_flush_gpu_tlb(adev, 0);
return 0;
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 09/12] drm/amdgpu: use the GTT windows for BO moves
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (6 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 08/12] drm/amdgpu: add amdgpu_gart_map function Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-9-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 10/12] drm/amdgpu: stop mapping BOs to GTT Christian König
` (4 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
This way we don't need to map the full BO at a time any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 127 +++++++++++++++++++++++++++-----
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +
2 files changed, 111 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index eb0d7d7..247ce21 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -47,10 +47,15 @@
#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
+static int amdgpu_map_buffer(struct ttm_buffer_object *bo,
+ struct ttm_mem_reg *mem,
+ unsigned num_pages, uint64_t offset,
+ struct amdgpu_ring *ring,
+ uint64_t *addr);
+
static int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
static void amdgpu_ttm_debugfs_fini(struct amdgpu_device *adev);
-
/*
* Global memory.
*/
@@ -97,6 +102,9 @@ static int amdgpu_ttm_global_init(struct amdgpu_device *adev)
goto error_bo;
}
+ mutex_init(&adev->mman.gtt_window_lock);
+ adev->mman.gtt_index = 0;
+
ring = adev->mman.buffer_funcs_ring;
rq = &ring->sched.sched_rq[AMD_SCHED_PRIORITY_KERNEL];
r = amd_sched_entity_init(&ring->sched, &adev->mman.entity,
@@ -123,6 +131,7 @@ static void amdgpu_ttm_global_fini(struct amdgpu_device *adev)
if (adev->mman.mem_global_referenced) {
amd_sched_entity_fini(adev->mman.entity.sched,
&adev->mman.entity);
+ mutex_destroy(&adev->mman.gtt_window_lock);
drm_global_item_unref(&adev->mman.bo_global_ref.ref);
drm_global_item_unref(&adev->mman.mem_global_ref);
adev->mman.mem_global_referenced = false;
@@ -256,10 +265,12 @@ static uint64_t amdgpu_mm_node_addr(struct ttm_buffer_object *bo,
struct drm_mm_node *mm_node,
struct ttm_mem_reg *mem)
{
- uint64_t addr;
+ uint64_t addr = 0;
- addr = mm_node->start << PAGE_SHIFT;
- addr += bo->bdev->man[mem->mem_type].gpu_offset;
+ if (mm_node->start != AMDGPU_BO_INVALID_OFFSET) {
+ addr = mm_node->start << PAGE_SHIFT;
+ addr += bo->bdev->man[mem->mem_type].gpu_offset;
+ }
return addr;
}
@@ -284,34 +295,41 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
return -EINVAL;
}
- if (old_mem->mem_type == TTM_PL_TT) {
- r = amdgpu_ttm_bind(bo, old_mem);
- if (r)
- return r;
- }
-
old_mm = old_mem->mm_node;
old_size = old_mm->size;
old_start = amdgpu_mm_node_addr(bo, old_mm, old_mem);
- if (new_mem->mem_type == TTM_PL_TT) {
- r = amdgpu_ttm_bind(bo, new_mem);
- if (r)
- return r;
- }
-
new_mm = new_mem->mm_node;
new_size = new_mm->size;
new_start = amdgpu_mm_node_addr(bo, new_mm, new_mem);
num_pages = new_mem->num_pages;
+ mutex_lock(&adev->mman.gtt_window_lock);
while (num_pages) {
- unsigned long cur_pages = min(old_size, new_size);
+ unsigned long cur_pages = min(min(old_size, new_size),
+ (u64)AMDGPU_GTT_MAX_TRANSFER_SIZE);
+ uint64_t from = old_start, to = new_start;
struct dma_fence *next;
- r = amdgpu_copy_buffer(ring, old_start, new_start,
+ if (old_mem->mem_type == TTM_PL_TT &&
+ !amdgpu_gtt_mgr_is_alloced(old_mem)) {
+ r = amdgpu_map_buffer(bo, old_mem, cur_pages,
+ old_start, ring, &from);
+ if (r)
+ goto error;
+ }
+
+ if (new_mem->mem_type == TTM_PL_TT &&
+ !amdgpu_gtt_mgr_is_alloced(new_mem)) {
+ r = amdgpu_map_buffer(bo, new_mem, cur_pages,
+ new_start, ring, &to);
+ if (r)
+ goto error;
+ }
+
+ r = amdgpu_copy_buffer(ring, from, to,
cur_pages * PAGE_SIZE,
- bo->resv, &next, false, false);
+ bo->resv, &next, false, true);
if (r)
goto error;
@@ -338,12 +356,15 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
new_start += cur_pages * PAGE_SIZE;
}
}
+ mutex_unlock(&adev->mman.gtt_window_lock);
r = ttm_bo_pipeline_move(bo, fence, evict, new_mem);
dma_fence_put(fence);
return r;
error:
+ mutex_unlock(&adev->mman.gtt_window_lock);
+
if (fence)
dma_fence_wait(fence, false);
dma_fence_put(fence);
@@ -1253,6 +1274,74 @@ int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma)
return ttm_bo_mmap(filp, vma, &adev->mman.bdev);
}
+static int amdgpu_map_buffer(struct ttm_buffer_object *bo,
+ struct ttm_mem_reg *mem,
+ unsigned num_pages, uint64_t offset,
+ struct amdgpu_ring *ring,
+ uint64_t *addr)
+{
+ struct amdgpu_ttm_tt *gtt = (void *)bo->ttm;
+ struct amdgpu_device *adev = ring->adev;
+ struct ttm_tt *ttm = bo->ttm;
+ struct amdgpu_job *job;
+ unsigned num_dw, num_bytes, idx;
+ dma_addr_t *dma_address;
+ struct dma_fence *fence;
+ uint64_t src_addr, dst_addr;
+ uint64_t flags;
+ int r;
+
+ BUG_ON(adev->mman.buffer_funcs->copy_max_bytes <
+ AMDGPU_GTT_MAX_TRANSFER_SIZE * 8);
+
+ idx = adev->mman.gtt_index++;
+ adev->mman.gtt_index %= AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
+
+ *addr = adev->mc.gtt_start;
+ *addr += (u64)idx * AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GPU_PAGE_SIZE;
+
+ num_dw = adev->mman.buffer_funcs->copy_num_dw;
+ while (num_dw & 0x7)
+ num_dw++;
+
+ num_bytes = num_pages * 8;
+
+ r = amdgpu_job_alloc_with_ib(adev, num_dw * 4 + num_bytes, &job);
+ if (r)
+ return r;
+
+ src_addr = num_dw * 4;
+ src_addr += job->ibs[0].gpu_addr;
+
+ dst_addr = adev->gart.table_addr;
+ dst_addr += idx * AMDGPU_GTT_MAX_TRANSFER_SIZE * 8;
+ amdgpu_emit_copy_buffer(adev, &job->ibs[0], src_addr,
+ dst_addr, num_bytes);
+
+ amdgpu_ring_pad_ib(ring, &job->ibs[0]);
+ WARN_ON(job->ibs[0].length_dw > num_dw);
+
+ dma_address = >t->ttm.dma_address[offset >> PAGE_SHIFT];
+ flags = amdgpu_ttm_tt_pte_flags(adev, ttm, mem);
+ r = amdgpu_gart_map(adev, 0, num_pages, dma_address, flags,
+ &job->ibs[0].ptr[num_dw]);
+ if (r)
+ goto error_free;
+
+ r = amdgpu_job_submit(job, ring, &adev->mman.entity,
+ AMDGPU_FENCE_OWNER_UNDEFINED, &fence);
+ if (r)
+ goto error_free;
+
+ dma_fence_put(fence);
+
+ return r;
+
+error_free:
+ amdgpu_job_free(job);
+ return r;
+}
+
int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
uint64_t dst_offset, uint32_t byte_count,
struct reservation_object *resv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 9c4da0a..2e1cce5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -52,6 +52,9 @@ struct amdgpu_mman {
/* buffer handling */
const struct amdgpu_buffer_funcs *buffer_funcs;
struct amdgpu_ring *buffer_funcs_ring;
+
+ struct mutex gtt_window_lock;
+ unsigned gtt_index;
/* Scheduler entity for buffer moves */
struct amd_sched_entity entity;
};
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 10/12] drm/amdgpu: stop mapping BOs to GTT
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (7 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 09/12] drm/amdgpu: use the GTT windows for BO moves Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-10-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 11/12] drm/amdgpu: remove maximum BO size limitation Christian König
` (3 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
No need to map BOs to GTT on eviction and intermediate transfers any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 19 ++-----------------
1 file changed, 2 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 247ce21..e1ebcba 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -200,7 +200,6 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
.lpfn = 0,
.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
};
- unsigned i;
if (!amdgpu_ttm_bo_is_amdgpu_bo(bo)) {
placement->placement = &placements;
@@ -218,20 +217,6 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_CPU);
} else {
amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT);
- for (i = 0; i < abo->placement.num_placement; ++i) {
- if (!(abo->placements[i].flags &
- TTM_PL_FLAG_TT))
- continue;
-
- if (abo->placements[i].lpfn)
- continue;
-
- /* set an upper limit to force directly
- * allocating address space for the BO.
- */
- abo->placements[i].lpfn =
- adev->mc.gtt_size >> PAGE_SHIFT;
- }
}
break;
case TTM_PL_TT:
@@ -391,7 +376,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo,
placement.num_busy_placement = 1;
placement.busy_placement = &placements;
placements.fpfn = 0;
- placements.lpfn = adev->mc.gtt_size >> PAGE_SHIFT;
+ placements.lpfn = 0;
placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
interruptible, no_wait_gpu);
@@ -438,7 +423,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo,
placement.num_busy_placement = 1;
placement.busy_placement = &placements;
placements.fpfn = 0;
- placements.lpfn = adev->mc.gtt_size >> PAGE_SHIFT;
+ placements.lpfn = 0;
placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
interruptible, no_wait_gpu);
--
2.7.4
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 11/12] drm/amdgpu: remove maximum BO size limitation.
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (8 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 10/12] drm/amdgpu: stop mapping BOs to GTT Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-11-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 12/12] drm/amdgpu: add gtt_sys_limit Christian König
` (2 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
We can finally remove this now.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 96c4493..2382785 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -58,17 +58,6 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
alignment = PAGE_SIZE;
}
- if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA))) {
- /* Maximum bo size is the unpinned gtt size since we use the gtt to
- * handle vram to system pool migrations.
- */
- max_size = adev->mc.gtt_size - adev->gart_pin_size;
- if (size > max_size) {
- DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
- size >> 20, max_size >> 20);
- return -ENOMEM;
- }
- }
retry:
r = amdgpu_bo_create(adev, size, alignment, kernel, initial_domain,
flags, NULL, NULL, &robj);
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 12/12] drm/amdgpu: add gtt_sys_limit
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (9 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 11/12] drm/amdgpu: remove maximum BO size limitation Christian König
@ 2017-06-30 11:22 ` Christian König
[not found] ` <1498821733-1545-12-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:15 ` [PATCH 01/12] drm/amdgpu: move ring helpers to amdgpu_ring.h Alex Deucher
2017-06-30 22:40 ` Felix Kuehling
12 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2017-06-30 11:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Limit the size of the GART table for the system domain.
This saves us a bunch of visible VRAM, but also limitates the maximum BO size we can swap out.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++++
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 8 ++++++--
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 6 ++++--
5 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 4a2b33d..ef8e6b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -76,6 +76,7 @@
extern int amdgpu_modeset;
extern int amdgpu_vram_limit;
extern int amdgpu_gart_size;
+extern unsigned amdgpu_gart_sys_limit;
extern int amdgpu_moverate;
extern int amdgpu_benchmarking;
extern int amdgpu_testing;
@@ -605,6 +606,7 @@ struct amdgpu_mc {
u64 mc_vram_size;
u64 visible_vram_size;
u64 gtt_size;
+ u64 gtt_sys_limit;
u64 gtt_start;
u64 gtt_end;
u64 vram_start;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 5b1220f..7e3f8cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1122,6 +1122,12 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
}
}
+ if (amdgpu_gart_sys_limit < 32) {
+ dev_warn(adev->dev, "gart sys limit (%d) too small\n",
+ amdgpu_gart_sys_limit);
+ amdgpu_gart_sys_limit = 32;
+ }
+
amdgpu_check_vm_size(adev);
amdgpu_check_block_size(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 5a1d794..907ae5e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -75,6 +75,7 @@
int amdgpu_vram_limit = 0;
int amdgpu_gart_size = -1; /* auto */
+unsigned amdgpu_gart_sys_limit = 256;
int amdgpu_moverate = -1; /* auto */
int amdgpu_benchmarking = 0;
int amdgpu_testing = 0;
@@ -124,6 +125,9 @@ module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
module_param_named(gartsize, amdgpu_gart_size, int, 0600);
+MODULE_PARM_DESC(gartlimit, "GART limit for the system domain in megabytes (default 256)");
+module_param_named(gartlimit, amdgpu_gart_sys_limit, int, 0600);
+
MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)");
module_param_named(moverate, amdgpu_moverate, int, 0600);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index d99b2b2..f82eeaa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -70,6 +70,9 @@ void amdgpu_gart_set_defaults(struct amdgpu_device *adev)
adev->mc.mc_vram_size);
else
adev->mc.gtt_size = (uint64_t)amdgpu_gart_size << 20;
+
+ adev->mc.gtt_sys_limit = min((uint64_t)amdgpu_gart_sys_limit << 20,
+ adev->mc.gtt_size);
}
/**
@@ -384,8 +387,9 @@ int amdgpu_gart_init(struct amdgpu_device *adev)
if (r)
return r;
/* Compute table size */
- adev->gart.num_cpu_pages = adev->mc.gtt_size / PAGE_SIZE;
- adev->gart.num_gpu_pages = adev->mc.gtt_size / AMDGPU_GPU_PAGE_SIZE;
+ adev->gart.num_cpu_pages = adev->mc.gtt_sys_limit / PAGE_SIZE;
+ adev->gart.num_gpu_pages = adev->mc.gtt_sys_limit /
+ AMDGPU_GPU_PAGE_SIZE;
DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
adev->gart.num_cpu_pages, adev->gart.num_gpu_pages);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index a0976dc..9b516c5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -42,6 +42,7 @@ struct amdgpu_gtt_mgr {
static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
unsigned long p_size)
{
+ struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
struct amdgpu_gtt_mgr *mgr;
uint64_t start, size;
@@ -50,7 +51,7 @@ static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
return -ENOMEM;
start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
- size = p_size - start;
+ size = (adev->mc.gtt_sys_limit >> PAGE_SHIFT) - start;
drm_mm_init(&mgr->mm, start, size);
spin_lock_init(&mgr->lock);
mgr->available = p_size;
@@ -112,6 +113,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
const struct ttm_place *place,
struct ttm_mem_reg *mem)
{
+ struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
struct amdgpu_gtt_mgr *mgr = man->priv;
struct drm_mm_node *node = mem->mm_node;
enum drm_mm_insert_mode mode;
@@ -129,7 +131,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
if (place && place->lpfn)
lpfn = place->lpfn;
else
- lpfn = man->size;
+ lpfn = adev->gart.num_cpu_pages;
mode = DRM_MM_INSERT_BEST;
if (place && place->flags & TTM_PL_FLAG_TOPDOWN)
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 01/12] drm/amdgpu: move ring helpers to amdgpu_ring.h
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (10 preceding siblings ...)
2017-06-30 11:22 ` [PATCH 12/12] drm/amdgpu: add gtt_sys_limit Christian König
@ 2017-06-30 16:15 ` Alex Deucher
2017-06-30 22:40 ` Felix Kuehling
12 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:15 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Keep them where they belong.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 44 --------------------------------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 42 ++++++++++++++++++++++++++++++
> 2 files changed, 42 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index ab1dad2..810796a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1801,50 +1801,6 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
> #define RBIOS16(i) (RBIOS8(i) | (RBIOS8((i)+1) << 8))
> #define RBIOS32(i) ((RBIOS16(i)) | (RBIOS16((i)+2) << 16))
>
> -/*
> - * RING helpers.
> - */
> -static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)
> -{
> - if (ring->count_dw <= 0)
> - DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> - ring->ring[ring->wptr++ & ring->buf_mask] = v;
> - ring->wptr &= ring->ptr_mask;
> - ring->count_dw--;
> -}
> -
> -static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, void *src, int count_dw)
> -{
> - unsigned occupied, chunk1, chunk2;
> - void *dst;
> -
> - if (unlikely(ring->count_dw < count_dw)) {
> - DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> - return;
> - }
> -
> - occupied = ring->wptr & ring->buf_mask;
> - dst = (void *)&ring->ring[occupied];
> - chunk1 = ring->buf_mask + 1 - occupied;
> - chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
> - chunk2 = count_dw - chunk1;
> - chunk1 <<= 2;
> - chunk2 <<= 2;
> -
> - if (chunk1)
> - memcpy(dst, src, chunk1);
> -
> - if (chunk2) {
> - src += chunk1;
> - dst = (void *)ring->ring;
> - memcpy(dst, src, chunk2);
> - }
> -
> - ring->wptr += count_dw;
> - ring->wptr &= ring->ptr_mask;
> - ring->count_dw -= count_dw;
> -}
> -
> static inline struct amdgpu_sdma_instance *
> amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
> {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index bc8dec9..04cbc3a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -212,4 +212,46 @@ static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring)
>
> }
>
> +static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)
> +{
> + if (ring->count_dw <= 0)
> + DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> + ring->ring[ring->wptr++ & ring->buf_mask] = v;
> + ring->wptr &= ring->ptr_mask;
> + ring->count_dw--;
> +}
> +
> +static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,
> + void *src, int count_dw)
> +{
> + unsigned occupied, chunk1, chunk2;
> + void *dst;
> +
> + if (unlikely(ring->count_dw < count_dw)) {
> + DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> + return;
> + }
> +
> + occupied = ring->wptr & ring->buf_mask;
> + dst = (void *)&ring->ring[occupied];
> + chunk1 = ring->buf_mask + 1 - occupied;
> + chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
> + chunk2 = count_dw - chunk1;
> + chunk1 <<= 2;
> + chunk2 <<= 2;
> +
> + if (chunk1)
> + memcpy(dst, src, chunk1);
> +
> + if (chunk2) {
> + src += chunk1;
> + dst = (void *)ring->ring;
> + memcpy(dst, src, chunk2);
> + }
> +
> + ring->wptr += count_dw;
> + ring->wptr &= ring->ptr_mask;
> + ring->count_dw -= count_dw;
> +}
> +
> #endif
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 02/12] drm/amdgpu: fix amdgpu_ring_write_multiple
[not found] ` <1498821733-1545-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:16 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:16 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Overwriting still used ring content has a low probability to cause
> problems, not writing at all has 100% probability to cause problems.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index 04cbc3a..322d2529 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -227,10 +227,8 @@ static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,
> unsigned occupied, chunk1, chunk2;
> void *dst;
>
> - if (unlikely(ring->count_dw < count_dw)) {
> + if (unlikely(ring->count_dw < count_dw))
> DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> - return;
> - }
>
> occupied = ring->wptr & ring->buf_mask;
> dst = (void *)&ring->ring[occupied];
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 03/12] drm/amdgpu: allow flushing VMID0 before IB execution as well
[not found] ` <1498821733-1545-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:20 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:20 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> This allows us to queue IBs which needs an up to date system domain as well.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 ++
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index f774b3f..1b30d2a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -172,7 +172,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
> if (ring->funcs->insert_start)
> ring->funcs->insert_start(ring);
>
> - if (vm) {
> + if (job) {
> r = amdgpu_vm_flush(ring, job);
> if (r) {
> amdgpu_ring_undo(ring);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> index 3d641e1..4510627 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> @@ -81,6 +81,8 @@ int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
> r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]);
> if (r)
> kfree(*job);
> + else
> + (*job)->vm_pd_addr = adev->gart.table_addr;
>
> return r;
> }
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 04/12] drm/amdgpu: add vm_needs_flush parameter to amdgpu_copy_buffer
[not found] ` <1498821733-1545-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:22 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:22 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> This allows us to flush the system VM here.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_test.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 12 ++++++------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 9 ++++-----
> 5 files changed, 15 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
> index 1beae5b..2fb299a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
> @@ -40,7 +40,7 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size,
> for (i = 0; i < n; i++) {
> struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
> r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence,
> - false);
> + false, false);
> if (r)
> goto exit_do_move;
> r = dma_fence_wait(fence, false);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 8ee6965..c34cf2c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -535,7 +535,7 @@ int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
>
> r = amdgpu_copy_buffer(ring, bo_addr, shadow_addr,
> amdgpu_bo_size(bo), resv, fence,
> - direct);
> + direct, false);
> if (!r)
> amdgpu_bo_fence(bo, *fence, true);
>
> @@ -588,7 +588,7 @@ int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
>
> r = amdgpu_copy_buffer(ring, shadow_addr, bo_addr,
> amdgpu_bo_size(bo), resv, fence,
> - direct);
> + direct, false);
> if (!r)
> amdgpu_bo_fence(bo, *fence, true);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
> index 15510da..d02e611 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
> @@ -111,7 +111,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
> amdgpu_bo_kunmap(gtt_obj[i]);
>
> r = amdgpu_copy_buffer(ring, gtt_addr, vram_addr,
> - size, NULL, &fence, false);
> + size, NULL, &fence, false, false);
>
> if (r) {
> DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
> @@ -156,7 +156,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
> amdgpu_bo_kunmap(vram_obj);
>
> r = amdgpu_copy_buffer(ring, vram_addr, gtt_addr,
> - size, NULL, &fence, false);
> + size, NULL, &fence, false, false);
>
> if (r) {
> DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index e4860ac..bbe1639 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -318,7 +318,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
>
> r = amdgpu_copy_buffer(ring, old_start, new_start,
> cur_pages * PAGE_SIZE,
> - bo->resv, &next, false);
> + bo->resv, &next, false, false);
> if (r)
> goto error;
>
> @@ -1256,12 +1256,11 @@ int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma)
> return ttm_bo_mmap(filp, vma, &adev->mman.bdev);
> }
>
> -int amdgpu_copy_buffer(struct amdgpu_ring *ring,
> - uint64_t src_offset,
> - uint64_t dst_offset,
> - uint32_t byte_count,
> +int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
> + uint64_t dst_offset, uint32_t byte_count,
> struct reservation_object *resv,
> - struct dma_fence **fence, bool direct_submit)
> + struct dma_fence **fence, bool direct_submit,
> + bool vm_needs_flush)
> {
> struct amdgpu_device *adev = ring->adev;
> struct amdgpu_job *job;
> @@ -1283,6 +1282,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring,
> if (r)
> return r;
>
> + job->vm_needs_flush = vm_needs_flush;
> if (resv) {
> r = amdgpu_sync_resv(adev, &job->sync, resv,
> AMDGPU_FENCE_OWNER_UNDEFINED);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index 6bdede8..cd5bbfa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -61,12 +61,11 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
> const struct ttm_place *place,
> struct ttm_mem_reg *mem);
>
> -int amdgpu_copy_buffer(struct amdgpu_ring *ring,
> - uint64_t src_offset,
> - uint64_t dst_offset,
> - uint32_t byte_count,
> +int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
> + uint64_t dst_offset, uint32_t byte_count,
> struct reservation_object *resv,
> - struct dma_fence **fence, bool direct_submit);
> + struct dma_fence **fence, bool direct_submit,
> + bool vm_needs_flush);
> int amdgpu_fill_buffer(struct amdgpu_bo *bo,
> uint32_t src_data,
> struct reservation_object *resv,
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 05/12] drm/amdgpu: bind BOs to TTM only once
[not found] ` <1498821733-1545-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:25 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:25 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> No need to do this on every round.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 70 ++++++++++++++-------------------
> 1 file changed, 29 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index bbe1639..5bfe7f6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -252,29 +252,15 @@ static void amdgpu_move_null(struct ttm_buffer_object *bo,
> new_mem->mm_node = NULL;
> }
>
> -static int amdgpu_mm_node_addr(struct ttm_buffer_object *bo,
> - struct drm_mm_node *mm_node,
> - struct ttm_mem_reg *mem,
> - uint64_t *addr)
> +static uint64_t amdgpu_mm_node_addr(struct ttm_buffer_object *bo,
> + struct drm_mm_node *mm_node,
> + struct ttm_mem_reg *mem)
> {
> - int r;
> -
> - switch (mem->mem_type) {
> - case TTM_PL_TT:
> - r = amdgpu_ttm_bind(bo, mem);
> - if (r)
> - return r;
> -
> - case TTM_PL_VRAM:
> - *addr = mm_node->start << PAGE_SHIFT;
> - *addr += bo->bdev->man[mem->mem_type].gpu_offset;
> - break;
> - default:
> - DRM_ERROR("Unknown placement %d\n", mem->mem_type);
> - return -EINVAL;
> - }
> + uint64_t addr;
>
> - return 0;
> + addr = mm_node->start << PAGE_SHIFT;
> + addr += bo->bdev->man[mem->mem_type].gpu_offset;
> + return addr;
> }
>
> static int amdgpu_move_blit(struct ttm_buffer_object *bo,
> @@ -298,18 +284,25 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
> return -EINVAL;
> }
>
> + if (old_mem->mem_type == TTM_PL_TT) {
> + r = amdgpu_ttm_bind(bo, old_mem);
> + if (r)
> + return r;
> + }
> +
> old_mm = old_mem->mm_node;
> - r = amdgpu_mm_node_addr(bo, old_mm, old_mem, &old_start);
> - if (r)
> - return r;
> old_size = old_mm->size;
> + old_start = amdgpu_mm_node_addr(bo, old_mm, old_mem);
>
> + if (new_mem->mem_type == TTM_PL_TT) {
> + r = amdgpu_ttm_bind(bo, new_mem);
> + if (r)
> + return r;
> + }
>
> new_mm = new_mem->mm_node;
> - r = amdgpu_mm_node_addr(bo, new_mm, new_mem, &new_start);
> - if (r)
> - return r;
> new_size = new_mm->size;
> + new_start = amdgpu_mm_node_addr(bo, new_mm, new_mem);
>
> num_pages = new_mem->num_pages;
> while (num_pages) {
> @@ -331,10 +324,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
>
> old_size -= cur_pages;
> if (!old_size) {
> - r = amdgpu_mm_node_addr(bo, ++old_mm, old_mem,
> - &old_start);
> - if (r)
> - goto error;
> + old_start = amdgpu_mm_node_addr(bo, ++old_mm, old_mem);
> old_size = old_mm->size;
> } else {
> old_start += cur_pages * PAGE_SIZE;
> @@ -342,11 +332,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
>
> new_size -= cur_pages;
> if (!new_size) {
> - r = amdgpu_mm_node_addr(bo, ++new_mm, new_mem,
> - &new_start);
> - if (r)
> - goto error;
> -
> + new_start = amdgpu_mm_node_addr(bo, ++new_mm, new_mem);
> new_size = new_mm->size;
> } else {
> new_start += cur_pages * PAGE_SIZE;
> @@ -1347,6 +1333,12 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
> return -EINVAL;
> }
>
> + if (bo->tbo.mem.mem_type == TTM_PL_TT) {
> + r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
> + if (r)
> + return r;
> + }
> +
> num_pages = bo->tbo.num_pages;
> mm_node = bo->tbo.mem.mm_node;
> num_loops = 0;
> @@ -1382,11 +1374,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
> uint32_t byte_count = mm_node->size << PAGE_SHIFT;
> uint64_t dst_addr;
>
> - r = amdgpu_mm_node_addr(&bo->tbo, mm_node,
> - &bo->tbo.mem, &dst_addr);
> - if (r)
> - return r;
> -
> + dst_addr = amdgpu_mm_node_addr(&bo->tbo, mm_node, &bo->tbo.mem);
> while (byte_count) {
> uint32_t cur_size_in_bytes = min(byte_count, max_bytes);
>
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 06/12] drm/amdgpu: bind BOs with GTT space allocated directly
[not found] ` <1498821733-1545-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:32 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:32 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> This avoids binding them later on.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 16 +++++++++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 49 ++++++++++++++++++-----------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 1 +
> 3 files changed, 46 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> index f7d22c4..6fdf83a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> @@ -81,6 +81,20 @@ static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man)
> }
>
> /**
> + * amdgpu_gtt_mgr_is_allocated - Check if mem has address space
> + *
> + * @mem: the mem object to check
> + *
> + * Check if a mem object has already address space allocated.
> + */
> +bool amdgpu_gtt_mgr_is_alloced(struct ttm_mem_reg *mem)
mismatch between documentation and function name. I prefer the full
amdgpu_gtt_mgr_is_allocated or even better
amdgpu_gtt_mgr_addr_is_allocated. With that fixed up:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> +{
> + struct drm_mm_node *node = mem->mm_node;
> +
> + return (node->start != AMDGPU_BO_INVALID_OFFSET);
> +}
> +
> +/**
> * amdgpu_gtt_mgr_alloc - allocate new ranges
> *
> * @man: TTM memory type manager
> @@ -101,7 +115,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
> unsigned long fpfn, lpfn;
> int r;
>
> - if (node->start != AMDGPU_BO_INVALID_OFFSET)
> + if (amdgpu_gtt_mgr_is_alloced(mem))
> return 0;
>
> if (place)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 5bfe7f6..eb0d7d7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -681,6 +681,31 @@ static void amdgpu_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
> sg_free_table(ttm->sg);
> }
>
> +static int amdgpu_ttm_do_bind(struct ttm_tt *ttm, struct ttm_mem_reg *mem)
> +{
> + struct amdgpu_ttm_tt *gtt = (void *)ttm;
> + uint64_t flags;
> + int r;
> +
> + spin_lock(>t->adev->gtt_list_lock);
> + flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, mem);
> + gtt->offset = (u64)mem->start << PAGE_SHIFT;
> + r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages,
> + ttm->pages, gtt->ttm.dma_address, flags);
> +
> + if (r) {
> + DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
> + ttm->num_pages, gtt->offset);
> + goto error_gart_bind;
> + }
> +
> + list_add_tail(>t->list, >t->adev->gtt_list);
> +error_gart_bind:
> + spin_unlock(>t->adev->gtt_list_lock);
> + return r;
> +
> +}
> +
> static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
> struct ttm_mem_reg *bo_mem)
> {
> @@ -704,7 +729,10 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
> bo_mem->mem_type == AMDGPU_PL_OA)
> return -EINVAL;
>
> - return 0;
> + if (amdgpu_gtt_mgr_is_alloced(bo_mem))
> + r = amdgpu_ttm_do_bind(ttm, bo_mem);
> +
> + return r;
> }
>
> bool amdgpu_ttm_is_bound(struct ttm_tt *ttm)
> @@ -717,8 +745,6 @@ bool amdgpu_ttm_is_bound(struct ttm_tt *ttm)
> int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem)
> {
> struct ttm_tt *ttm = bo->ttm;
> - struct amdgpu_ttm_tt *gtt = (void *)bo->ttm;
> - uint64_t flags;
> int r;
>
> if (!ttm || amdgpu_ttm_is_bound(ttm))
> @@ -731,22 +757,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem)
> return r;
> }
>
> - spin_lock(>t->adev->gtt_list_lock);
> - flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, bo_mem);
> - gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
> - r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages,
> - ttm->pages, gtt->ttm.dma_address, flags);
> -
> - if (r) {
> - DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
> - ttm->num_pages, gtt->offset);
> - goto error_gart_bind;
> - }
> -
> - list_add_tail(>t->list, >t->adev->gtt_list);
> -error_gart_bind:
> - spin_unlock(>t->adev->gtt_list_lock);
> - return r;
> + return amdgpu_ttm_do_bind(ttm, bo_mem);
> }
>
> int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index cd5bbfa..2ade5c5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -56,6 +56,7 @@ struct amdgpu_mman {
> extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func;
> extern const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func;
>
> +bool amdgpu_gtt_mgr_is_alloced(struct ttm_mem_reg *mem);
> int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
> struct ttm_buffer_object *tbo,
> const struct ttm_place *place,
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 07/12] drm/amdgpu: reserve the first 2x2MB of GART
[not found] ` <1498821733-1545-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:41 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:41 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> We want to use them as remap address space.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 5 ++++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +++
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> index 6fdf83a..a0976dc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> @@ -43,12 +43,15 @@ static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
> unsigned long p_size)
> {
> struct amdgpu_gtt_mgr *mgr;
> + uint64_t start, size;
>
> mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
> if (!mgr)
> return -ENOMEM;
>
> - drm_mm_init(&mgr->mm, 0, p_size);
> + start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
> + size = p_size - start;
> + drm_mm_init(&mgr->mm, start, size);
> spin_lock_init(&mgr->lock);
> mgr->available = p_size;
> man->priv = mgr;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index 2ade5c5..9c4da0a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -34,6 +34,9 @@
> #define AMDGPU_PL_FLAG_GWS (TTM_PL_FLAG_PRIV << 1)
> #define AMDGPU_PL_FLAG_OA (TTM_PL_FLAG_PRIV << 2)
>
> +#define AMDGPU_GTT_MAX_TRANSFER_SIZE 512
Maybe AMDGPU_GTT_MAX_TRANSFER_SIZE_PAGES? Also you may want to update
the patch title to say 2x512 pages rather than 2x2MB.
> +#define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
> +
> struct amdgpu_mman {
> struct ttm_bo_global_ref bo_global_ref;
> struct drm_global_reference mem_global_ref;
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 08/12] drm/amdgpu: add amdgpu_gart_map function
[not found] ` <1498821733-1545-8-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:43 ` Alex Deucher
2017-07-01 11:37 ` Nils Wallménius
1 sibling, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:43 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> This allows us to write the mapped PTEs into
> an IB instead of the table directly.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 64 ++++++++++++++++++++++++--------
> 2 files changed, 52 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 810796a..4a2b33d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -572,6 +572,9 @@ int amdgpu_gart_init(struct amdgpu_device *adev);
> void amdgpu_gart_fini(struct amdgpu_device *adev);
> int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
> int pages);
> +int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
> + int pages, dma_addr_t *dma_addr, uint64_t flags,
> + void *dst);
> int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
> int pages, struct page **pagelist,
> dma_addr_t *dma_addr, uint64_t flags);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> index 8877015..d99b2b2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> @@ -280,6 +280,43 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
> }
>
> /**
> + * amdgpu_gart_map - map dma_addresses into GART entries
> + *
> + * @adev: amdgpu_device pointer
> + * @offset: offset into the GPU's gart aperture
> + * @pages: number of pages to bind
> + * @dma_addr: DMA addresses of pages
> + *
> + * Map the dma_addresses into GART entries (all asics).
> + * Returns 0 for success, -EINVAL for failure.
> + */
> +int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
> + int pages, dma_addr_t *dma_addr, uint64_t flags,
> + void *dst)
> +{
> + uint64_t page_base;
> + unsigned t, p;
> + int i, j;
> +
> + if (!adev->gart.ready) {
> + WARN(1, "trying to bind memory to uninitialized GART !\n");
> + return -EINVAL;
> + }
> +
> + t = offset / AMDGPU_GPU_PAGE_SIZE;
> + p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> +
> + for (i = 0; i < pages; i++, p++) {
> + page_base = dma_addr[i];
> + for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
> + amdgpu_gart_set_pte_pde(adev, dst, t, page_base, flags);
> + page_base += AMDGPU_GPU_PAGE_SIZE;
> + }
> + }
> + return 0;
> +}
> +
> +/**
> * amdgpu_gart_bind - bind pages into the gart page table
> *
> * @adev: amdgpu_device pointer
> @@ -296,31 +333,28 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
> int pages, struct page **pagelist, dma_addr_t *dma_addr,
> uint64_t flags)
> {
> - unsigned t;
> - unsigned p;
> - uint64_t page_base;
> - int i, j;
> +#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
> + unsigned i;
> +#endif
> + int r;
>
> if (!adev->gart.ready) {
> WARN(1, "trying to bind memory to uninitialized GART !\n");
> return -EINVAL;
> }
>
> - t = offset / AMDGPU_GPU_PAGE_SIZE;
> - p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> -
> - for (i = 0; i < pages; i++, p++) {
> #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
> + for (i = 0; i < pages; i++, p++)
> adev->gart.pages[p] = pagelist[i];
> #endif
> - if (adev->gart.ptr) {
> - page_base = dma_addr[i];
> - for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
> - amdgpu_gart_set_pte_pde(adev, adev->gart.ptr, t, page_base, flags);
> - page_base += AMDGPU_GPU_PAGE_SIZE;
> - }
> - }
> +
> + if (adev->gart.ptr) {
> + r = amdgpu_gart_map(adev, offset, pages, dma_addr, flags,
> + adev->gart.ptr);
> + if (r)
> + return r;
> }
> +
> mb();
> amdgpu_gart_flush_gpu_tlb(adev, 0);
> return 0;
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 09/12] drm/amdgpu: use the GTT windows for BO moves
[not found] ` <1498821733-1545-9-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:47 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:47 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> This way we don't need to map the full BO at a time any more.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 127 +++++++++++++++++++++++++++-----
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +
> 2 files changed, 111 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index eb0d7d7..247ce21 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -47,10 +47,15 @@
>
> #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
>
> +static int amdgpu_map_buffer(struct ttm_buffer_object *bo,
> + struct ttm_mem_reg *mem,
> + unsigned num_pages, uint64_t offset,
> + struct amdgpu_ring *ring,
> + uint64_t *addr);
> +
> static int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
> static void amdgpu_ttm_debugfs_fini(struct amdgpu_device *adev);
>
> -
> /*
> * Global memory.
> */
> @@ -97,6 +102,9 @@ static int amdgpu_ttm_global_init(struct amdgpu_device *adev)
> goto error_bo;
> }
>
> + mutex_init(&adev->mman.gtt_window_lock);
> + adev->mman.gtt_index = 0;
> +
> ring = adev->mman.buffer_funcs_ring;
> rq = &ring->sched.sched_rq[AMD_SCHED_PRIORITY_KERNEL];
> r = amd_sched_entity_init(&ring->sched, &adev->mman.entity,
> @@ -123,6 +131,7 @@ static void amdgpu_ttm_global_fini(struct amdgpu_device *adev)
> if (adev->mman.mem_global_referenced) {
> amd_sched_entity_fini(adev->mman.entity.sched,
> &adev->mman.entity);
> + mutex_destroy(&adev->mman.gtt_window_lock);
> drm_global_item_unref(&adev->mman.bo_global_ref.ref);
> drm_global_item_unref(&adev->mman.mem_global_ref);
> adev->mman.mem_global_referenced = false;
> @@ -256,10 +265,12 @@ static uint64_t amdgpu_mm_node_addr(struct ttm_buffer_object *bo,
> struct drm_mm_node *mm_node,
> struct ttm_mem_reg *mem)
> {
> - uint64_t addr;
> + uint64_t addr = 0;
>
> - addr = mm_node->start << PAGE_SHIFT;
> - addr += bo->bdev->man[mem->mem_type].gpu_offset;
> + if (mm_node->start != AMDGPU_BO_INVALID_OFFSET) {
> + addr = mm_node->start << PAGE_SHIFT;
> + addr += bo->bdev->man[mem->mem_type].gpu_offset;
> + }
> return addr;
> }
>
> @@ -284,34 +295,41 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
> return -EINVAL;
> }
>
> - if (old_mem->mem_type == TTM_PL_TT) {
> - r = amdgpu_ttm_bind(bo, old_mem);
> - if (r)
> - return r;
> - }
> -
> old_mm = old_mem->mm_node;
> old_size = old_mm->size;
> old_start = amdgpu_mm_node_addr(bo, old_mm, old_mem);
>
> - if (new_mem->mem_type == TTM_PL_TT) {
> - r = amdgpu_ttm_bind(bo, new_mem);
> - if (r)
> - return r;
> - }
> -
> new_mm = new_mem->mm_node;
> new_size = new_mm->size;
> new_start = amdgpu_mm_node_addr(bo, new_mm, new_mem);
>
> num_pages = new_mem->num_pages;
> + mutex_lock(&adev->mman.gtt_window_lock);
> while (num_pages) {
> - unsigned long cur_pages = min(old_size, new_size);
> + unsigned long cur_pages = min(min(old_size, new_size),
> + (u64)AMDGPU_GTT_MAX_TRANSFER_SIZE);
> + uint64_t from = old_start, to = new_start;
> struct dma_fence *next;
>
> - r = amdgpu_copy_buffer(ring, old_start, new_start,
> + if (old_mem->mem_type == TTM_PL_TT &&
> + !amdgpu_gtt_mgr_is_alloced(old_mem)) {
> + r = amdgpu_map_buffer(bo, old_mem, cur_pages,
> + old_start, ring, &from);
> + if (r)
> + goto error;
> + }
> +
> + if (new_mem->mem_type == TTM_PL_TT &&
> + !amdgpu_gtt_mgr_is_alloced(new_mem)) {
> + r = amdgpu_map_buffer(bo, new_mem, cur_pages,
> + new_start, ring, &to);
> + if (r)
> + goto error;
> + }
> +
> + r = amdgpu_copy_buffer(ring, from, to,
> cur_pages * PAGE_SIZE,
> - bo->resv, &next, false, false);
> + bo->resv, &next, false, true);
> if (r)
> goto error;
>
> @@ -338,12 +356,15 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
> new_start += cur_pages * PAGE_SIZE;
> }
> }
> + mutex_unlock(&adev->mman.gtt_window_lock);
>
> r = ttm_bo_pipeline_move(bo, fence, evict, new_mem);
> dma_fence_put(fence);
> return r;
>
> error:
> + mutex_unlock(&adev->mman.gtt_window_lock);
> +
> if (fence)
> dma_fence_wait(fence, false);
> dma_fence_put(fence);
> @@ -1253,6 +1274,74 @@ int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma)
> return ttm_bo_mmap(filp, vma, &adev->mman.bdev);
> }
>
> +static int amdgpu_map_buffer(struct ttm_buffer_object *bo,
> + struct ttm_mem_reg *mem,
> + unsigned num_pages, uint64_t offset,
> + struct amdgpu_ring *ring,
> + uint64_t *addr)
> +{
> + struct amdgpu_ttm_tt *gtt = (void *)bo->ttm;
> + struct amdgpu_device *adev = ring->adev;
> + struct ttm_tt *ttm = bo->ttm;
> + struct amdgpu_job *job;
> + unsigned num_dw, num_bytes, idx;
> + dma_addr_t *dma_address;
> + struct dma_fence *fence;
> + uint64_t src_addr, dst_addr;
> + uint64_t flags;
> + int r;
> +
> + BUG_ON(adev->mman.buffer_funcs->copy_max_bytes <
> + AMDGPU_GTT_MAX_TRANSFER_SIZE * 8);
> +
> + idx = adev->mman.gtt_index++;
> + adev->mman.gtt_index %= AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
> +
> + *addr = adev->mc.gtt_start;
> + *addr += (u64)idx * AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GPU_PAGE_SIZE;
> +
> + num_dw = adev->mman.buffer_funcs->copy_num_dw;
> + while (num_dw & 0x7)
> + num_dw++;
> +
> + num_bytes = num_pages * 8;
> +
> + r = amdgpu_job_alloc_with_ib(adev, num_dw * 4 + num_bytes, &job);
> + if (r)
> + return r;
> +
> + src_addr = num_dw * 4;
> + src_addr += job->ibs[0].gpu_addr;
> +
> + dst_addr = adev->gart.table_addr;
> + dst_addr += idx * AMDGPU_GTT_MAX_TRANSFER_SIZE * 8;
> + amdgpu_emit_copy_buffer(adev, &job->ibs[0], src_addr,
> + dst_addr, num_bytes);
> +
> + amdgpu_ring_pad_ib(ring, &job->ibs[0]);
> + WARN_ON(job->ibs[0].length_dw > num_dw);
> +
> + dma_address = >t->ttm.dma_address[offset >> PAGE_SHIFT];
> + flags = amdgpu_ttm_tt_pte_flags(adev, ttm, mem);
> + r = amdgpu_gart_map(adev, 0, num_pages, dma_address, flags,
> + &job->ibs[0].ptr[num_dw]);
> + if (r)
> + goto error_free;
> +
> + r = amdgpu_job_submit(job, ring, &adev->mman.entity,
> + AMDGPU_FENCE_OWNER_UNDEFINED, &fence);
> + if (r)
> + goto error_free;
> +
> + dma_fence_put(fence);
> +
> + return r;
> +
> +error_free:
> + amdgpu_job_free(job);
> + return r;
> +}
> +
> int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
> uint64_t dst_offset, uint32_t byte_count,
> struct reservation_object *resv,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index 9c4da0a..2e1cce5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -52,6 +52,9 @@ struct amdgpu_mman {
> /* buffer handling */
> const struct amdgpu_buffer_funcs *buffer_funcs;
> struct amdgpu_ring *buffer_funcs_ring;
> +
> + struct mutex gtt_window_lock;
> + unsigned gtt_index;
> /* Scheduler entity for buffer moves */
> struct amd_sched_entity entity;
> };
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 10/12] drm/amdgpu: stop mapping BOs to GTT
[not found] ` <1498821733-1545-10-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:49 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:49 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> No need to map BOs to GTT on eviction and intermediate transfers any more.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 19 ++-----------------
> 1 file changed, 2 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 247ce21..e1ebcba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -200,7 +200,6 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
> .lpfn = 0,
> .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
> };
> - unsigned i;
>
> if (!amdgpu_ttm_bo_is_amdgpu_bo(bo)) {
> placement->placement = &placements;
> @@ -218,20 +217,6 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
> amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_CPU);
> } else {
> amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT);
> - for (i = 0; i < abo->placement.num_placement; ++i) {
> - if (!(abo->placements[i].flags &
> - TTM_PL_FLAG_TT))
> - continue;
> -
> - if (abo->placements[i].lpfn)
> - continue;
> -
> - /* set an upper limit to force directly
> - * allocating address space for the BO.
> - */
> - abo->placements[i].lpfn =
> - adev->mc.gtt_size >> PAGE_SHIFT;
> - }
> }
> break;
> case TTM_PL_TT:
> @@ -391,7 +376,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo,
> placement.num_busy_placement = 1;
> placement.busy_placement = &placements;
> placements.fpfn = 0;
> - placements.lpfn = adev->mc.gtt_size >> PAGE_SHIFT;
> + placements.lpfn = 0;
> placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
> r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
> interruptible, no_wait_gpu);
> @@ -438,7 +423,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo,
> placement.num_busy_placement = 1;
> placement.busy_placement = &placements;
> placements.fpfn = 0;
> - placements.lpfn = adev->mc.gtt_size >> PAGE_SHIFT;
> + placements.lpfn = 0;
> placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
> r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
> interruptible, no_wait_gpu);
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 11/12] drm/amdgpu: remove maximum BO size limitation.
[not found] ` <1498821733-1545-11-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:49 ` Alex Deucher
2017-07-03 3:14 ` Michel Dänzer
1 sibling, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:49 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> We can finally remove this now.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Woot!
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 -----------
> 1 file changed, 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index 96c4493..2382785 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -58,17 +58,6 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
> alignment = PAGE_SIZE;
> }
>
> - if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA))) {
> - /* Maximum bo size is the unpinned gtt size since we use the gtt to
> - * handle vram to system pool migrations.
> - */
> - max_size = adev->mc.gtt_size - adev->gart_pin_size;
> - if (size > max_size) {
> - DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
> - size >> 20, max_size >> 20);
> - return -ENOMEM;
> - }
> - }
> retry:
> r = amdgpu_bo_create(adev, size, alignment, kernel, initial_domain,
> flags, NULL, NULL, &robj);
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 12/12] drm/amdgpu: add gtt_sys_limit
[not found] ` <1498821733-1545-12-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-06-30 16:54 ` Alex Deucher
0 siblings, 0 replies; 27+ messages in thread
From: Alex Deucher @ 2017-06-30 16:54 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Fri, Jun 30, 2017 at 7:22 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Limit the size of the GART table for the system domain.
>
> This saves us a bunch of visible VRAM, but also limitates the maximum BO size we can swap out.
The last phrase can be dropped as it's no longer relevant.
Acked-by: Alex Deucher <alexander.deucher@amd.com>
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 8 ++++++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 6 ++++--
> 5 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 4a2b33d..ef8e6b9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -76,6 +76,7 @@
> extern int amdgpu_modeset;
> extern int amdgpu_vram_limit;
> extern int amdgpu_gart_size;
> +extern unsigned amdgpu_gart_sys_limit;
> extern int amdgpu_moverate;
> extern int amdgpu_benchmarking;
> extern int amdgpu_testing;
> @@ -605,6 +606,7 @@ struct amdgpu_mc {
> u64 mc_vram_size;
> u64 visible_vram_size;
> u64 gtt_size;
> + u64 gtt_sys_limit;
> u64 gtt_start;
> u64 gtt_end;
> u64 vram_start;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 5b1220f..7e3f8cb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1122,6 +1122,12 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
> }
> }
>
> + if (amdgpu_gart_sys_limit < 32) {
> + dev_warn(adev->dev, "gart sys limit (%d) too small\n",
> + amdgpu_gart_sys_limit);
> + amdgpu_gart_sys_limit = 32;
> + }
> +
> amdgpu_check_vm_size(adev);
>
> amdgpu_check_block_size(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 5a1d794..907ae5e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -75,6 +75,7 @@
>
> int amdgpu_vram_limit = 0;
> int amdgpu_gart_size = -1; /* auto */
> +unsigned amdgpu_gart_sys_limit = 256;
> int amdgpu_moverate = -1; /* auto */
> int amdgpu_benchmarking = 0;
> int amdgpu_testing = 0;
> @@ -124,6 +125,9 @@ module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
> MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
> module_param_named(gartsize, amdgpu_gart_size, int, 0600);
>
> +MODULE_PARM_DESC(gartlimit, "GART limit for the system domain in megabytes (default 256)");
> +module_param_named(gartlimit, amdgpu_gart_sys_limit, int, 0600);
> +
> MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)");
> module_param_named(moverate, amdgpu_moverate, int, 0600);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> index d99b2b2..f82eeaa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> @@ -70,6 +70,9 @@ void amdgpu_gart_set_defaults(struct amdgpu_device *adev)
> adev->mc.mc_vram_size);
> else
> adev->mc.gtt_size = (uint64_t)amdgpu_gart_size << 20;
> +
> + adev->mc.gtt_sys_limit = min((uint64_t)amdgpu_gart_sys_limit << 20,
> + adev->mc.gtt_size);
> }
>
> /**
> @@ -384,8 +387,9 @@ int amdgpu_gart_init(struct amdgpu_device *adev)
> if (r)
> return r;
> /* Compute table size */
> - adev->gart.num_cpu_pages = adev->mc.gtt_size / PAGE_SIZE;
> - adev->gart.num_gpu_pages = adev->mc.gtt_size / AMDGPU_GPU_PAGE_SIZE;
> + adev->gart.num_cpu_pages = adev->mc.gtt_sys_limit / PAGE_SIZE;
> + adev->gart.num_gpu_pages = adev->mc.gtt_sys_limit /
> + AMDGPU_GPU_PAGE_SIZE;
> DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
> adev->gart.num_cpu_pages, adev->gart.num_gpu_pages);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> index a0976dc..9b516c5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> @@ -42,6 +42,7 @@ struct amdgpu_gtt_mgr {
> static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
> unsigned long p_size)
> {
> + struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
> struct amdgpu_gtt_mgr *mgr;
> uint64_t start, size;
>
> @@ -50,7 +51,7 @@ static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
> return -ENOMEM;
>
> start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
> - size = p_size - start;
> + size = (adev->mc.gtt_sys_limit >> PAGE_SHIFT) - start;
> drm_mm_init(&mgr->mm, start, size);
> spin_lock_init(&mgr->lock);
> mgr->available = p_size;
> @@ -112,6 +113,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
> const struct ttm_place *place,
> struct ttm_mem_reg *mem)
> {
> + struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
> struct amdgpu_gtt_mgr *mgr = man->priv;
> struct drm_mm_node *node = mem->mm_node;
> enum drm_mm_insert_mode mode;
> @@ -129,7 +131,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
> if (place && place->lpfn)
> lpfn = place->lpfn;
> else
> - lpfn = man->size;
> + lpfn = adev->gart.num_cpu_pages;
>
> mode = DRM_MM_INSERT_BEST;
> if (place && place->flags & TTM_PL_FLAG_TOPDOWN)
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 01/12] drm/amdgpu: move ring helpers to amdgpu_ring.h
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (11 preceding siblings ...)
2017-06-30 16:15 ` [PATCH 01/12] drm/amdgpu: move ring helpers to amdgpu_ring.h Alex Deucher
@ 2017-06-30 22:40 ` Felix Kuehling
12 siblings, 0 replies; 27+ messages in thread
From: Felix Kuehling @ 2017-06-30 22:40 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Christian König
Thank you Christian! The series is Acked-by: Felix Kuehling
<Felix.Kuehling@amd.com>
Minor nit-pick in patch 6: I spotted 4-space indentation in
amdgpu_ttm_backend_bind.
I'm looking at patches 5 and 9 more closely, because I'll need to make
similar changes to the KFD IPC copy code.
Regards,
Felix
On 17-06-30 07:22 AM, Christian König wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Keep them where they belong.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 44 --------------------------------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 42 ++++++++++++++++++++++++++++++
> 2 files changed, 42 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index ab1dad2..810796a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1801,50 +1801,6 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
> #define RBIOS16(i) (RBIOS8(i) | (RBIOS8((i)+1) << 8))
> #define RBIOS32(i) ((RBIOS16(i)) | (RBIOS16((i)+2) << 16))
>
> -/*
> - * RING helpers.
> - */
> -static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)
> -{
> - if (ring->count_dw <= 0)
> - DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> - ring->ring[ring->wptr++ & ring->buf_mask] = v;
> - ring->wptr &= ring->ptr_mask;
> - ring->count_dw--;
> -}
> -
> -static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, void *src, int count_dw)
> -{
> - unsigned occupied, chunk1, chunk2;
> - void *dst;
> -
> - if (unlikely(ring->count_dw < count_dw)) {
> - DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> - return;
> - }
> -
> - occupied = ring->wptr & ring->buf_mask;
> - dst = (void *)&ring->ring[occupied];
> - chunk1 = ring->buf_mask + 1 - occupied;
> - chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
> - chunk2 = count_dw - chunk1;
> - chunk1 <<= 2;
> - chunk2 <<= 2;
> -
> - if (chunk1)
> - memcpy(dst, src, chunk1);
> -
> - if (chunk2) {
> - src += chunk1;
> - dst = (void *)ring->ring;
> - memcpy(dst, src, chunk2);
> - }
> -
> - ring->wptr += count_dw;
> - ring->wptr &= ring->ptr_mask;
> - ring->count_dw -= count_dw;
> -}
> -
> static inline struct amdgpu_sdma_instance *
> amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
> {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index bc8dec9..04cbc3a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -212,4 +212,46 @@ static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring)
>
> }
>
> +static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)
> +{
> + if (ring->count_dw <= 0)
> + DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> + ring->ring[ring->wptr++ & ring->buf_mask] = v;
> + ring->wptr &= ring->ptr_mask;
> + ring->count_dw--;
> +}
> +
> +static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,
> + void *src, int count_dw)
> +{
> + unsigned occupied, chunk1, chunk2;
> + void *dst;
> +
> + if (unlikely(ring->count_dw < count_dw)) {
> + DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
> + return;
> + }
> +
> + occupied = ring->wptr & ring->buf_mask;
> + dst = (void *)&ring->ring[occupied];
> + chunk1 = ring->buf_mask + 1 - occupied;
> + chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
> + chunk2 = count_dw - chunk1;
> + chunk1 <<= 2;
> + chunk2 <<= 2;
> +
> + if (chunk1)
> + memcpy(dst, src, chunk1);
> +
> + if (chunk2) {
> + src += chunk1;
> + dst = (void *)ring->ring;
> + memcpy(dst, src, chunk2);
> + }
> +
> + ring->wptr += count_dw;
> + ring->wptr &= ring->ptr_mask;
> + ring->count_dw -= count_dw;
> +}
> +
> #endif
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 08/12] drm/amdgpu: add amdgpu_gart_map function
[not found] ` <1498821733-1545-8-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:43 ` Alex Deucher
@ 2017-07-01 11:37 ` Nils Wallménius
1 sibling, 0 replies; 27+ messages in thread
From: Nils Wallménius @ 2017-07-01 11:37 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
[-- Attachment #1.1: Type: text/plain, Size: 4928 bytes --]
Hi Christian, two comments below
Den 30 juni 2017 1:22 em skrev "Christian König" <deathsimple@vodafone.de>:
From: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org>
This allows us to write the mapped PTEs into
an IB instead of the table directly.
Signed-off-by: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 64
++++++++++++++++++++++++--------
2 files changed, 52 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 810796a..4a2b33d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -572,6 +572,9 @@ int amdgpu_gart_init(struct amdgpu_device *adev);
void amdgpu_gart_fini(struct amdgpu_device *adev);
int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
int pages);
+int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
+ int pages, dma_addr_t *dma_addr, uint64_t flags,
+ void *dst);
int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
int pages, struct page **pagelist,
dma_addr_t *dma_addr, uint64_t flags);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index 8877015..d99b2b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -280,6 +280,43 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev,
uint64_t offset,
}
/**
+ * amdgpu_gart_map - map dma_addresses into GART entries
+ *
+ * @adev: amdgpu_device pointer
+ * @offset: offset into the GPU's gart aperture
+ * @pages: number of pages to bind
+ * @dma_addr: DMA addresses of pages
+ *
+ * Map the dma_addresses into GART entries (all asics).
+ * Returns 0 for success, -EINVAL for failure.
+ */
+int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
+ int pages, dma_addr_t *dma_addr, uint64_t flags,
+ void *dst)
+{
+ uint64_t page_base;
+ unsigned t, p;
+ int i, j;
+
+ if (!adev->gart.ready) {
+ WARN(1, "trying to bind memory to uninitialized GART !\n");
+ return -EINVAL;
+ }
+
+ t = offset / AMDGPU_GPU_PAGE_SIZE;
+ p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+
+ for (i = 0; i < pages; i++, p++) {
+ page_base = dma_addr[i];
+ for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++,
t++) {
+ amdgpu_gart_set_pte_pde(adev, dst, t, page_base,
flags);
+ page_base += AMDGPU_GPU_PAGE_SIZE;
+ }
+ }
+ return 0;
+}
The p variable seems set but not used in the above function.
+
+/**
* amdgpu_gart_bind - bind pages into the gart page table
*
* @adev: amdgpu_device pointer
@@ -296,31 +333,28 @@ int amdgpu_gart_bind(struct amdgpu_device *adev,
uint64_t offset,
int pages, struct page **pagelist, dma_addr_t
*dma_addr,
uint64_t flags)
{
- unsigned t;
- unsigned p;
- uint64_t page_base;
- int i, j;
+#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
+ unsigned i;
+#endif
+ int r;
if (!adev->gart.ready) {
WARN(1, "trying to bind memory to uninitialized GART !\n");
return -EINVAL;
}
- t = offset / AMDGPU_GPU_PAGE_SIZE;
- p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
-
- for (i = 0; i < pages; i++, p++) {
#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
+ for (i = 0; i < pages; i++, p++)
adev->gart.pages[p] = pagelist[i];
#endif
The p variable is not declared in this function so building with
CONFIG_DRM_AMDGPU_GART_DEBUGFS will fail.
Regards,
Nils
- if (adev->gart.ptr) {
- page_base = dma_addr[i];
- for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
j++, t++) {
- amdgpu_gart_set_pte_pde(adev,
adev->gart.ptr, t, page_base, flags);
- page_base += AMDGPU_GPU_PAGE_SIZE;
- }
- }
+
+ if (adev->gart.ptr) {
+ r = amdgpu_gart_map(adev, offset, pages, dma_addr, flags,
+ adev->gart.ptr);
+ if (r)
+ return r;
}
+
mb();
amdgpu_gart_flush_gpu_tlb(adev, 0);
return 0;
--
2.7.4
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^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 11/12] drm/amdgpu: remove maximum BO size limitation.
[not found] ` <1498821733-1545-11-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:49 ` Alex Deucher
@ 2017-07-03 3:14 ` Michel Dänzer
1 sibling, 0 replies; 27+ messages in thread
From: Michel Dänzer @ 2017-07-03 3:14 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On 30/06/17 08:22 PM, Christian König wrote:
> From: Christian König <christian.koenig@amd.com>
>
> We can finally remove this now.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 -----------
> 1 file changed, 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index 96c4493..2382785 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -58,17 +58,6 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
> alignment = PAGE_SIZE;
> }
>
> - if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA))) {
> - /* Maximum bo size is the unpinned gtt size since we use the gtt to
> - * handle vram to system pool migrations.
> - */
> - max_size = adev->mc.gtt_size - adev->gart_pin_size;
> - if (size > max_size) {
> - DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
> - size >> 20, max_size >> 20);
> - return -ENOMEM;
> - }
> - }
Do we still need to limit the size of VRAM BOs?
If not, remove the now unused max_size local.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2017-07-03 3:14 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-06-30 11:22 [PATCH 01/12] drm/amdgpu: move ring helpers to amdgpu_ring.h Christian König
[not found] ` <1498821733-1545-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 11:22 ` [PATCH 02/12] drm/amdgpu: fix amdgpu_ring_write_multiple Christian König
[not found] ` <1498821733-1545-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:16 ` Alex Deucher
2017-06-30 11:22 ` [PATCH 03/12] drm/amdgpu: allow flushing VMID0 before IB execution as well Christian König
[not found] ` <1498821733-1545-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:20 ` Alex Deucher
2017-06-30 11:22 ` [PATCH 04/12] drm/amdgpu: add vm_needs_flush parameter to amdgpu_copy_buffer Christian König
[not found] ` <1498821733-1545-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:22 ` Alex Deucher
2017-06-30 11:22 ` [PATCH 05/12] drm/amdgpu: bind BOs to TTM only once Christian König
[not found] ` <1498821733-1545-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:25 ` Alex Deucher
2017-06-30 11:22 ` [PATCH 06/12] drm/amdgpu: bind BOs with GTT space allocated directly Christian König
[not found] ` <1498821733-1545-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:32 ` Alex Deucher
2017-06-30 11:22 ` [PATCH 07/12] drm/amdgpu: reserve the first 2x2MB of GART Christian König
[not found] ` <1498821733-1545-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:41 ` Alex Deucher
2017-06-30 11:22 ` [PATCH 08/12] drm/amdgpu: add amdgpu_gart_map function Christian König
[not found] ` <1498821733-1545-8-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:43 ` Alex Deucher
2017-07-01 11:37 ` Nils Wallménius
2017-06-30 11:22 ` [PATCH 09/12] drm/amdgpu: use the GTT windows for BO moves Christian König
[not found] ` <1498821733-1545-9-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:47 ` Alex Deucher
2017-06-30 11:22 ` [PATCH 10/12] drm/amdgpu: stop mapping BOs to GTT Christian König
[not found] ` <1498821733-1545-10-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:49 ` Alex Deucher
2017-06-30 11:22 ` [PATCH 11/12] drm/amdgpu: remove maximum BO size limitation Christian König
[not found] ` <1498821733-1545-11-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:49 ` Alex Deucher
2017-07-03 3:14 ` Michel Dänzer
2017-06-30 11:22 ` [PATCH 12/12] drm/amdgpu: add gtt_sys_limit Christian König
[not found] ` <1498821733-1545-12-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-06-30 16:54 ` Alex Deucher
2017-06-30 16:15 ` [PATCH 01/12] drm/amdgpu: move ring helpers to amdgpu_ring.h Alex Deucher
2017-06-30 22:40 ` Felix Kuehling
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