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* Fwd: Req: about Polaris with RKL platform
       [not found] <CAJB-X+V5SLikZgkesXCoQ=EufSbj6ABLxKEtO71OSRwyJ1175Q@mail.gmail.com>
@ 2021-08-09 13:20 ` Koba Ko
  2021-08-09 14:37   ` Alex Deucher
  2021-08-10  1:05   ` [Intel-gfx] Req: split off intel pch definition and move into include/drm/ Koba Ko
  0 siblings, 2 replies; 8+ messages in thread
From: Koba Ko @ 2021-08-09 13:20 UTC (permalink / raw)
  To: amd-gfx; +Cc: Anthony Wong, Mario Limonciello

Previously, AMD had an issue about noise  with AMD-DG on the RKL platform
AMD provided a parameter.
#modprobe amdgpu ppfeaturemask=0xfff7bffb

 I thought it's better to check and assign values in amd gpu.
Have a trouble determining the type of pch(RKL or else),
search in amd drm driver and can't find any about this.
Would someone please guide me? if there's an existing function.

here's a proposal, check RKL PCH in amd driver,
the pch definitions must be splitted off from intel_pch.h in i915
folder to include/drm/intel_pch_definition.h

> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> @@ -1629,7 +1629,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
>
>         data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
>         data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
> -       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
> +       data->pcie_dpm_key_disabled = is_rkl_pch() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
>         /* need to set voltage control types before EVV patching */
>         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
>         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: Req: about Polaris with RKL platform
  2021-08-09 13:20 ` Fwd: Req: about Polaris with RKL platform Koba Ko
@ 2021-08-09 14:37   ` Alex Deucher
  2021-08-10  4:45     ` Mario Limonciello
  2021-08-10  1:05   ` [Intel-gfx] Req: split off intel pch definition and move into include/drm/ Koba Ko
  1 sibling, 1 reply; 8+ messages in thread
From: Alex Deucher @ 2021-08-09 14:37 UTC (permalink / raw)
  To: Koba Ko; +Cc: amd-gfx list, Anthony Wong, Mario Limonciello

On Mon, Aug 9, 2021 at 9:59 AM Koba Ko <koba.ko@canonical.com> wrote:
>
> Previously, AMD had an issue about noise  with AMD-DG on the RKL platform
> AMD provided a parameter.
> #modprobe amdgpu ppfeaturemask=0xfff7bffb
>
>  I thought it's better to check and assign values in amd gpu.
> Have a trouble determining the type of pch(RKL or else),
> search in amd drm driver and can't find any about this.
> Would someone please guide me? if there's an existing function.
>
> here's a proposal, check RKL PCH in amd driver,
> the pch definitions must be splitted off from intel_pch.h in i915
> folder to include/drm/intel_pch_definition.h

Yes, something like that would work.

Alex


>
> > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > @@ -1629,7 +1629,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
> >
> >         data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
> >         data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
> > -       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
> > +       data->pcie_dpm_key_disabled = is_rkl_pch() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
> >         /* need to set voltage control types before EVV patching */
> >         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
> >         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Intel-gfx] Req: split off intel pch definition and move into include/drm/
  2021-08-09 13:20 ` Fwd: Req: about Polaris with RKL platform Koba Ko
  2021-08-09 14:37   ` Alex Deucher
@ 2021-08-10  1:05   ` Koba Ko
  1 sibling, 0 replies; 8+ messages in thread
From: Koba Ko @ 2021-08-10  1:05 UTC (permalink / raw)
  To: intel-gfx

Previously, AMD had an issue about noise  with AMD-DG on the RKL platform
AMD provided a parameter.
#modprobe amdgpu ppfeaturemask=0xfff7bffb

 I thought it's better to check and assign values in amd gpu.
Have a trouble determining the type of pch(RKL or else),
search in amd drm driver and can't find any about this.
Would someone please guide me? if there's an existing function.

here's a proposal, check RKL PCH in amd driver,
the pch definitions must be splitted off from intel_pch.h in i915
folder to include/drm/intel_pch_definition.h

> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> @@ -1629,7 +1629,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
>
>         data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
>         data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
> -       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
> +       data->pcie_dpm_key_disabled = is_rkl_pch() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
>         /* need to set voltage control types before EVV patching */
>         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
>         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: Req: about Polaris with RKL platform
  2021-08-09 14:37   ` Alex Deucher
@ 2021-08-10  4:45     ` Mario Limonciello
  2021-08-10  4:57       ` Koba Ko
  0 siblings, 1 reply; 8+ messages in thread
From: Mario Limonciello @ 2021-08-10  4:45 UTC (permalink / raw)
  To: Alex Deucher; +Cc: Koba Ko, amd-gfx list, Anthony Wong

[-- Attachment #1: Type: text/plain, Size: 1931 bytes --]

On Mon, Aug 9, 2021 at 9:37 AM Alex Deucher <alexdeucher@gmail.com> wrote:

> On Mon, Aug 9, 2021 at 9:59 AM Koba Ko <koba.ko@canonical.com> wrote:
> >
> > Previously, AMD had an issue about noise  with AMD-DG on the RKL platform
> > AMD provided a parameter.
> > #modprobe amdgpu ppfeaturemask=0xfff7bffb
> >
> >  I thought it's better to check and assign values in amd gpu.
> > Have a trouble determining the type of pch(RKL or else),
> > search in amd drm driver and can't find any about this.
> > Would someone please guide me? if there's an existing function.
> >
> > here's a proposal, check RKL PCH in amd driver,
> > the pch definitions must be splitted off from intel_pch.h in i915
> > folder to include/drm/intel_pch_definition.h
>
> Yes, something like that would work.
>

Can the issue that prompted this also happen with other ASIC with the
newer SMU families?  If so, should it probably be added to all of them
or further up in the code where the mask normally gets set from module
parameters to add the extra check there.


> Alex
>
>
> >
> > > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > > @@ -1629,7 +1629,7 @@ static void smu7_init_dpm_defaults(struct
> pp_hwmgr *hwmgr)
> > >
> > >         data->mclk_dpm_key_disabled = hwmgr->feature_mask &
> PP_MCLK_DPM_MASK ? false : true;
> > >         data->sclk_dpm_key_disabled = hwmgr->feature_mask &
> PP_SCLK_DPM_MASK ? false : true;
> > > -       data->pcie_dpm_key_disabled = hwmgr->feature_mask &
> PP_PCIE_DPM_MASK ? false : true;
> > > +       data->pcie_dpm_key_disabled = is_rkl_pch() ||
> !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
> > >         /* need to set voltage control types before EVV patching */
> > >         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
> > >         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
>


-- 
Mario Limonciello
superm1@gmail.com

[-- Attachment #2: Type: text/html, Size: 3002 bytes --]

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: Req: about Polaris with RKL platform
  2021-08-10  4:45     ` Mario Limonciello
@ 2021-08-10  4:57       ` Koba Ko
  2021-08-10 15:09         ` Alex Deucher
  0 siblings, 1 reply; 8+ messages in thread
From: Koba Ko @ 2021-08-10  4:57 UTC (permalink / raw)
  To: Mario Limonciello; +Cc: Alex Deucher, amd-gfx list, Anthony Wong, Feng, Kenneth

On Tue, Aug 10, 2021 at 12:45 PM Mario Limonciello <superm1@gmail.com> wrote:
>
>
>
> On Mon, Aug 9, 2021 at 9:37 AM Alex Deucher <alexdeucher@gmail.com> wrote:
>>
>> On Mon, Aug 9, 2021 at 9:59 AM Koba Ko <koba.ko@canonical.com> wrote:
>> >
>> > Previously, AMD had an issue about noise  with AMD-DG on the RKL platform
>> > AMD provided a parameter.
>> > #modprobe amdgpu ppfeaturemask=0xfff7bffb
>> >
>> >  I thought it's better to check and assign values in amd gpu.
>> > Have a trouble determining the type of pch(RKL or else),
>> > search in amd drm driver and can't find any about this.
>> > Would someone please guide me? if there's an existing function.
>> >
>> > here's a proposal, check RKL PCH in amd driver,
>> > the pch definitions must be splitted off from intel_pch.h in i915
>> > folder to include/drm/intel_pch_definition.h
>>
>> Yes, something like that would work.
>
>
> Can the issue that prompted this also happen with other ASIC with the
> newer SMU families?  If so, should it probably be added to all of them
> or further up in the code where the mask normally gets set from module
> parameters to add the extra check there.

Would amd guys please clarify this?

Currently as i known,
for smu series, amd upstream this commit only for smu7 and also
provide modue parameters.
1.https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9d03730ecbc5afabfda26d4dbb014310bc4ea4d9
2. #modprobe amdgpu ppfeaturemask=0xfff7bffb

>
>>
>> Alex
>>
>>
>> >
>> > > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
>> > > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
>> > > @@ -1629,7 +1629,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
>> > >
>> > >         data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
>> > >         data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
>> > > -       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
>> > > +       data->pcie_dpm_key_disabled = is_rkl_pch() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
>> > >         /* need to set voltage control types before EVV patching */
>> > >         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
>> > >         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
>
>
>
> --
> Mario Limonciello
> superm1@gmail.com

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: Req: about Polaris with RKL platform
  2021-08-10  4:57       ` Koba Ko
@ 2021-08-10 15:09         ` Alex Deucher
  2021-08-11  1:14           ` Koba Ko
  0 siblings, 1 reply; 8+ messages in thread
From: Alex Deucher @ 2021-08-10 15:09 UTC (permalink / raw)
  To: Koba Ko; +Cc: Mario Limonciello, amd-gfx list, Anthony Wong, Feng, Kenneth

On Tue, Aug 10, 2021 at 12:57 AM Koba Ko <koba.ko@canonical.com> wrote:
>
> On Tue, Aug 10, 2021 at 12:45 PM Mario Limonciello <superm1@gmail.com> wrote:
> >
> >
> >
> > On Mon, Aug 9, 2021 at 9:37 AM Alex Deucher <alexdeucher@gmail.com> wrote:
> >>
> >> On Mon, Aug 9, 2021 at 9:59 AM Koba Ko <koba.ko@canonical.com> wrote:
> >> >
> >> > Previously, AMD had an issue about noise  with AMD-DG on the RKL platform
> >> > AMD provided a parameter.
> >> > #modprobe amdgpu ppfeaturemask=0xfff7bffb
> >> >
> >> >  I thought it's better to check and assign values in amd gpu.
> >> > Have a trouble determining the type of pch(RKL or else),
> >> > search in amd drm driver and can't find any about this.
> >> > Would someone please guide me? if there's an existing function.
> >> >
> >> > here's a proposal, check RKL PCH in amd driver,
> >> > the pch definitions must be splitted off from intel_pch.h in i915
> >> > folder to include/drm/intel_pch_definition.h
> >>
> >> Yes, something like that would work.
> >
> >
> > Can the issue that prompted this also happen with other ASIC with the
> > newer SMU families?  If so, should it probably be added to all of them
> > or further up in the code where the mask normally gets set from module
> > parameters to add the extra check there.
>
> Would amd guys please clarify this?
>
> Currently as i known,
> for smu series, amd upstream this commit only for smu7 and also
> provide modue parameters.
> 1.https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9d03730ecbc5afabfda26d4dbb014310bc4ea4d9
> 2. #modprobe amdgpu ppfeaturemask=0xfff7bffb

SMU7-based and vega10/12/20 asics require this.  Newer parts were
fixed in SMU firmware:
navi10:
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/navi10_smc.bin?id=4fe6e53b96095101eebe4639cd2e2b6ecd84650d
navi14:
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/navi14_smc.bin?id=8ab7abaf63e95c29e04e5811cb24730a81486096
for newer asics, 21.10 and newer firmwares.  E.g.,
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/sienna_cichlid_smc.bin?id=ef5ea5d1d3f0a72a92e0a09f6cff253560374a39

Alex


>
> >
> >>
> >> Alex
> >>
> >>
> >> >
> >> > > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> >> > > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> >> > > @@ -1629,7 +1629,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
> >> > >
> >> > >         data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
> >> > >         data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
> >> > > -       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
> >> > > +       data->pcie_dpm_key_disabled = is_rkl_pch() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
> >> > >         /* need to set voltage control types before EVV patching */
> >> > >         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
> >> > >         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
> >
> >
> >
> > --
> > Mario Limonciello
> > superm1@gmail.com

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: Req: about Polaris with RKL platform
  2021-08-10 15:09         ` Alex Deucher
@ 2021-08-11  1:14           ` Koba Ko
  2021-08-11 13:51             ` Alex Deucher
  0 siblings, 1 reply; 8+ messages in thread
From: Koba Ko @ 2021-08-11  1:14 UTC (permalink / raw)
  To: Alex Deucher; +Cc: Mario Limonciello, amd-gfx list, Anthony Wong, Feng, Kenneth

On Tue, Aug 10, 2021 at 11:09 PM Alex Deucher <alexdeucher@gmail.com> wrote:
>
> On Tue, Aug 10, 2021 at 12:57 AM Koba Ko <koba.ko@canonical.com> wrote:
> >
> > On Tue, Aug 10, 2021 at 12:45 PM Mario Limonciello <superm1@gmail.com> wrote:
> > >
> > >
> > >
> > > On Mon, Aug 9, 2021 at 9:37 AM Alex Deucher <alexdeucher@gmail.com> wrote:
> > >>
> > >> On Mon, Aug 9, 2021 at 9:59 AM Koba Ko <koba.ko@canonical.com> wrote:
> > >> >
> > >> > Previously, AMD had an issue about noise  with AMD-DG on the RKL platform
> > >> > AMD provided a parameter.
> > >> > #modprobe amdgpu ppfeaturemask=0xfff7bffb
> > >> >
> > >> >  I thought it's better to check and assign values in amd gpu.
> > >> > Have a trouble determining the type of pch(RKL or else),
> > >> > search in amd drm driver and can't find any about this.
> > >> > Would someone please guide me? if there's an existing function.
> > >> >
> > >> > here's a proposal, check RKL PCH in amd driver,
> > >> > the pch definitions must be splitted off from intel_pch.h in i915
> > >> > folder to include/drm/intel_pch_definition.h
> > >>
> > >> Yes, something like that would work.
> > >
> > >
> > > Can the issue that prompted this also happen with other ASIC with the
> > > newer SMU families?  If so, should it probably be added to all of them
> > > or further up in the code where the mask normally gets set from module
> > > parameters to add the extra check there.
> >
> > Would amd guys please clarify this?
> >
> > Currently as i known,
> > for smu series, amd upstream this commit only for smu7 and also
> > provide modue parameters.
> > 1.https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9d03730ecbc5afabfda26d4dbb014310bc4ea4d9
> > 2. #modprobe amdgpu ppfeaturemask=0xfff7bffb
>
> SMU7-based and vega10/12/20 asics require this.  Newer parts were
> fixed in SMU firmware:
> navi10:
> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/navi10_smc.bin?id=4fe6e53b96095101eebe4639cd2e2b6ecd84650d
> navi14:
> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/navi14_smc.bin?id=8ab7abaf63e95c29e04e5811cb24730a81486096
> for newer asics, 21.10 and newer firmwares.  E.g.,
> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/sienna_cichlid_smc.bin?id=ef5ea5d1d3f0a72a92e0a09f6cff253560374a39
>
With thie commit,
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9d03730ecbc5afabfda26d4dbb014310bc4ea4d9
For SMU7-based, the module parameter is still necessary, right?

> Alex
>
>
> >
> > >
> > >>
> > >> Alex
> > >>
> > >>
> > >> >
> > >> > > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > >> > > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > >> > > @@ -1629,7 +1629,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
> > >> > >
> > >> > >         data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
> > >> > >         data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
> > >> > > -       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
> > >> > > +       data->pcie_dpm_key_disabled = is_rkl_pch() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
> > >> > >         /* need to set voltage control types before EVV patching */
> > >> > >         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
> > >> > >         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
> > >
> > >
> > >
> > > --
> > > Mario Limonciello
> > > superm1@gmail.com

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: Req: about Polaris with RKL platform
  2021-08-11  1:14           ` Koba Ko
@ 2021-08-11 13:51             ` Alex Deucher
  0 siblings, 0 replies; 8+ messages in thread
From: Alex Deucher @ 2021-08-11 13:51 UTC (permalink / raw)
  To: Koba Ko; +Cc: Mario Limonciello, amd-gfx list, Anthony Wong, Feng, Kenneth

On Tue, Aug 10, 2021 at 9:14 PM Koba Ko <koba.ko@canonical.com> wrote:
>
> On Tue, Aug 10, 2021 at 11:09 PM Alex Deucher <alexdeucher@gmail.com> wrote:
> >
> > On Tue, Aug 10, 2021 at 12:57 AM Koba Ko <koba.ko@canonical.com> wrote:
> > >
> > > On Tue, Aug 10, 2021 at 12:45 PM Mario Limonciello <superm1@gmail.com> wrote:
> > > >
> > > >
> > > >
> > > > On Mon, Aug 9, 2021 at 9:37 AM Alex Deucher <alexdeucher@gmail.com> wrote:
> > > >>
> > > >> On Mon, Aug 9, 2021 at 9:59 AM Koba Ko <koba.ko@canonical.com> wrote:
> > > >> >
> > > >> > Previously, AMD had an issue about noise  with AMD-DG on the RKL platform
> > > >> > AMD provided a parameter.
> > > >> > #modprobe amdgpu ppfeaturemask=0xfff7bffb
> > > >> >
> > > >> >  I thought it's better to check and assign values in amd gpu.
> > > >> > Have a trouble determining the type of pch(RKL or else),
> > > >> > search in amd drm driver and can't find any about this.
> > > >> > Would someone please guide me? if there's an existing function.
> > > >> >
> > > >> > here's a proposal, check RKL PCH in amd driver,
> > > >> > the pch definitions must be splitted off from intel_pch.h in i915
> > > >> > folder to include/drm/intel_pch_definition.h
> > > >>
> > > >> Yes, something like that would work.
> > > >
> > > >
> > > > Can the issue that prompted this also happen with other ASIC with the
> > > > newer SMU families?  If so, should it probably be added to all of them
> > > > or further up in the code where the mask normally gets set from module
> > > > parameters to add the extra check there.
> > >
> > > Would amd guys please clarify this?
> > >
> > > Currently as i known,
> > > for smu series, amd upstream this commit only for smu7 and also
> > > provide modue parameters.
> > > 1.https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9d03730ecbc5afabfda26d4dbb014310bc4ea4d9
> > > 2. #modprobe amdgpu ppfeaturemask=0xfff7bffb
> >
> > SMU7-based and vega10/12/20 asics require this.  Newer parts were
> > fixed in SMU firmware:
> > navi10:
> > https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/navi10_smc.bin?id=4fe6e53b96095101eebe4639cd2e2b6ecd84650d
> > navi14:
> > https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/navi14_smc.bin?id=8ab7abaf63e95c29e04e5811cb24730a81486096
> > for newer asics, 21.10 and newer firmwares.  E.g.,
> > https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/amdgpu/sienna_cichlid_smc.bin?id=ef5ea5d1d3f0a72a92e0a09f6cff253560374a39
> >
> With thie commit,
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9d03730ecbc5afabfda26d4dbb014310bc4ea4d9
> For SMU7-based, the module parameter is still necessary, right?

Yes, correct.

Alex


>
> > Alex
> >
> >
> > >
> > > >
> > > >>
> > > >> Alex
> > > >>
> > > >>
> > > >> >
> > > >> > > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > > >> > > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > > >> > > @@ -1629,7 +1629,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
> > > >> > >
> > > >> > >         data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
> > > >> > >         data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
> > > >> > > -       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
> > > >> > > +       data->pcie_dpm_key_disabled = is_rkl_pch() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
> > > >> > >         /* need to set voltage control types before EVV patching */
> > > >> > >         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
> > > >> > >         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
> > > >
> > > >
> > > >
> > > > --
> > > > Mario Limonciello
> > > > superm1@gmail.com

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2021-08-11 13:51 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <CAJB-X+V5SLikZgkesXCoQ=EufSbj6ABLxKEtO71OSRwyJ1175Q@mail.gmail.com>
2021-08-09 13:20 ` Fwd: Req: about Polaris with RKL platform Koba Ko
2021-08-09 14:37   ` Alex Deucher
2021-08-10  4:45     ` Mario Limonciello
2021-08-10  4:57       ` Koba Ko
2021-08-10 15:09         ` Alex Deucher
2021-08-11  1:14           ` Koba Ko
2021-08-11 13:51             ` Alex Deucher
2021-08-10  1:05   ` [Intel-gfx] Req: split off intel pch definition and move into include/drm/ Koba Ko

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