From: Alex Deucher <alexdeucher@gmail.com>
To: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Maling list - DRI developers <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v2] drm/radeon: Allow setting shader registers using DMA/COPY packet3 on SI.
Date: Mon, 18 Apr 2016 11:11:17 -0400 [thread overview]
Message-ID: <CADnq5_P2EcCEpV0kZLCE_Mx7dDeDR1rGsjb6QiM_C1Z88CbNkQ@mail.gmail.com> (raw)
In-Reply-To: <1460681269-27067-1-git-send-email-bas@basnieuwenhuizen.nl>
On Thu, Apr 14, 2016 at 8:47 PM, Bas Nieuwenhuizen
<bas@basnieuwenhuizen.nl> wrote:
> Mesa uses a COPY_DATA packet to copy the grid size for indirect dispatches
> into COMPUTE_USER_DATA_*.
>
> Setting those registers with a SET_SH_REG packet is allowed, not allowing
> them with other packets seems like an oversight.
>
> v2: Clarify commit message.
>
> Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/radeon/radeon_drv.c | 3 ++-
> drivers/gpu/drm/radeon/si.c | 4 ++++
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
> index 1f96b04..7090d9f 100644
> --- a/drivers/gpu/drm/radeon/radeon_drv.c
> +++ b/drivers/gpu/drm/radeon/radeon_drv.c
> @@ -94,9 +94,10 @@
> * 2.42.0 - Add VCE/VUI (Video Usability Information) support
> * 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
> * 2.44.0 - SET_APPEND_CNT packet3 support
> + * 2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI
> */
> #define KMS_DRIVER_MAJOR 2
> -#define KMS_DRIVER_MINOR 44
> +#define KMS_DRIVER_MINOR 45
> #define KMS_DRIVER_PATCHLEVEL 0
> int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
> int radeon_driver_unload_kms(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
> index 7afe825..b30e719 100644
> --- a/drivers/gpu/drm/radeon/si.c
> +++ b/drivers/gpu/drm/radeon/si.c
> @@ -4364,6 +4364,10 @@ static bool si_vm_reg_valid(u32 reg)
> if (reg >= 0x28000)
> return true;
>
> + /* shader regs are also fine */
> + if (reg >= 0xB000 && reg < 0xC000)
> + return true;
> +
> /* check config regs */
> switch (reg) {
> case GRBM_GFX_INDEX:
> --
> 2.8.0
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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prev parent reply other threads:[~2016-04-18 15:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-14 14:03 [PATCH] drm/radeon: Allow setting shader registers using DMA/COPY packet3 on SI Bas Nieuwenhuizen
2016-04-15 0:47 ` [PATCH v2] " Bas Nieuwenhuizen
2016-04-18 15:11 ` Alex Deucher [this message]
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