From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760167AbbJ3Sf4 (ORCPT ); Fri, 30 Oct 2015 14:35:56 -0400 Received: from mail-ob0-f178.google.com ([209.85.214.178]:33772 "EHLO mail-ob0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759250AbbJ3Sfx (ORCPT ); Fri, 30 Oct 2015 14:35:53 -0400 MIME-Version: 1.0 In-Reply-To: References: <1445961999-9506-1-git-send-email-fu.wei@linaro.org> <1445961999-9506-2-git-send-email-fu.wei@linaro.org> <20151027162257.GJ3091@leverpostej> Date: Sat, 31 Oct 2015 02:35:52 +0800 Message-ID: Subject: Re: [PATCH v8 1/5] Documentation: add sbsa-gwdt driver documentation From: Fu Wei To: Timur Tabi Cc: Mark Rutland , Linaro ACPI Mailman List , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, LKML , linux-doc@vger.kernel.org, Wei Fu , Arnd Bergmann , Guenter Roeck , Vipul Gandhi , Wim Van Sebroeck , Jon Masters , Leo Duran , Jon Corbet , Catalin Marinas , Will Deacon , Rafael Wysocki , Dave Young , Pratyush Anand , Suravee Suthikulpanit , Rob Herring Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Timur On 31 October 2015 at 01:46, Timur Tabi wrote: > On Tue, Oct 27, 2015 at 11:10 PM, Fu Wei wrote: >> >>> Why is WS1 optional? >> >> According to the description of WS1 in SBSA 2.3 (5.2 Watchdog Operation) page 21 >> ----------------- >> The signal is fed to a higher agent as an interrupt or reset for it to >> take executive action. >> ---------------- >> >> So WS1 maybe a interrupt. >> >> In a real Hardware, WS1 hooks to a reset signal pin of BMC, if this >> pin is triggered, BMC will do a real warm reset. >> In this case, WS1 is a reset, Linux doesn't need to deal with that. >> >> For now , I haven't found a hardware use WS1 as interrupt. >> In 3.2 Interrupt maps Page 22 >> Table 3-3 Shared peripheral interrupt assignments >> IRQ ID SPI offset Device >> 60 28 EL2 Generic Watchdog WS1 >> >> But I don't have further info about it. >> >> Anyway, because this signal could be interrupt or reset, Linux don't >> need know this signal sometimes. >> So I think it should be optional in binding info. >> >> Do I miss something? Any suggestion ? Please correct me, thanks. > > I think maybe Mark was asking why WS1 is optional, not the WS1 My answer is for "why WS1 is optional"! > interrupt. Maybe you can reword the documentation to make is clear > that I didn't say : "only the *interrupt* for WS1 is optional." > > However, the ACPI table only allows for one interrupt, and it's not > clear whether that's the WS0 or WS1 interrupt. So if both WS0 and WS1 > generate an interrupt, how does the driver handle that? register a interrupt handle for both > > -- > Qualcomm Innovation Center, Inc. > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project. -- Best regards, Fu Wei Software Engineer Red Hat Software (Beijing) Co.,Ltd.Shanghai Branch Ph: +86 21 61221326(direct) Ph: +86 186 2020 4684 (mobile) Room 1512, Regus One Corporate Avenue,Level 15, One Corporate Avenue,222 Hubin Road,Huangpu District, Shanghai,China 200021