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From: Stephen Boyd <swboyd@chromium.org>
To: Prasad Malisetty <pmaliset@codeaurora.org>,
	agross@kernel.org, bhelgaas@google.com,
	bjorn.andersson@linaro.org, lorenzo.pieralisi@arm.com,
	robh+dt@kernel.org, svarbanov@mm-sol.com
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
	dianders@chromium.org, mka@chromium.org, vbadigan@codeaurora.org,
	sallenki@codeaurora.org, manivannan.sadhasivam@linaro.org
Subject: Re: [PATCH v5 2/4] arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes
Date: Tue, 10 Aug 2021 12:31:58 -0700	[thread overview]
Message-ID: <CAE-0n51uQJ4VDDbmpu18mJw4zcDhD-tvUDgi0LQ4-zAgBUKJ6A@mail.gmail.com> (raw)
In-Reply-To: <1628568516-24155-3-git-send-email-pmaliset@codeaurora.org>

Quoting Prasad Malisetty (2021-08-09 21:08:34)
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 53a21d0..4500d88 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -1598,6 +1712,18 @@
>                                         bias-bus-hold;
>                                 };
>                         };
> +
> +                       pcie1_default_state: pcie1-default-state {
> +                               clkreq {
> +                                       pins = "gpio79";
> +                                       function = "pcie1_clkreqn";
> +                               };
> +
> +                               wake-n {
> +                                       pins = "gpio3";
> +                                       function = "gpio";

This is function gpio, so presumably board designers could decide to
change the wake gpio to something else, right? I'd prefer we move wake-n
to the board level (idp) as well. gpio79 looks fine as it is muxed to be
the pcie1_clkreqn function, not gpio, so it seems to be a dedicated pin
for this purpose.

  parent reply	other threads:[~2021-08-10 19:32 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-10  4:08 [PATCH v5 0/4] Add DT bindings and DT nodes for PCIe and PHY in SC7280 Prasad Malisetty
2021-08-10  4:08 ` [PATCH v5 1/4] dt-bindings: pci: qcom: Document PCIe bindings for SC7280 Prasad Malisetty
2021-08-10  4:08 ` [PATCH v5 2/4] arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes Prasad Malisetty
2021-08-10 19:25   ` Stephen Boyd
2021-08-10 19:31   ` Stephen Boyd [this message]
2021-08-17  8:03     ` Prasad Malisetty
2021-08-12  6:07   ` Manivannan Sadhasivam
2021-08-17  6:00     ` Prasad Malisetty
2021-08-10  4:08 ` [PATCH v5 3/4] arm64: dts: qcom: sc7280: Add PCIe nodes for IDP board Prasad Malisetty
2021-08-10 19:32   ` Stephen Boyd
2021-08-10  4:08 ` [PATCH v5 4/4] PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280 Prasad Malisetty
2021-08-10 19:37   ` Stephen Boyd
2021-08-17  6:40     ` Prasad Malisetty
2021-08-12  6:11   ` Manivannan Sadhasivam
2021-08-17  6:37     ` Prasad Malisetty
2021-08-17 17:26   ` Prasad Malisetty
2021-08-24  8:10     ` Prasad Malisetty
2021-08-25 19:30       ` Stephen Boyd
2021-08-25 21:25         ` Bjorn Helgaas
2021-08-26  7:21           ` Prasad Malisetty
2021-08-26 12:37             ` Rob Herring
2021-08-31  6:37               ` Prasad Malisetty
2021-08-31 15:37                 ` Bjorn Helgaas
2021-09-09 17:51                   ` Prasad Malisetty
2021-09-09 18:08                     ` Bjorn Helgaas

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