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From: Stephen Boyd <swboyd@chromium.org>
To: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>,
	agross@kernel.org, alsa-devel@alsa-project.org,
	bgoswami@codeaurora.org, bjorn.andersson@linaro.org,
	broonie@kernel.org, devicetree@vger.kernel.org,
	judyhsiao@chromium.org, lgirdwood@gmail.com,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	perex@perex.cz, plai@codeaurora.org, robh+dt@kernel.org,
	rohitkr@codeaurora.org, srinivas.kandagatla@linaro.org,
	tiwai@suse.com
Cc: Venkata Prasad Potturu <potturu@codeaurora.org>
Subject: Re: [PATCH v4 2/3] dt-bindings: soundwire: qcom: Add bindings for RX and TX cgcr register control
Date: Wed, 27 Oct 2021 14:02:03 -0700	[thread overview]
Message-ID: <CAE-0n521XmdKMcsf+jhjjoJuTo0C4JvZZ7dRqU3ZxkTU9hu+kg@mail.gmail.com> (raw)
In-Reply-To: <1635250764-13994-3-git-send-email-srivasam@codeaurora.org>

Quoting Srinivasa Rao Mandadapu (2021-10-26 05:19:23)
> Update description for RX and TX cgcr register control property required for
> soundwire version 1.6.0 and above.
>
> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
> Co-developed-by: Venkata Prasad Potturu <potturu@codeaurora.org>
> Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
> index b93a2b3..91b9086 100644
> --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
> +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
> @@ -150,6 +150,15 @@ board specific bus parameters.
>                     or applicable for the respective data port.
>                     More info in MIPI Alliance SoundWire 1.0 Specifications.
>
> +- qcom,swrm-hctl-reg:
> +       Usage: optional
> +       Value type: <prop-encoded-array>
> +       Definition: The base address of SoundWire RX and TX cgcr register
> +                   address space.

cgcr is "clock gate control register"?

> +                   This is to update soundwire master rxtx cgcr register field to
> +                   make clock gating control as software controllable for RX path and
> +                   TX path which is required for SoundWire version 1.6.0 and above.

Nak. Use clk APIs to control clks, not direct MMIO writes into a
different device.

  parent reply	other threads:[~2021-10-27 21:02 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-26 12:19 [PATCH v4 0/3] Update SoundWire RX and TX cgcr register control Srinivasa Rao Mandadapu
2021-10-26 12:19 ` [PATCH v4 1/3] ASoC: qcom: soundwire: Disable soundwire rxtx cgcr hardware control Srinivasa Rao Mandadapu
2021-10-26 12:19   ` Srinivasa Rao Mandadapu
2021-10-27 21:03   ` Stephen Boyd
2021-10-26 12:19 ` [PATCH v4 2/3] dt-bindings: soundwire: qcom: Add bindings for RX and TX cgcr register control Srinivasa Rao Mandadapu
2021-10-26 12:19   ` Srinivasa Rao Mandadapu
2021-10-27 21:00   ` Rob Herring
2021-10-27 21:00     ` Rob Herring
2021-10-27 21:02   ` Stephen Boyd [this message]
2021-10-26 12:19 ` [PATCH v4 3/3] soundwire: qcom: Add compatible name for v1.6.0 Srinivasa Rao Mandadapu
2021-10-26 12:19   ` Srinivasa Rao Mandadapu
2021-10-27 21:02   ` Stephen Boyd

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