From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751492AbdDCBvI (ORCPT ); Sun, 2 Apr 2017 21:51:08 -0400 Received: from mail-yb0-f173.google.com ([209.85.213.173]:36700 "EHLO mail-yb0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750992AbdDCBvG (ORCPT ); Sun, 2 Apr 2017 21:51:06 -0400 MIME-Version: 1.0 In-Reply-To: References: <20170331133728.GA23725@rajaneesh-OptiPlex-9010> <1ca7187132bd2b98ca87d0829a3c76022f041924.1491002056.git.sathyanarayanan.kuppuswamy@linux.intel.com> From: Sathyanarayanan Kuppuswamy Natarajan Date: Sun, 2 Apr 2017 18:51:05 -0700 Message-ID: Subject: Re: [PATCH v4 2/5] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's To: Andy Shevchenko Cc: Kuppuswamy Sathyanarayanan , Andy Shevchenko , Zha Qipeng , "dvhart@infradead.org" , Guenter Roeck , Wim Van Sebroeck , David Box , Rajneesh Bhardwaj , Platform Driver , "linux-kernel@vger.kernel.org" , linux-watchdog@vger.kernel.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Andy, Thanks for your comments. On Sun, Apr 2, 2017 at 6:58 AM, Andy Shevchenko wrote: > On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan > wrote: >> This patch adds API's to read/write/update PMC GC registers. >> PMC dependent devices like iTCO_WDT, Telemetry has requirement > > iTCO_wdt will fix it in next version. > >> to acces GCR registers. These API's can be used for this >> purpose. > >> --- a/drivers/platform/x86/intel_pmc_ipc.c >> +++ b/drivers/platform/x86/intel_pmc_ipc.c > >> +static inline int is_gcr_valid(u32 offset) > > Pointer to ipcdev should be a parameter to this function. But ipcdev is a static variable, visible across this file. So there is no point in passing it as parameter. I just noticed that I am not holding the mutex lock in these functions. I will fix it in next version. > >> +{ >> + if (!ipcdev.has_gcr_regs) >> + return -EACCES; >> + >> + if (offset > PLAT_RESOURCE_GCR_SIZE) >> + return -EINVAL; >> + >> + return 0; >> +} > >> +/** >> + * intel_pmc_gcr_update() - Update PMC GCR register bits >> + * @offset: offset of GCR register from GCR address base >> + * @mask: bit mask for update operation >> + * @val: update value >> + * > >> + * Updates the bits of given GCR register as specified by >> + * mask and val > > -> * @mask and @val. > > You would need to refresh how to use kernel doc. -:) will fix it in next version. > >> + * >> + * Return: negative value on error or 0 on success. >> + */ > > With Best Regards, > Andy Shevchenko -- -- Sathya From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-yb0-f173.google.com ([209.85.213.173]:36700 "EHLO mail-yb0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750992AbdDCBvG (ORCPT ); Sun, 2 Apr 2017 21:51:06 -0400 MIME-Version: 1.0 In-Reply-To: References: <20170331133728.GA23725@rajaneesh-OptiPlex-9010> <1ca7187132bd2b98ca87d0829a3c76022f041924.1491002056.git.sathyanarayanan.kuppuswamy@linux.intel.com> From: Sathyanarayanan Kuppuswamy Natarajan Date: Sun, 2 Apr 2017 18:51:05 -0700 Message-ID: Subject: Re: [PATCH v4 2/5] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's To: Andy Shevchenko Cc: Kuppuswamy Sathyanarayanan , Andy Shevchenko , Zha Qipeng , "dvhart@infradead.org" , Guenter Roeck , Wim Van Sebroeck , David Box , Rajneesh Bhardwaj , Platform Driver , "linux-kernel@vger.kernel.org" , linux-watchdog@vger.kernel.org Content-Type: text/plain; charset=UTF-8 Sender: linux-watchdog-owner@vger.kernel.org List-Id: linux-watchdog@vger.kernel.org Hi Andy, Thanks for your comments. On Sun, Apr 2, 2017 at 6:58 AM, Andy Shevchenko wrote: > On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan > wrote: >> This patch adds API's to read/write/update PMC GC registers. >> PMC dependent devices like iTCO_WDT, Telemetry has requirement > > iTCO_wdt will fix it in next version. > >> to acces GCR registers. These API's can be used for this >> purpose. > >> --- a/drivers/platform/x86/intel_pmc_ipc.c >> +++ b/drivers/platform/x86/intel_pmc_ipc.c > >> +static inline int is_gcr_valid(u32 offset) > > Pointer to ipcdev should be a parameter to this function. But ipcdev is a static variable, visible across this file. So there is no point in passing it as parameter. I just noticed that I am not holding the mutex lock in these functions. I will fix it in next version. > >> +{ >> + if (!ipcdev.has_gcr_regs) >> + return -EACCES; >> + >> + if (offset > PLAT_RESOURCE_GCR_SIZE) >> + return -EINVAL; >> + >> + return 0; >> +} > >> +/** >> + * intel_pmc_gcr_update() - Update PMC GCR register bits >> + * @offset: offset of GCR register from GCR address base >> + * @mask: bit mask for update operation >> + * @val: update value >> + * > >> + * Updates the bits of given GCR register as specified by >> + * mask and val > > -> * @mask and @val. > > You would need to refresh how to use kernel doc. -:) will fix it in next version. > >> + * >> + * Return: negative value on error or 0 on success. >> + */ > > With Best Regards, > Andy Shevchenko -- -- Sathya From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sathyanarayanan Kuppuswamy Natarajan Subject: Re: [PATCH v4 2/5] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Date: Sun, 2 Apr 2017 18:51:05 -0700 Message-ID: References: <20170331133728.GA23725@rajaneesh-OptiPlex-9010> <1ca7187132bd2b98ca87d0829a3c76022f041924.1491002056.git.sathyanarayanan.kuppuswamy@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: Sender: linux-watchdog-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Andy Shevchenko Cc: Kuppuswamy Sathyanarayanan , Andy Shevchenko , Zha Qipeng , "dvhart-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org" , Guenter Roeck , Wim Van Sebroeck , David Box , Rajneesh Bhardwaj , Platform Driver , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: platform-driver-x86.vger.kernel.org Hi Andy, Thanks for your comments. On Sun, Apr 2, 2017 at 6:58 AM, Andy Shevchenko wrote: > On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan > wrote: >> This patch adds API's to read/write/update PMC GC registers. >> PMC dependent devices like iTCO_WDT, Telemetry has requirement > > iTCO_wdt will fix it in next version. > >> to acces GCR registers. These API's can be used for this >> purpose. > >> --- a/drivers/platform/x86/intel_pmc_ipc.c >> +++ b/drivers/platform/x86/intel_pmc_ipc.c > >> +static inline int is_gcr_valid(u32 offset) > > Pointer to ipcdev should be a parameter to this function. But ipcdev is a static variable, visible across this file. So there is no point in passing it as parameter. I just noticed that I am not holding the mutex lock in these functions. I will fix it in next version. > >> +{ >> + if (!ipcdev.has_gcr_regs) >> + return -EACCES; >> + >> + if (offset > PLAT_RESOURCE_GCR_SIZE) >> + return -EINVAL; >> + >> + return 0; >> +} > >> +/** >> + * intel_pmc_gcr_update() - Update PMC GCR register bits >> + * @offset: offset of GCR register from GCR address base >> + * @mask: bit mask for update operation >> + * @val: update value >> + * > >> + * Updates the bits of given GCR register as specified by >> + * mask and val > > -> * @mask and @val. > > You would need to refresh how to use kernel doc. -:) will fix it in next version. > >> + * >> + * Return: negative value on error or 0 on success. >> + */ > > With Best Regards, > Andy Shevchenko -- -- Sathya -- To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html