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From: Dave Bender <codehero@gmail.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-spi <linux-spi@vger.kernel.org>
Subject: Re: spi-ar934x: Using GPIO CS issue
Date: Thu, 4 Nov 2021 10:58:09 -0400	[thread overview]
Message-ID: <CAETHaKrQ-UDPjMm_jpNe3P0VzQg7qDLZGaViqXvz+qVuUuZCgg@mail.gmail.com> (raw)
In-Reply-To: <CAMuHMdXwYH2n+C5AEzhCjtH+eX5mBFH=cB1hYAy-XYtPYRn9jw@mail.gmail.com>

Geert,
  Thanks for the response.
  There is a pullup resistor on that CS line, so that GPIO must be active low.
  Digging deeper into the code, it looks like David Bauer made some
changes that limit the spi driver's CS usage to only the CS0, CS1, CS2
pins.
  There is also no bounds checking on the CS value.
  I don't understand how this driver can even use generic GPIO if it
forces use of the CS bits on the SPI_IOC register.

static int ar934x_spi_transfer_one_message(struct spi_controller *master,
             struct spi_message *m)
{
   ....
   ....
    for (trx_done = 0; trx_done < t->len; trx_done += 4) {

   .....
      reg = AR934X_SPI_SHIFT_VAL(spi->chip_select, term,
               trx_cur * 8);
      iowrite32(reg, sp->base + AR934X_SPI_REG_SHIFT_CTRL);



-Dave

On Thu, Nov 4, 2021 at 5:50 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Dave.
>
> On Tue, Nov 2, 2021 at 11:31 PM Dave Bender <codehero@gmail.com> wrote:
> > Under the mach-* era of configuring boards, I was able to use a second
> > SPI NOR flash with a GPIO chip select, as in:
> >
> > static struct spi_board_info spi_info[] = {
> >        { ... },
> >        {
> >                .bus_num        = 0,
> >                .chip_select    = 1,
> >                .max_speed_hz   = 25000000,
> >                .modalias       = "m25p80",
> >        },
> > };
> >
> > static int cs_gpios[2] = {
> >        -ENOENT,
> >        11,
> > };
> >
> > static struct ath79_spi_platform_data mtriq_spi_data __initdata = {
> >        .bus_num = 0
> >        ,.num_chipselect = 2
> >        ,.cs_gpios = cs_gpios
> > };
> >
> > static void __init board_setup(){
> >  ath79_register_spi(&spi_data, spi_info, 2);
> > }
> >
> >
> > However, under the new dts regime, I try to use a CS gpio but cannot
> > communicate successfully to the chip:
> >
> > &spi {
> >     status = "okay";
> >     cs-gpios = <0>,<&gpio 11 GPIO_ACTIVE_LOW>;
> >
> >     flash@1 {
> >     compatible = "jedec,spi-nor";
> >     spi-max-frequency = <25000000>;
> >     reg = <1>;
> >   };
> > };
> >
> > Am I missing something here?
>
> Does it work if you change GPIO_ACTIVE_LOW to GPIO_ACTIVE_HIGH?
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

  reply	other threads:[~2021-11-04 14:58 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-02 22:30 spi-ar934x: Using GPIO CS issue Dave Bender
2021-11-04  9:50 ` Geert Uytterhoeven
2021-11-04 14:58   ` Dave Bender [this message]
2021-11-04 15:20     ` Geert Uytterhoeven
2021-11-05 15:49       ` Dave Bender

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