From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bin Meng Date: Sun, 8 Dec 2019 16:45:22 +0800 Subject: [PATCH v6 101/102] x86: apl: Add FSP support In-Reply-To: <20191207044315.51770-14-sjg@chromium.org> References: <20191207044315.51770-1-sjg@chromium.org> <20191207044315.51770-14-sjg@chromium.org> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Sat, Dec 7, 2019 at 12:55 PM Simon Glass wrote: > > The memory and silicon init parts of the FSP need support code to work. > Add this for Apollo Lake. > > Signed-off-by: Simon Glass > --- > > Changes in v6: > - Drop mention of devicetree for VTD feature > - Drop mention of ramstage > - Fix various coding style problems > - Make BOOT_FROM_FAST_SPI_FLASH a Kconfig option > - Use 'No SPI' instead of 'SPI2' as a debug message > > Changes in v5: > - Allocate the FSP-S data instead of using the stack > - Rename APOLLOLAKE_USB2_PORT_MAX > > Changes in v4: > - Adjust the comment for struct dw_i2c_speed_config > - Rename arch_fsp_s_preinit() to arch_fsps_preinit() > - Switch over to use pinctrl for pad init/config > - Tidy up mixed case in FSP code > - apollolake -> Apollo Lake > > Changes in v3: > - Add bootstage timing for reading vbt > - Add fspm_done() hook to handle FSP-S wierdness (it breaks SPI flash) > - Don't allow BOOT_FROM_FAST_SPI_FLASH with FSP-S > - Set boot_loader_tolum_size to 0 > - Use the IRQ uclass instead of ITSS > > Changes in v2: None > > arch/x86/cpu/apollolake/Makefile | 6 + > arch/x86/cpu/apollolake/fsp_m.c | 210 ++++++++++ > arch/x86/cpu/apollolake/fsp_s.c | 661 +++++++++++++++++++++++++++++++ > 3 files changed, 877 insertions(+) > create mode 100644 arch/x86/cpu/apollolake/fsp_m.c > create mode 100644 arch/x86/cpu/apollolake/fsp_s.c > Reviewed-by: Bin Meng