From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 8 Dec 2019 10:53:08 +0800
Subject: [PATCH v6 022/102] pci: Add support for p2sb uclass
In-Reply-To: <20191206213936.v6.22.I5d9e1bbfcfcc8731046059c0076061f0d1206041@changeid>
References: <20191207044315.51770-1-sjg@chromium.org>
 <20191206213936.v6.22.I5d9e1bbfcfcc8731046059c0076061f0d1206041@changeid>
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On Sat, Dec 7, 2019 at 12:47 PM Simon Glass <sjg@chromium.org> wrote:
>
> The Primary-to-Sideband bus (P2SB) is used to access various peripherals
> through memory-mapped I/O in a large chunk of PCI space. The space is
> segmented into different channels and peripherals are accessed by
> device-specific means within those channels. Devices should be added in
> the device tree as subnodes of the p2sb.
>
> This adds a uclass and enables it for sandbox.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v6: None
> Changes in v5:
> - Add a way to obtain the port ID for a device
> - Don't enable p2sb on sandbox in this patch
>
> Changes in v4:
> - Adjust condition for binding children
>
> Changes in v3: None
> Changes in v2: None
>
>  drivers/misc/Kconfig       |  33 ++++++
>  drivers/misc/Makefile      |   1 +
>  drivers/misc/p2sb-uclass.c | 216 +++++++++++++++++++++++++++++++++++++
>  include/dm/uclass-id.h     |   1 +
>  include/p2sb.h             | 135 +++++++++++++++++++++++
>  5 files changed, 386 insertions(+)
>  create mode 100644 drivers/misc/p2sb-uclass.c
>  create mode 100644 include/p2sb.h
>

applied to u-boot-x86/next, thanks!