From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 23 Apr 2019 20:14:34 +0800
Subject: [U-Boot] [PATCH 3/4] riscv: prior_stage_fdt_address only be
 used when OF_PRIOR_STAGE is enable
In-Reply-To: <20190423054230.10543-4-uboot@andestech.com>
References: <20190423054230.10543-1-uboot@andestech.com>
 <20190423054230.10543-4-uboot@andestech.com>
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To: u-boot@lists.denx.de

Hi Rick,

On Tue, Apr 23, 2019 at 1:47 PM Andes <uboot@andestech.com> wrote:
>
> From: Rick Chen <rick@andestech.com>
>

commit title should read: prior_stage_fdt_address should only be used
when OF_PRIOR_STAGE is enabled

> This patch will fix prior_stage_fdt_address write failure problem, when
> AE350 was booting from flash.
>
> When AE350 was booting from falsh, prior_stage_fdt_address will be in
> flash address, we shall avoid it to be written.
>
> Signed-off-by: Rick Chen <rick@andestech.com>
> Cc: Greentime Hu <greentime@andestech.com>
> ---
>  arch/riscv/cpu/start.S | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index d030d4a..0e672e0 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -111,7 +111,9 @@ call_board_init_f_0:
>         bnez    tp, secondary_hart_loop
>  #endif
>
> +#  if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
>         la      t0, prior_stage_fdt_address
> +#endif

I think you should also surround the declaration of
prior_stage_fdt_address in arch/riscv/cpu/cpu.c with OF_PRIOR_STAGE

>         SREG    s1, 0(t0)
>
>         jal     board_init_f_init_reserve
> --

Regards,
Bin