From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bin Meng Date: Sat, 14 Mar 2020 17:59:55 +0800 Subject: [PATCH v2 3/4] riscv: Provide a mechanism for riscv boards to parse reserved memory In-Reply-To: References: <20200314001132.17393-1-atish.patra@wdc.com> <20200314001132.17393-4-atish.patra@wdc.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Atish, On Sat, Mar 14, 2020 at 8:54 AM Atish Patra wrote: > > On Fri, Mar 13, 2020 at 5:12 PM Atish Patra wrote: > > > > In RISC-V, M-mode software can reserve physical memory regions > > by setting appropriate physical memory protection (PMP) csr. As the > > PMP csr are accessible only in M-mode, S-mode U-Boot can not read > > this configuration directly. However, M-mode software can pass this > > information via reserved-memory node in device tree so that S-mode > > software can access this information. > > > > In U-boot, any board may use the DT in following ways. nits: U-Boot > > 1. OF_SEPARTE: It ignores the DT from previous stage and uses the DT typo: OF_SEPARATE > > from U-Boot sources. > > 2. OF_PRIOR_STATE: It reuses the DT from previous stage. typo: OF_PRIOR_STAGE > > For case 1: U-Boot needs to parse the reserved-memory node from the > > DT passed from the previous stage and update the DT in use. > > > > This patch provides a framework to do that from any RISC-V boards. > > > > Signed-off-by: Atish Patra > > --- > > arch/riscv/cpu/start.S | 1 + > > arch/riscv/include/asm/global_data.h | 1 + > > arch/riscv/include/asm/u-boot-riscv.h | 1 + > > arch/riscv/lib/asm-offsets.c | 1 + > > arch/riscv/lib/bootm.c | 37 +++++++++++++++++++++++++++ > > 5 files changed, 41 insertions(+) > > > > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S > > index 6b3ff99c3882..0282685c2906 100644 > > --- a/arch/riscv/cpu/start.S > > +++ b/arch/riscv/cpu/start.S > > @@ -121,6 +121,7 @@ call_board_init_f_0: > > > > jal board_init_f_init_reserve > > > > + SREG s1, GD_FIRMWARE_FDT_ADDR(gp) > > /* save the boot hart id to global_data */ > > SREG tp, GD_BOOT_HART(gp) > > > > diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h > > index b74bd7e738bb..51ac8d1c98e2 100644 > > --- a/arch/riscv/include/asm/global_data.h > > +++ b/arch/riscv/include/asm/global_data.h > > @@ -15,6 +15,7 @@ > > /* Architecture-specific global data */ > > struct arch_global_data { > > long boot_hart; /* boot hart id */ > > + phys_addr_t firmware_fdt_addr; > > #ifdef CONFIG_SIFIVE_CLINT > > void __iomem *clint; /* clint base address */ > > #endif > > diff --git a/arch/riscv/include/asm/u-boot-riscv.h b/arch/riscv/include/asm/u-boot-riscv.h > > index 49febd588102..b7bea0ba184d 100644 > > --- a/arch/riscv/include/asm/u-boot-riscv.h > > +++ b/arch/riscv/include/asm/u-boot-riscv.h > > @@ -17,5 +17,6 @@ int cleanup_before_linux(void); > > /* board/.../... */ > > int board_init(void); > > void board_quiesce_devices(void); > > +int riscv_board_reserved_mem_fixup(void *fdt); > > > > #endif /* _U_BOOT_RISCV_H_ */ > > diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c > > index 4fa4fd371473..7301c1b98e23 100644 > > --- a/arch/riscv/lib/asm-offsets.c > > +++ b/arch/riscv/lib/asm-offsets.c > > @@ -14,6 +14,7 @@ > > int main(void) > > { > > DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart)); > > + DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t, arch.firmware_fdt_addr)); > > #ifndef CONFIG_XIP > > DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts)); > > #endif > > diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c > > index f927694ae32f..3a4d0bf14c86 100644 > > --- a/arch/riscv/lib/bootm.c > > +++ b/arch/riscv/lib/bootm.c > > @@ -19,6 +19,7 @@ > > #include > > #include > > #include > > +#include > > > > DECLARE_GLOBAL_DATA_PTR; > > > > @@ -26,6 +27,42 @@ __weak void board_quiesce_devices(void) > > { > > } > > > > +int riscv_board_reserved_mem_fixup(void *fdt) > > +{ > > + uint32_t phandle; > > + struct fdt_memory pmp_mem; > > + int err; > > + void *src_fdt_addr; > > + int offset, node; > > + phys_addr_t addr, size; > > + > > + src_fdt_addr = map_sysmem(gd->arch.firmware_fdt_addr, 0); > > + offset = fdt_path_offset(src_fdt_addr, "/reserved-memory"); > > + if (offset < 0) { > > + printf("No reserved memory region found in FDT\n"); > > + return offset; We should return 0 to allow cases that do not have /reserved-memory node. Otherwise we are mandating a newer OpenSBI version to work with us. > > + } > > + > > + fdt_for_each_subnode(node, src_fdt_addr, offset) { > > + const char *name = fdt_get_name(src_fdt_addr, node, NULL); > > + > > + addr = fdtdec_get_addr_size(src_fdt_addr, node, "reg", &size); > > + if (addr == FDT_ADDR_T_NONE) { > > + debug("failed to read address/size for %s\n", name); > > + continue; > > + } > > + pmp_mem.start = addr; > > + pmp_mem.end = addr + size; > > + err = fdtdec_add_reserved_memory(fdt, name, &pmp_mem, &phandle); > > + if (err < 0) { > > + printf("failed to add reserved memory: %d\n", err); > > + return err; > > + } > > + } > > + > > + return 0; > > +} > > + > > int arch_fixup_fdt(void *blob) > > { > > u32 size; > > -- Regards, Bin