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From: Bin Meng <bmeng.cn@gmail.com>
To: Atish Patra <atish.patra@wdc.com>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Anup Patel <anup.patel@wdc.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH] RISC-V: Place DTB at 3GB boundary instead of 4GB
Date: Fri, 18 Dec 2020 15:21:31 +0800	[thread overview]
Message-ID: <CAEUhbmUqJdpuqvZ6V3s9eeW=EUVXrnjbF5GRmygwaZhMGG-6sA@mail.gmail.com> (raw)
In-Reply-To: <20201217214826.2094617-1-atish.patra@wdc.com>

Hi Atish,

On Fri, Dec 18, 2020 at 5:48 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> Currently, we place the DTB at 2MB from 4GB or end of DRAM which ever is
> lesser. However, Linux kernel can address only 1GB of memory for RV32.
> Thus, it can not map anything beyond 3GB (assuming 2GB is the starting address).
> As a result, it can not process DT and panic if opensbi dynamic firmware
> is used.
>
> Fix this by placing the DTB at 2MB from 3GB or end of DRAM whichever is lower.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  hw/riscv/boot.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>

With this patch, 32-bit sifive_u still does not boot kernel with the
following patch applied on 5.10:
https://patchwork.kernel.org/project/linux-riscv/patch/20201217074855.1948743-1-atish.patra@wdc.com/

Command I used:
$ qemu-system-riscv32 -nographic -M sifive_u -m 1G -smp 5 -kernel
arch/riscv/boot/Image

32-bit virt cannot boot the same kernel image with memory set to 2G either:
$ qemu-system-riscv32 -nographic -M virt -m 2G -smp 4 -kernel
arch/riscv/boot/Image

Regards,
Bin


WARNING: multiple messages have this Message-ID (diff)
From: Bin Meng <bmeng.cn@gmail.com>
To: Atish Patra <atish.patra@wdc.com>
Cc: "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	"open list:RISC-V" <qemu-riscv@nongnu.org>,
	 Alistair Francis <Alistair.Francis@wdc.com>,
	 Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Anup Patel <anup.patel@wdc.com>
Subject: Re: [PATCH] RISC-V: Place DTB at 3GB boundary instead of 4GB
Date: Fri, 18 Dec 2020 15:21:31 +0800	[thread overview]
Message-ID: <CAEUhbmUqJdpuqvZ6V3s9eeW=EUVXrnjbF5GRmygwaZhMGG-6sA@mail.gmail.com> (raw)
In-Reply-To: <20201217214826.2094617-1-atish.patra@wdc.com>

Hi Atish,

On Fri, Dec 18, 2020 at 5:48 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> Currently, we place the DTB at 2MB from 4GB or end of DRAM which ever is
> lesser. However, Linux kernel can address only 1GB of memory for RV32.
> Thus, it can not map anything beyond 3GB (assuming 2GB is the starting address).
> As a result, it can not process DT and panic if opensbi dynamic firmware
> is used.
>
> Fix this by placing the DTB at 2MB from 3GB or end of DRAM whichever is lower.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  hw/riscv/boot.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>

With this patch, 32-bit sifive_u still does not boot kernel with the
following patch applied on 5.10:
https://patchwork.kernel.org/project/linux-riscv/patch/20201217074855.1948743-1-atish.patra@wdc.com/

Command I used:
$ qemu-system-riscv32 -nographic -M sifive_u -m 1G -smp 5 -kernel
arch/riscv/boot/Image

32-bit virt cannot boot the same kernel image with memory set to 2G either:
$ qemu-system-riscv32 -nographic -M virt -m 2G -smp 4 -kernel
arch/riscv/boot/Image

Regards,
Bin


  parent reply	other threads:[~2020-12-18  7:23 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-17 21:48 [PATCH] RISC-V: Place DTB at 3GB boundary instead of 4GB Atish Patra
2020-12-17 21:48 ` Atish Patra
2020-12-17 22:31 ` Palmer Dabbelt
2020-12-17 22:31   ` Palmer Dabbelt
2020-12-17 22:35   ` Atish Patra
2020-12-17 22:35     ` Atish Patra
2020-12-17 22:39     ` Palmer Dabbelt
2020-12-17 22:39       ` Palmer Dabbelt
2020-12-18  7:21 ` Bin Meng [this message]
2020-12-18  7:21   ` Bin Meng
2020-12-18  7:27   ` Atish Patra
2020-12-18  7:27     ` Atish Patra
2020-12-18  7:33     ` Bin Meng
2020-12-18  7:33       ` Bin Meng
2020-12-18  8:00       ` Atish Patra
2020-12-18  8:00         ` Atish Patra
2020-12-18  8:42         ` Bin Meng
2020-12-18  8:42           ` Bin Meng
2020-12-18 19:46           ` Atish Patra
2020-12-18 19:46             ` Atish Patra
2020-12-22  5:35             ` Bin Meng
2020-12-22  5:35               ` Bin Meng
2020-12-22 19:59               ` Atish Patra
2020-12-22 19:59                 ` Atish Patra
2020-12-23  1:20                 ` Bin Meng
2020-12-23  1:20                   ` Bin Meng
2020-12-29  4:49                   ` Bin Meng
2020-12-29  4:49                     ` Bin Meng
2021-01-04 20:24                     ` Atish Patra
2021-01-04 20:24                       ` Atish Patra
2021-01-05  3:06                       ` Bin Meng
2021-01-05  3:06                         ` Bin Meng
2021-01-05  3:11 ` Bin Meng
2021-01-05  3:11   ` Bin Meng
2021-01-05 21:02   ` Alistair Francis
2021-01-05 21:02     ` Alistair Francis
2021-01-05 23:44   ` Atish Patra
2021-01-05 23:44     ` Atish Patra
2021-01-06  0:04     ` Bin Meng
2021-01-06  0:04       ` Bin Meng
2021-01-06  2:14       ` Atish Patra
2021-01-06  2:14         ` Atish Patra

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