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From: Bin Meng <bmeng.cn@gmail.com>
To: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Cc: "Damien Hedde" <damien.hedde@greensocs.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	"Alistair Francis" <alistair.francis@wdc.com>
Subject: Re: [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read,write}()
Date: Wed, 1 Sep 2021 18:52:53 +0800	[thread overview]
Message-ID: <CAEUhbmUs+K2-5iM93vdTxdJ6H-tDo9etwzao5cXJzLFCC5rtXA@mail.gmail.com> (raw)
In-Reply-To: <20210901083251.GG6340@toto>

Hi Edgar,

On Wed, Sep 1, 2021 at 4:32 PM Edgar E. Iglesias
<edgar.iglesias@xilinx.com> wrote:
>
> On Wed, Sep 01, 2021 at 11:27:24AM +0800, Bin Meng wrote:
> > Read or write to uart registers when unclocked or in reset should be
> > ignored. Add the check there, and as a result of this, the check in
> > uart_write_tx_fifo() is now unnecessary.
>
> Hi Bin,
>
> I thought I had replied to this but it must have gotten lost somewhere.
>
> We've got SW that expects FSBL (Bootlooader) to setup clocks and resets.
> It's quite common that users run that SW on QEMU without FSBL (FSBL typically
> requires the Xilinx tools installed). That's fine, since users can stil use
> -device loader to enable clocks etc.
>
> To help folks understand what's going, a log (guest-error) message would
> be helpful here. In particular with the serial port since things will go
> very quiet if they get things wrong.
>
> Otherwise, this patch is fine with me.
>

Thanks. Will add a separate patch to enable a log message for all places.

Regards,
Bin


  reply	other threads:[~2021-09-01 11:34 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-01  3:27 [PATCH v2 0/5] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure Bin Meng
2021-09-01  3:27 ` [PATCH v2 1/5] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase Bin Meng
2021-09-01  3:27 ` [PATCH v2 2/5] hw/char: cadence_uart: Disable transmit when input clock is disabled Bin Meng
2021-09-01  3:27 ` [PATCH v2 3/5] hw/char: cadence_uart: Move clock/reset check to uart_can_receive() Bin Meng
2021-09-02  2:30   ` Alistair Francis
2021-09-02  6:00   ` Philippe Mathieu-Daudé
2021-09-01  3:27 ` [PATCH v2 4/5] hw/char: cadence_uart: Convert to memop_with_attrs() ops Bin Meng
2021-09-02  2:32   ` Alistair Francis
2021-09-01  3:27 ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() Bin Meng
2021-09-01  8:32   ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read,write}() Edgar E. Iglesias
2021-09-01 10:52     ` Bin Meng [this message]
2021-09-02  6:10     ` Philippe Mathieu-Daudé
2021-09-02  6:09   ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() Philippe Mathieu-Daudé
2021-09-02  6:11     ` Philippe Mathieu-Daudé
2021-09-05 14:31       ` Bin Meng

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