From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 28 Apr 2015 15:48:32 +0800
Subject: [U-Boot] [PATCH 12/20] x86: Add an mfence macro
In-Reply-To: <1430174911-27538-13-git-send-email-sjg@chromium.org>
References: <1430174911-27538-1-git-send-email-sjg@chromium.org>
 <1430174911-27538-13-git-send-email-sjg@chromium.org>
Message-ID: <CAEUhbmV3ggceiX2Uk_CBdcOJ2+Uc1sokzY+vHDgN==kc5EmJGw@mail.gmail.com>
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To: u-boot@lists.denx.de

Hi Simon,

On Tue, Apr 28, 2015 at 6:48 AM, Simon Glass <sjg@chromium.org> wrote:
> Provide access to this x86 instruction from C code.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  arch/x86/include/asm/cpu.h | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
> index c839291..37aa6b9 100644
> --- a/arch/x86/include/asm/cpu.h
> +++ b/arch/x86/include/asm/cpu.h
> @@ -151,6 +151,11 @@ static inline int flag_is_changeable_p(uint32_t flag)
>         return ((f1^f2) & flag) != 0;
>  }
>
> +static inline void mfence(void)
> +{
> +       __asm__ __volatile__("mfence\t\n" : : : "memory");

Do we need "\t\n"?

> +}
> +
>  /**
>   * cpu_enable_paging_pae() - Enable PAE-paging
>   *
> --

Regards,
Bin