From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 8 Apr 2021 20:09:55 +0800
Subject: [PATCH v5 8/8] arch: riscv: dts: Set speed of FU740 to 1.2GHz
In-Reply-To: <20210408102657.201027-9-green.wan@sifive.com>
References: <20210408102657.201027-1-green.wan@sifive.com>
 <20210408102657.201027-9-green.wan@sifive.com>
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On Thu, Apr 8, 2021 at 6:27 PM Green Wan <green.wan@sifive.com> wrote:
>
> From: Greentime Hu <greentime.hu@sifive.com>
>
> Change CPU speed from 1GHz to 1.2Hz
>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Tested-by: Green Wan <green.wan@sifive.com>
> ---
>  arch/riscv/dts/fu740-c000-u-boot.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/dts/fu740-c000-u-boot.dtsi b/arch/riscv/dts/fu740-c000-u-boot.dtsi
> index 0115a449f6..e104b47f04 100644
> --- a/arch/riscv/dts/fu740-c000-u-boot.dtsi
> +++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi
> @@ -9,6 +9,7 @@
>         cpus {
>                 assigned-clocks = <&prci PRCI_CLK_COREPLL>;
>                 assigned-clock-rates = <1001000000>;
> +               assigned-clock-rates = <1200000000>;

Two same properties?

>                 u-boot,dm-spl;
>                 cpu0: cpu at 0 {
>                         clocks = <&prci PRCI_CLK_COREPLL>;

This patch should be squashed into patch [1/8]

Regards,
Bin