From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 16 May 2017 22:39:17 +0800
Subject: [U-Boot] [PATCH v2 1/3] x86: congatec: add secureboot enabled
 defconfig for conga-qeval20-qa3-e3845
In-Reply-To: <1494921350-803-1-git-send-email-agust@denx.de>
References: <1494921350-803-1-git-send-email-agust@denx.de>
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To: u-boot@lists.denx.de

Hi Anatolij,

On Tue, May 16, 2017 at 3:55 PM, Anatolij Gustschin <agust@denx.de> wrote:
> From: Markus Valentin <mv@denx.de>
>

Can you add a simple sentence for this commit?

> Signed-off-by: Markus Valentin <mv@denx.de>
> [agust: rebased, fixed to build with v2017.05]
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> Changes in v2:
>  - add Reviewed-by tag
>
>  ...0-qa3-e3845-internal-uart-secure-boot_defconfig | 77 ++++++++++++++++++++++
>  1 file changed, 77 insertions(+)
>  create mode 100644 configs/conga-qeval20-qa3-e3845-internal-uart-secure-boot_defconfig
>
> diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart-secure-boot_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart-secure-boot_defconfig
> new file mode 100644
> index 0000000..b78f90e
> --- /dev/null
> +++ b/configs/conga-qeval20-qa3-e3845-internal-uart-secure-boot_defconfig
> @@ -0,0 +1,77 @@
> +CONFIG_X86=y
> +CONFIG_VENDOR_CONGATEC=y
> +CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
> +CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
> +CONFIG_INTERNAL_UART=y
> +CONFIG_HAVE_INTEL_ME=y
> +CONFIG_BAYTRAIL_SECURE_BOOT=y

This commit should come in later in this patch series, as
CONFIG_BAYTRAIL_SECURE_BOOT is not available yet at this point.

> +CONFIG_ENABLE_MRC_CACHE=y
> +CONFIG_SMP=y
> +CONFIG_HAVE_VGA_BIOS=y
> +CONFIG_VGA_BIOS_ADDR=0xfffa0000
> +CONFIG_GENERATE_PIRQ_TABLE=y
> +CONFIG_GENERATE_MP_TABLE=y
> +CONFIG_GENERATE_ACPI_TABLE=y
> +CONFIG_SEABIOS=y
> +CONFIG_FIT=y
> +CONFIG_FIT_SIGNATURE=y
> +CONFIG_BOOTSTAGE=y
> +CONFIG_BOOTSTAGE_REPORT=y
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_CMD_CPU=y
> +# CONFIG_CMD_IMLS is not set
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_SF=y
> +CONFIG_CMD_SPI=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_GPIO=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_DHCP=y
> +# CONFIG_CMD_NFS is not set
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_TIME=y
> +CONFIG_CMD_BOOTSTAGE=y
> +CONFIG_CMD_EXT2=y
> +CONFIG_CMD_EXT4=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_REGMAP=y
> +CONFIG_SYSCON=y
> +CONFIG_CPU=y
> +CONFIG_DM_I2C=y
> +CONFIG_SYS_I2C_INTEL=y
> +CONFIG_WINBOND_W83627=y
> +CONFIG_MMC=y
> +CONFIG_MMC_PCI=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_SDMA=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_DM_ETH=y
> +CONFIG_E1000=y
> +CONFIG_DM_PCI=y
> +CONFIG_DM_RTC=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_DEBUG_UART_BASE=0x3f8
> +CONFIG_DEBUG_UART_CLOCK=1843200
> +CONFIG_SYS_NS16550=y
> +CONFIG_ICH_SPI=y
> +CONFIG_TIMER=y
> +CONFIG_USB=y
> +CONFIG_DM_USB=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_KEYBOARD=y
> +CONFIG_DM_VIDEO=y
> +CONFIG_VIDEO_VESA=y
> +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
> +CONFIG_FRAMEBUFFER_VESA_MODE_114=y
> +CONFIG_CONSOLE_SCROLL_LINES=5
> +CONFIG_USE_PRIVATE_LIBGCC=y

Regards,
Bin