From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bin Meng Date: Sun, 8 Dec 2019 09:52:49 +0800 Subject: [PATCH v6 007/102] i2c: designware: Tidy up PCI support In-Reply-To: <20191206213936.v6.7.Ib37fe22adb7a6e5d3016907ecf589c8a8d932c8b@changeid> References: <20191207044315.51770-1-sjg@chromium.org> <20191206213936.v6.7.Ib37fe22adb7a6e5d3016907ecf589c8a8d932c8b@changeid> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Sat, Dec 7, 2019 at 12:46 PM Simon Glass wrote: > > This is hacked into the driver at present. It seems better to have it as > a separate driver that uses the base driver. Create a new file and put > the X86 code into it. > > Actually the Baytrail settings should really come from the device tree. > > Note that 'has_max_speed' is added as well. This is currently always false > but since only Baytrail provides the config, it does not affect operation > for other devices. > > Signed-off-by: Simon Glass > Reviewed-by: Heiko Schocher > --- > > Changes in v6: > - Drop unwanted space before comma > > Changes in v5: None > Changes in v4: > - Add a comment about the speed logic in __dw_i2c_set_bus_speed() > - Add a comment in the commit message about why has_max_speed is added > - Drop unwanted debug printf("bad\n") > - Fix indentation nit > - Rename new file to designware_i2c_pci.c > > Changes in v3: None > Changes in v2: None > > drivers/i2c/Makefile | 3 + > drivers/i2c/designware_i2c.c | 106 +++++-------------------------- > drivers/i2c/designware_i2c.h | 35 ++++++++++ > drivers/i2c/designware_i2c_pci.c | 79 +++++++++++++++++++++++ > 4 files changed, 134 insertions(+), 89 deletions(-) > create mode 100644 drivers/i2c/designware_i2c_pci.c > Reviewed-by: Bin Meng