From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 8 Dec 2019 11:31:17 +0800
Subject: [PATCH v6 057/102] x86: Add an option to control the position of
 SPL
In-Reply-To: <20191206213936.v6.57.I673905c51a044952543c14f75f421f5172c34de7@changeid>
References: <20191207044315.51770-1-sjg@chromium.org>
 <20191206213936.v6.57.I673905c51a044952543c14f75f421f5172c34de7@changeid>
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To: u-boot@lists.denx.de

On Sat, Dec 7, 2019 at 12:49 PM Simon Glass <sjg@chromium.org> wrote:
>
> For Apollo Lake SPL is run from CAR (cache-as-RAM) which is in a different
> location from where SPL must be placed in ROM. In other words, although
> SPL runs before SDRAM is set up, it is not execute-in-place (XIP).
>
> Add a Kconfig option for the ROM position.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v6: None
> Changes in v5: None
> Changes in v4:
> - apollolake -> Apollo Lake
>
> Changes in v3:
> - Add SPL condition to the option
>
> Changes in v2: None
>
>  arch/x86/Kconfig         | 5 +++++
>  arch/x86/dts/u-boot.dtsi | 4 ++--
>  2 files changed, 7 insertions(+), 2 deletions(-)
>

applied to u-boot-x86/next, thanks!