From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 22 Oct 2018 15:47:03 +0800
Subject: [U-Boot] [PATCH 17/30] riscv: implement the invalidate_icache_*
	functions
In-Reply-To: <20181019220743.15020-18-lukas.auer@aisec.fraunhofer.de>
References: <20181019220743.15020-1-lukas.auer@aisec.fraunhofer.de>
 <20181019220743.15020-18-lukas.auer@aisec.fraunhofer.de>
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On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer
<lukas.auer@aisec.fraunhofer.de> wrote:
>
> Implement the functions invalidate_icache_range() and
> invalidate_icache_all().
>
> RISC-V does not have instructions for explicit cache-control. The
> functions in this patch are implemented with the memory ordering
> instruction for synchronizing the instruction and data streams. This may
> be implemented as a cache flush or invalidate on simple processors,
> others may only invalidate the relevant cache lines.
>
> Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
> ---
>
>  arch/riscv/lib/cache.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>