From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 11 Jul 2019 11:05:43 +0800
Subject: [U-Boot] [PATCH v2 3/7] riscv: ae350: use the v5l2 driver to
	configure the cache
In-Reply-To: <20190709092814.21363-4-uboot@andestech.com>
References: <20190709092814.21363-1-uboot@andestech.com>
 <20190709092814.21363-4-uboot@andestech.com>
Message-ID: <CAEUhbmXAcw9p51fdUngvD4ufi1xKs++EqZKjYG7F0L1uX19a3Q@mail.gmail.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On Tue, Jul 9, 2019 at 5:34 PM Andes <uboot@andestech.com> wrote:
>
> From: Rick Chen <rick@andestech.com>
>
> Find the UCLASS_CACHE driver to configure the cache controller's
> settings.
>
> Signed-off-by: Rick Chen <rick@andestech.com>
> Cc: Greentime Hu <greentime@andestech.com>
> Cc: KC Lin <kclin@andestech.com>
> ---
>  board/AndesTech/ax25-ae350/ax25-ae350.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
> index 3d65ce7..448ab0c 100644
> --- a/board/AndesTech/ax25-ae350/ax25-ae350.c
> +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
> @@ -11,6 +11,7 @@
>  #include <linux/io.h>
>  #include <faraday/ftsmc020.h>
>  #include <fdtdec.h>
> +#include <dm.h>
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> @@ -93,10 +94,18 @@ int smc_init(void)
>         return 0;
>  }
>
> +void v5l2_init(void)

This should be static.

> +{
> +       struct udevice *dev;
> +
> +       uclass_get_device(UCLASS_CACHE, 0, &dev);
> +}
> +
>  #ifdef CONFIG_BOARD_EARLY_INIT_F
>  int board_early_init_f(void)
>  {
>         smc_init();
> +       v5l2_init();
>
>         return 0;
>  }
> --

Other than that,
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Regards,
Bin