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From: Bin Meng <bmeng.cn@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH 14/17] x86: coreboot: Document the memory map
Date: Thu, 8 Apr 2021 10:59:39 +0800	[thread overview]
Message-ID: <CAEUhbmXW2W8-ee-C6UDdC3RkndmGfOLo8QPU0qM7jMGt+zUpqg@mail.gmail.com> (raw)
In-Reply-To: <20210407163159.14.Ib1dccc7a0ad38d4faae3e0a01fd647a35af74ceb@changeid>

Hi Simon,

On Wed, Apr 7, 2021 at 12:33 PM Simon Glass <sjg@chromium.org> wrote:
>
> Add information about memory usage when U-Boot is started from coreboot.
> This is useful when debugging. Also, since coreboot takes a chunk of
> memory in the middle of SDRAM for use by PCI devices, it can help avoid
> overwriting this with a loaded kernel by accident.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  doc/board/coreboot/coreboot.rst | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>
> diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
> index 9c44c025a48..e791b7e39f0 100644
> --- a/doc/board/coreboot/coreboot.rst
> +++ b/doc/board/coreboot/coreboot.rst
> @@ -50,3 +50,22 @@ works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It
>  can be useful for running UEFI applications, for example.
>
>  This has only been lightly tested.
> +
> +
> +Memory map
> +----------
> +
> +::

Can we use the reST table syntax for the following table?

> +
> +    ffffffff  Top of ROM (and last byte of 32-bit address space)
> +    7a9fd000  Typical top of memory available to U-Boot
> +              (use cbsysinfo to see where memory range 'table' starts)
> +    10000000  Memory reserved by coreboot for mapping PCI devices
> +              (typical size 2151000, includes framebuffer)
> +     1920000  CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup
> +     1110000  CONFIG_SYS_TEXT_BASE (start address of U-Boot code, before reloc)
> +      110000  CONFIG_BLOBLIST_ADDR (before being relocated)
> +      100000  CONFIG_PRE_CON_BUF_ADDR
> +       f0000  ACPI tables set up by U-Boot
> +              (typically redirects to 7ab10030 or similar)
> +         500  Location of coreboot sysinfo table, used during startup
> --

Regards,
Bin

  reply	other threads:[~2021-04-08  2:59 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-07  4:32 [PATCH 00/17] misc: Some more misc patches Simon Glass
2021-04-07  4:32 ` [PATCH 01/17] pci: Use const for pci_find_device_id() etc Simon Glass
2021-04-08  2:29   ` Bin Meng
2021-04-07  4:32 ` [PATCH 02/17] x86: pci: Allow binding of some devices before relocation Simon Glass
2021-04-08  2:16   ` Bin Meng
2021-04-24  4:56     ` Simon Glass
2021-04-07  4:32 ` [PATCH 03/17] x86: Allow coreboot serial driver to guess the UART Simon Glass
2021-04-08  2:22   ` Bin Meng
2021-04-24  4:56     ` Simon Glass
2021-04-25  1:49       ` Bin Meng
2021-04-25  2:09         ` Simon Glass
2021-04-26  1:21           ` Bin Meng
2021-04-29 16:10             ` Simon Glass
2021-04-29 23:01               ` Bin Meng
2021-04-30 18:13                 ` Simon Glass
2021-04-30 18:41                   ` Andy Shevchenko
2021-05-04 15:26                     ` Simon Glass
2021-05-04 16:48                       ` Andy Shevchenko
2021-05-08  1:42                       ` Simon Glass
2021-05-08  1:47                         ` Bin Meng
2021-05-08  2:12                           ` Simon Glass
2021-05-08  2:26                             ` Bin Meng
2021-04-07  4:32 ` [PATCH 04/17] spi: ich: Don't require the PCH Simon Glass
2021-04-08  2:28   ` Bin Meng
2021-04-24  4:56     ` Simon Glass
2021-04-07  4:32 ` [PATCH 05/17] tpm: cr50: Drop unnecessary coral headers Simon Glass
2021-04-08  2:29   ` Bin Meng
2021-04-07  4:32 ` [PATCH 06/17] x86: Don't set up MTRRs if previously done Simon Glass
2021-04-08  2:42   ` Bin Meng
2021-04-07  4:32 ` [PATCH 07/17] x86: Update the MP constants to avoid conflicts Simon Glass
2021-04-08  2:43   ` Bin Meng
2021-04-07  4:32 ` [PATCH 08/17] x86: Do cache set-up by default when booting from coreboot Simon Glass
2021-04-08  2:43   ` Bin Meng
2021-04-07  4:32 ` [PATCH 09/17] x86: coreboot: Show the BIOS date Simon Glass
2021-04-08  2:43   ` Bin Meng
2021-04-07  4:32 ` [PATCH 10/17] x86: coral: Allow booting from coreboot Simon Glass
2021-04-08  2:43   ` Bin Meng
2021-04-07  4:32 ` [PATCH 11/17] x86: Add function comments to cb_sysinfo.h Simon Glass
2021-04-08  2:59   ` Bin Meng
2021-04-07  4:32 ` [PATCH 12/17] x86: coreboot: Use vendor in the Kconfig Simon Glass
2021-04-08  2:59   ` Bin Meng
2021-04-24  4:56     ` Simon Glass
2021-04-07  4:32 ` [PATCH 13/17] x86: coreboot: Enable the cbsysinfo command Simon Glass
2021-04-08  2:59   ` Bin Meng
2021-04-07  4:32 ` [PATCH 14/17] x86: coreboot: Document the memory map Simon Glass
2021-04-08  2:59   ` Bin Meng [this message]
2021-04-07  4:32 ` [PATCH 15/17] x86: Check ROM exists before building vboot Simon Glass
2021-04-08  2:59   ` Bin Meng
2021-04-08 22:07   ` Jaehoon Chung
2021-04-07  4:32 ` [PATCH 16/17] dtoc: Check that a parent is not missing Simon Glass
2021-04-07  4:32 ` [PATCH 17/17] doc: Update documentation for cros-2021.04 release Simon Glass
2021-04-08  3:02   ` Bin Meng
2021-04-24  4:56     ` Simon Glass

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