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From: Bin Meng <bmeng.cn@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v3 07/12] riscv: Add option to support RISC-V privileged spec 1.9.1
Date: Wed, 5 Feb 2020 00:04:21 +0800	[thread overview]
Message-ID: <CAEUhbmXd=wwtguaPiHSbqTt_vwv9UA=LDx6c4MHRQhOoL6U4KA@mail.gmail.com> (raw)
In-Reply-To: <ca0cc0ca-d9b7-4a6c-66b1-028b83f5a308@gmail.com>

Hi Sean,

On Tue, Feb 4, 2020 at 10:48 PM Sean Anderson <seanga2@gmail.com> wrote:
>
> On 2/4/20 9:38 AM, Bin Meng wrote:
> > Hi Sean,
> >
> > On Tue, Feb 4, 2020 at 10:19 PM Sean Anderson <seanga2@gmail.com> wrote:
> >> I believe the macro compiles to "csrs CSR_FOO". At least with my
> >> gcc/binutils (9.2.0/2.33.1) this style is not available for these older
> >> CSRs. Perhaps it would work if we switched to letting it compile with
> >> the numeric CSR as defined earlier in asm/csr.h
> >
> > It's already using the numeric CSR for csr_write(). Could you double check?
>
> Well, the current definition is
>
> #define csr_write(csr, val)                                     \
> ({                                                              \
>         unsigned long __v = (unsigned long)(val);               \
>         __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0"     \
>                               : : "rK" (__v)                    \
>                               : "memory");                      \
> })
>
> and _ASM_STR(csr) evaluates to #csr. I think that results in something
> like
>
> __asm__("csrw " "CSR_FOO" ", %0"

Yes, this generates numeric CSR for us.

>
> In any case, the errors I get are
>
> arch/riscv/cpu/cpu.c: Assembler messages:
> arch/riscv/cpu/cpu.c:94: Error: unknown CSR `CSR_MSCOUNTEREN'
> arch/riscv/cpu/cpu.c:94: Error: unknown CSR `CSR_MSCOUNTEREN'
>
> which doesn't seem like a numeric CSR to me.

Oops, I did a careful look and found that's because 'CSR_MSCOUNTEREN'
is undefined.

+#ifdef RISCV_PRIV_1_9_1

This should be: CONFIG_RISCV_PRIV_1_9_1

+#define CSR_MUCOUNTEREN         0x320
+#define CSR_MSCOUNTEREN         0x321
+#define CSR_MHCOUNTEREN         0x322
+#else
 #define CSR_MCOUNTEREN         0x306
+#endif

Regards,
Bin

  reply	other threads:[~2020-02-04 16:04 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-02 19:56 [PATCH v3 00/12] riscv: Add Sipeed Maix support Sean Anderson
2020-02-02 19:58 ` [PATCH v3 01/12] clk: Always use the supplied struct clk Sean Anderson
2020-02-06 21:21   ` Lukasz Majewski
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA46D30F5@ATCPCS16.andestech.com>
2020-02-12  1:23       ` Rick Chen
2020-02-02 19:58 ` [PATCH v3 02/12] clk: Check that ops of composite clock components, exist before calling Sean Anderson
2020-02-06 21:41   ` Lukasz Majewski
2020-02-02 19:59 ` [PATCH v3 03/12] clk: Unconditionally recursively en-/dis-able clocks Sean Anderson
2020-02-06 21:45   ` Lukasz Majewski
2020-02-02 20:01 ` [PATCH v3 04/12] reset: Add generic reset driver Sean Anderson
2020-02-03  0:04   ` Simon Glass
2020-02-03 23:14     ` Sean Anderson
2020-02-04 11:06   ` Bin Meng
2020-02-04 14:14     ` Sean Anderson
2020-02-02 20:02 ` [PATCH v3 05/12] dm: Add support for simple-pm-bus Sean Anderson
2020-02-03  0:04   ` Simon Glass
2020-02-03 23:15     ` Sean Anderson
2020-02-05  0:16       ` Simon Glass
2020-02-04 11:13   ` Bin Meng
2020-02-02 20:04 ` [PATCH v3 06/12] riscv: Add headers for asm/global_data.h Sean Anderson
2020-02-04 11:17   ` Bin Meng
2020-02-02 20:05 ` [PATCH v3 07/12] riscv: Add option to support RISC-V privileged spec 1.9.1 Sean Anderson
2020-02-04 11:21   ` Bin Meng
2020-02-04 14:19     ` Sean Anderson
2020-02-04 14:38       ` Bin Meng
2020-02-04 14:48         ` Sean Anderson
2020-02-04 16:04           ` Bin Meng [this message]
2020-02-04 16:07             ` Sean Anderson
2020-02-02 20:06 ` [PATCH v3 08/12] riscv: Allow use of reset drivers Sean Anderson
2020-02-04 11:22   ` Bin Meng
2020-02-02 20:07 ` [PATCH v3 09/12] riscv: Add K210 pll support Sean Anderson
2020-02-02 20:07 ` [PATCH v3 10/12] riscv: Add K210 clock support Sean Anderson
2020-02-06 21:51   ` Lukasz Majewski
2020-02-02 20:10 ` [PATCH v3 11/12] riscv: Add device tree for K210 Sean Anderson
2020-02-04 11:32   ` Bin Meng
2020-02-04 14:23     ` Sean Anderson
2020-02-04 14:40       ` Bin Meng
2020-02-02 20:10 ` [PATCH v3 12/12] riscv: Add initial Sipeed Maix support Sean Anderson
2020-02-04 11:38   ` Bin Meng
2020-02-04 14:26     ` Sean Anderson
2020-02-04 14:42       ` Bin Meng
2020-02-04 14:49         ` Sean Anderson

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