From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 8 Apr 2021 10:16:47 +0800
Subject: [PATCH 02/17] x86: pci: Allow binding of some devices before
 relocation
In-Reply-To: <20210407043228.2268429-3-sjg@chromium.org>
References: <20210407043228.2268429-1-sjg@chromium.org>
 <20210407043228.2268429-3-sjg@chromium.org>
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To: u-boot@lists.denx.de

Hi Simon,

On Wed, Apr 7, 2021 at 12:32 PM Simon Glass <sjg@chromium.org> wrote:
>
> At present only bridge devices are bound before relocation, to save space
> in pre-relocation memory. In some cases we do actually want to bind a
> device, e.g. because it provides the console UART. Add a devicetree
> binding to support this.
>
> Use the PCI_VENDEV() macro to encode the cell value. This is present in
> U-Boot but not used, so move it to the binding header-file.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  doc/device-tree-bindings/pci/x86-pci.txt |  7 ++++-
>  drivers/pci/pci-uclass.c                 | 33 +++++++++++++++++++++++-
>  include/dt-bindings/pci/pci.h            | 12 +++++++++
>  include/pci.h                            |  1 -
>  4 files changed, 50 insertions(+), 3 deletions(-)
>  create mode 100644 include/dt-bindings/pci/pci.h
>
> diff --git a/doc/device-tree-bindings/pci/x86-pci.txt b/doc/device-tree-bindings/pci/x86-pci.txt
> index 95e370b3e72..cf4e5ed595a 100644
> --- a/doc/device-tree-bindings/pci/x86-pci.txt
> +++ b/doc/device-tree-bindings/pci/x86-pci.txt
> @@ -20,6 +20,10 @@ For PCI devices the following optional property is available:
>         output to be lost. This should not generally be used in production code,
>         although it is often harmless.
>
> +- u-boot,pci-pre-reloc : List of vendor/device IDs to bind before relocation, even
> +       if they are not bridges. This is useful if the device is needed (e.g. a
> +       UART). The format is 0xvvvvdddd where d is the device ID and v is the
> +       vendor ID.

Can we reuse "u-boot,dm-pre-reloc" to do such thing?

The following is an example from arch/x86/dts/crownbay.dts

                                pciuart0: uart at a,1 {
                                        compatible = "pci8086,8811.00",
                                                        "pci8086,8811",
                                                        "pciclass,070002",
                                                        "pciclass,0700",
                                                        "ns16550";
                                        u-boot,dm-pre-reloc;
                                        reg = <0x00025100 0x0 0x0 0x0 0x0
                                               0x01025110 0x0 0x0 0x0 0x0>;
                                        reg-shift = <0>;
                                        clock-frequency = <1843200>;
                                        current-speed = <115200>;
                                };

Regards,
Bin