From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 8 Dec 2019 10:53:28 +0800
Subject: [PATCH v6 028/102] x86: Reduce mrccache record alignment size
In-Reply-To: <20191206213936.v6.28.I4de8ad84496e107ad6345eab4527090fa5460f92@changeid>
References: <20191207044315.51770-1-sjg@chromium.org>
 <20191206213936.v6.28.I4de8ad84496e107ad6345eab4527090fa5460f92@changeid>
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On Sat, Dec 7, 2019 at 12:47 PM Simon Glass <sjg@chromium.org> wrote:
>
> At present the records are 4KB in size. This is unnecessarily large when
> the SPI-flash erase size is 256 bytes. Reduce it so it will be more
> efficient with Apollo Lake's 24-byte variable-data record.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v6: None
> Changes in v5: None
> Changes in v4:
> - apollolake -> Apollo Lake
>
> Changes in v3: None
> Changes in v2: None
>
>  arch/x86/include/asm/mrccache.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

applied to u-boot-x86/next, thanks!