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Thu, 19 Oct 2023 09:22:34 -0700 (PDT) MIME-Version: 1.0 References: <20230521114715.955823-1-heiko.stuebner@vrull.eu> In-Reply-To: From: =?UTF-8?Q?Christoph_M=C3=BCllner?= Date: Thu, 19 Oct 2023 18:22:21 +0200 Message-ID: Subject: Re: [PATCH v3 0/2] Add Zawrs support and use it for spinlocks To: Andrea Parri Cc: Heiko Stuebner , linux-riscv@lists.infradead.org, palmer@dabbelt.com, paul.walmsley@sifive.com, linux-kernel@vger.kernel.org, David.Laight@aculab.com, Heiko Stuebner , Andrew Jones , Conor Dooley Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 19, 2023 at 4:21=E2=80=AFPM Andrea Parri wrote: > > On Sun, May 21, 2023 at 01:47:13PM +0200, Heiko Stuebner wrote: > > From: Heiko Stuebner > > > > Zawrs [0] was ratified in november 2022 [1], so I've resurrect the patc= h > > adding Zawrs support for spinlocks and adapted it to recent kernel > > changes. > > > > Also incorporated are the nice comments David Laight provided on v2. > > > > > > Changes since v2: > > - Rebase on top of 6.4-rc1 > > - Adapt to changed alternatives Kconfig handling > > - Adapt to changed cpufeature extension handling > > - Address review comments from David Laight > > - better handling for 32/64bit cases (less ifdefery) > > - less macros calling macros > > - don't duplicate __smp_load_reserved_relaxed in > > __smp_load_reserved_aquire > > > > Changes since v1: > > - Fixing type checking code for 32/64-bit values > > - Adjustments according to the specification change > > - Adding "depends on !XIP_KERNEL" to RISCV_ISA_ZAWRS > > > > > > [0] https://github.com/riscv/riscv-zawrs/blob/main/zawrs.adoc > > [1] https://github.com/riscv/riscv-zawrs/commit/9ff54f7e7fcd95cf1b111d2= e54276ff1183bcd37 > > > > Christoph M=C3=BCllner (1): > > riscv: Add Zawrs support for spinlocks > > > > Heiko Stuebner (1): > > riscv: don't include kernel.h into alternative.h > > > > arch/riscv/Kconfig | 10 +++++ > > arch/riscv/include/asm/alternative.h | 1 - > > arch/riscv/include/asm/barrier.h | 64 ++++++++++++++++++++++++++++ > > arch/riscv/include/asm/errata_list.h | 14 ++++++ > > arch/riscv/include/asm/hwcap.h | 1 + > > arch/riscv/kernel/cpu.c | 1 + > > arch/riscv/kernel/cpufeature.c | 1 + > > 7 files changed, 91 insertions(+), 1 deletion(-) > > > Hi Heiko and Christoph, > > I was wondering about the plan for this series: am I missing some update = to > this discussion? do we have a new version to review? Hi Andrea, Thanks for reaching out! We have this on the list of tasks that we would like to work on, but as this currently has low priority for us, we don't have a date when we can come up with a revised patch. > I actually went ahead (as Palmer suggested in private :-) ) and spent so= me > time trying to integrate feedback provided in this thread into your chang= es, > obtaining the diff below (on 6.6-rc6, the #include removal fixes some nom= mu > builds and should/can be splitted into a separate patch); thoughts? I had a quick look at your changes, and they look good to me. Did you agree with Palmer about testing requirements? I.e., do we need to run this on hardware that implements Zawrs in a non-trivial way? I can try to raise the priority on this here, but can't promise anything. For me it is also ok if you take over this patchset. BR Christoph > > Andrea > > > From 79d25361ddd4a14db6ce94aec140efbdf2d89684 Mon Sep 17 00:00:00 2001 > From: Andrea Parri > Date: Wed, 18 Oct 2023 02:22:28 +0200 > Subject: [PATCH] riscv: Implement LR+WRS-based smp_cond_load_{relaxed,acq= uire}() > > The Zawrs extension defines instructions allowing a core to enter > a low-power state and wait on a store to a memory location. > > Introduce the Zawrs-instruction WRS.STO and use it in the polling > loops of the macros smp_cond_load_{relaxed,acquire}(). > > Signed-off-by: Andrea Parri > [based on the arm64 implementation and work from Heiko and Christoph] > --- > arch/riscv/Kconfig | 14 +++++++++ > arch/riscv/include/asm/barrier.h | 26 ++++++++++++++++ > arch/riscv/include/asm/cmpxchg.h | 51 +++++++++++++++++++++++++++++++ > arch/riscv/include/asm/hwcap.h | 3 +- > arch/riscv/include/asm/insn-def.h | 2 ++ > arch/riscv/kernel/cpufeature.c | 1 + > 6 files changed, 95 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index d607ab0f7c6da..ff49f90d175ba 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -489,6 +489,20 @@ config RISCV_ISA_SVPBMT > > If you don't know what to do here, say Y. > > +config RISCV_ISA_ZAWRS > + bool "Zawrs extension support for wait-on-reservation-set instruc= tions" > + depends on RISCV_ALTERNATIVE > + default y > + help > + Adds support to dynamically detect the presence of the Zawrs > + extension and enable its usage. > + > + The Zawrs extension defines a pair of instructions to be used > + in polling loops that allows a core to enter a low-power state > + and wait on a store to a memory location. > + > + If you don't know what to do here, say Y. > + > config TOOLCHAIN_HAS_V > bool > default y > diff --git a/arch/riscv/include/asm/barrier.h b/arch/riscv/include/asm/ba= rrier.h > index 110752594228e..7ab7a28e72210 100644 > --- a/arch/riscv/include/asm/barrier.h > +++ b/arch/riscv/include/asm/barrier.h > @@ -71,6 +71,32 @@ do { = \ > */ > #define smp_mb__after_spinlock() RISCV_FENCE(iorw,iorw) > > +#define smp_cond_load_relaxed(ptr, cond_expr) \ > +({ \ > + typeof(ptr) __PTR =3D (ptr); = \ > + __unqual_scalar_typeof(*ptr) VAL; \ > + for (;;) { \ > + VAL =3D READ_ONCE(*__PTR); = \ > + if (cond_expr) \ > + break; \ > + __cmpwait_relaxed(__PTR, VAL); \ > + } \ > + (typeof(*ptr))VAL; \ > +}) > + > +#define smp_cond_load_acquire(ptr, cond_expr) \ > +({ \ > + typeof(ptr) __PTR =3D (ptr); = \ > + __unqual_scalar_typeof(*ptr) VAL; \ > + for (;;) { \ > + VAL =3D smp_load_acquire(__PTR); = \ > + if (cond_expr) \ > + break; \ > + __cmpwait_relaxed(__PTR, VAL); \ > + } \ > + (typeof(*ptr))VAL; \ > +}) > + > #include > > #endif /* __ASSEMBLY__ */ > diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cm= pxchg.h > index 2f4726d3cfcc2..65bc21379f40e 100644 > --- a/arch/riscv/include/asm/cmpxchg.h > +++ b/arch/riscv/include/asm/cmpxchg.h > @@ -8,8 +8,11 @@ > > #include > > +#include > #include > #include > +#include > +#include > > #define __xchg_relaxed(ptr, new, size) \ > ({ \ > @@ -360,4 +363,52 @@ > arch_cmpxchg_relaxed((ptr), (o), (n)); \ > }) > > +#define __CMPWAIT_CASE(w, sz) \ > +static inline void __cmpwait_case_##sz(volatile void *ptr, \ > + unsigned long val) \ > +{ \ > + unsigned long tmp; \ > + \ > + asm volatile(ALTERNATIVE( \ > + __nops(4), \ > + "lr." #w "\t" "%[tmp], %[v]\n\t" \ > + "xor %[tmp], %[tmp], %[val]\n\t" \ > + "bnez %[tmp], 1f\n\t" \ > + WRS_sto "\n\t" \ > + "1:\n", \ > + 0, RISCV_ISA_EXT_ZAWRS, CONFIG_RISCV_ISA_ZAWRS) \ > + : [tmp] "=3D&r" (tmp), [v] "+A" (*(u##sz *)ptr) = \ > + : [val] "rJ" (val) \ > + : "memory"); \ > +} > + > +__CMPWAIT_CASE(w, 32); > +__CMPWAIT_CASE(d, 64); > + > +#undef __CMPWAIT_CASE > + > +#define __CMPWAIT_GEN() = \ > +static __always_inline void __cmpwait(volatile void *ptr, \ > + unsigned long val, \ > + int size) \ > +{ \ > + switch (size) { \ > + case 4: \ > + return __cmpwait_case_32(ptr, val); \ > + case 8: \ > + return __cmpwait_case_64(ptr, val); \ > + default: \ > + BUILD_BUG(); \ > + } \ > + \ > + unreachable(); \ > +} > + > +__CMPWAIT_GEN() > + > +#undef __CMPWAIT_GEN > + > +#define __cmpwait_relaxed(ptr, val) \ > + __cmpwait((ptr), (unsigned long)(val), sizeof(*(ptr))) > + > #endif /* _ASM_RISCV_CMPXCHG_H */ > diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwca= p.h > index b7b58258f6c7c..afabcbf849526 100644 > --- a/arch/riscv/include/asm/hwcap.h > +++ b/arch/riscv/include/asm/hwcap.h > @@ -58,6 +58,7 @@ > #define RISCV_ISA_EXT_ZICSR 40 > #define RISCV_ISA_EXT_ZIFENCEI 41 > #define RISCV_ISA_EXT_ZIHPM 42 > +#define RISCV_ISA_EXT_ZAWRS 43 > > #define RISCV_ISA_EXT_MAX 64 > > @@ -69,8 +70,6 @@ > > #ifndef __ASSEMBLY__ > > -#include > - > unsigned long riscv_get_elf_hwcap(void); > > struct riscv_isa_ext_data { > diff --git a/arch/riscv/include/asm/insn-def.h b/arch/riscv/include/asm/i= nsn-def.h > index 6960beb75f329..fecb744ed7b29 100644 > --- a/arch/riscv/include/asm/insn-def.h > +++ b/arch/riscv/include/asm/insn-def.h > @@ -196,4 +196,6 @@ > INSN_I(OPCODE_MISC_MEM, FUNC3(2), __RD(0), \ > RS1(base), SIMM12(4)) > > +#define WRS_sto ".long 0x01d00073" > + > #endif /* __ASM_INSN_DEF_H */ > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeatur= e.c > index 1cfbba65d11ae..044682f54f78f 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -181,6 +181,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] =3D { > __RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL), > __RISCV_ISA_EXT_DATA(svnapot, RISCV_ISA_EXT_SVNAPOT), > __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT), > + __RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS), > }; > > const size_t riscv_isa_ext_count =3D ARRAY_SIZE(riscv_isa_ext); > -- > 2.34.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: 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Andrew Jones , Conor Dooley X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231019_092239_548513_D2587B84 X-CRM114-Status: GOOD ( 43.86 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org T24gVGh1LCBPY3QgMTksIDIwMjMgYXQgNDoyMeKAr1BNIEFuZHJlYSBQYXJyaSA8cGFycmkuYW5k cmVhQGdtYWlsLmNvbT4gd3JvdGU6Cj4KPiBPbiBTdW4sIE1heSAyMSwgMjAyMyBhdCAwMTo0Nzox M1BNICswMjAwLCBIZWlrbyBTdHVlYm5lciB3cm90ZToKPiA+IEZyb206IEhlaWtvIFN0dWVibmVy IDxoZWlrby5zdHVlYm5lckB2cnVsbC5ldT4KPiA+Cj4gPiBaYXdycyBbMF0gd2FzIHJhdGlmaWVk IGluIG5vdmVtYmVyIDIwMjIgWzFdLCBzbyBJJ3ZlIHJlc3VycmVjdCB0aGUgcGF0Y2gKPiA+IGFk ZGluZyBaYXdycyBzdXBwb3J0IGZvciBzcGlubG9ja3MgYW5kIGFkYXB0ZWQgaXQgdG8gcmVjZW50 IGtlcm5lbAo+ID4gY2hhbmdlcy4KPiA+Cj4gPiBBbHNvIGluY29ycG9yYXRlZCBhcmUgdGhlIG5p Y2UgY29tbWVudHMgRGF2aWQgTGFpZ2h0IHByb3ZpZGVkIG9uIHYyLgo+ID4KPiA+Cj4gPiBDaGFu Z2VzIHNpbmNlIHYyOgo+ID4gLSBSZWJhc2Ugb24gdG9wIG9mIDYuNC1yYzEKPiA+IC0gQWRhcHQg dG8gY2hhbmdlZCBhbHRlcm5hdGl2ZXMgS2NvbmZpZyBoYW5kbGluZwo+ID4gLSBBZGFwdCB0byBj aGFuZ2VkIGNwdWZlYXR1cmUgZXh0ZW5zaW9uIGhhbmRsaW5nCj4gPiAtIEFkZHJlc3MgcmV2aWV3 IGNvbW1lbnRzIGZyb20gRGF2aWQgTGFpZ2h0Cj4gPiAgIC0gYmV0dGVyIGhhbmRsaW5nIGZvciAz Mi82NGJpdCBjYXNlcyAobGVzcyBpZmRlZmVyeSkKPiA+ICAgLSBsZXNzIG1hY3JvcyBjYWxsaW5n IG1hY3Jvcwo+ID4gICAtIGRvbid0IGR1cGxpY2F0ZSBfX3NtcF9sb2FkX3Jlc2VydmVkX3JlbGF4 ZWQgaW4KPiA+ICAgICBfX3NtcF9sb2FkX3Jlc2VydmVkX2FxdWlyZQo+ID4KPiA+IENoYW5nZXMg c2luY2UgdjE6Cj4gPiAtIEZpeGluZyB0eXBlIGNoZWNraW5nIGNvZGUgZm9yIDMyLzY0LWJpdCB2 YWx1ZXMKPiA+IC0gQWRqdXN0bWVudHMgYWNjb3JkaW5nIHRvIHRoZSBzcGVjaWZpY2F0aW9uIGNo YW5nZQo+ID4gLSBBZGRpbmcgImRlcGVuZHMgb24gIVhJUF9LRVJORUwiIHRvIFJJU0NWX0lTQV9a QVdSUwo+ID4KPiA+Cj4gPiBbMF0gaHR0cHM6Ly9naXRodWIuY29tL3Jpc2N2L3Jpc2N2LXphd3Jz L2Jsb2IvbWFpbi96YXdycy5hZG9jCj4gPiBbMV0gaHR0cHM6Ly9naXRodWIuY29tL3Jpc2N2L3Jp c2N2LXphd3JzL2NvbW1pdC85ZmY1NGY3ZTdmY2Q5NWNmMWIxMTFkMmU1NDI3NmZmMTE4M2JjZDM3 Cj4gPgo+ID4gQ2hyaXN0b3BoIE3DvGxsbmVyICgxKToKPiA+ICAgcmlzY3Y6IEFkZCBaYXdycyBz dXBwb3J0IGZvciBzcGlubG9ja3MKPiA+Cj4gPiBIZWlrbyBTdHVlYm5lciAoMSk6Cj4gPiAgIHJp c2N2OiBkb24ndCBpbmNsdWRlIGtlcm5lbC5oIGludG8gYWx0ZXJuYXRpdmUuaAo+ID4KPiA+ICBh cmNoL3Jpc2N2L0tjb25maWcgICAgICAgICAgICAgICAgICAgfCAxMCArKysrKwo+ID4gIGFyY2gv cmlzY3YvaW5jbHVkZS9hc20vYWx0ZXJuYXRpdmUuaCB8ICAxIC0KPiA+ICBhcmNoL3Jpc2N2L2lu Y2x1ZGUvYXNtL2JhcnJpZXIuaCAgICAgfCA2NCArKysrKysrKysrKysrKysrKysrKysrKysrKysr Cj4gPiAgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9lcnJhdGFfbGlzdC5oIHwgMTQgKysrKysrCj4g PiAgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9od2NhcC5oICAgICAgIHwgIDEgKwo+ID4gIGFyY2gv cmlzY3Yva2VybmVsL2NwdS5jICAgICAgICAgICAgICB8ICAxICsKPiA+ICBhcmNoL3Jpc2N2L2tl cm5lbC9jcHVmZWF0dXJlLmMgICAgICAgfCAgMSArCj4gPiAgNyBmaWxlcyBjaGFuZ2VkLCA5MSBp bnNlcnRpb25zKCspLCAxIGRlbGV0aW9uKC0pCj4KPgo+IEhpIEhlaWtvIGFuZCBDaHJpc3RvcGgs Cj4KPiBJIHdhcyB3b25kZXJpbmcgYWJvdXQgdGhlIHBsYW4gZm9yIHRoaXMgc2VyaWVzOiBhbSBJ IG1pc3Npbmcgc29tZSB1cGRhdGUgdG8KPiB0aGlzIGRpc2N1c3Npb24/IGRvIHdlIGhhdmUgYSBu ZXcgdmVyc2lvbiB0byByZXZpZXc/CgpIaSBBbmRyZWEsCgpUaGFua3MgZm9yIHJlYWNoaW5nIG91 dCEKV2UgaGF2ZSB0aGlzIG9uIHRoZSBsaXN0IG9mIHRhc2tzIHRoYXQgd2Ugd291bGQgbGlrZSB0 byB3b3JrIG9uLApidXQgYXMgdGhpcyBjdXJyZW50bHkgaGFzIGxvdyBwcmlvcml0eSBmb3IgdXMs IHdlIGRvbid0IGhhdmUgYSBkYXRlCndoZW4gd2UgY2FuIGNvbWUgdXAgd2l0aCBhIHJldmlzZWQg cGF0Y2guCgo+IEkgYWN0dWFsbHkgd2VudCBhaGVhZCAoYXMgUGFsbWVyIHN1Z2dlc3RlZCBpbiBw cml2YXRlICA6LSkgKSBhbmQgc3BlbnQgc29tZQo+IHRpbWUgdHJ5aW5nIHRvIGludGVncmF0ZSBm ZWVkYmFjayBwcm92aWRlZCBpbiB0aGlzIHRocmVhZCBpbnRvIHlvdXIgY2hhbmdlcywKPiBvYnRh aW5pbmcgdGhlIGRpZmYgYmVsb3cgKG9uIDYuNi1yYzYsIHRoZSAjaW5jbHVkZSByZW1vdmFsIGZp eGVzIHNvbWUgbm9tbXUKPiBidWlsZHMgYW5kIHNob3VsZC9jYW4gYmUgc3BsaXR0ZWQgaW50byBh IHNlcGFyYXRlIHBhdGNoKTsgdGhvdWdodHM/CgpJIGhhZCBhIHF1aWNrIGxvb2sgYXQgeW91ciBj aGFuZ2VzLCBhbmQgdGhleSBsb29rIGdvb2QgdG8gbWUuCgpEaWQgeW91IGFncmVlIHdpdGggUGFs bWVyIGFib3V0IHRlc3RpbmcgcmVxdWlyZW1lbnRzPwpJLmUuLCBkbyB3ZSBuZWVkIHRvIHJ1biB0 aGlzIG9uIGhhcmR3YXJlIHRoYXQgaW1wbGVtZW50cyBaYXdycyBpbiBhCm5vbi10cml2aWFsIHdh eT8KCkkgY2FuIHRyeSB0byByYWlzZSB0aGUgcHJpb3JpdHkgb24gdGhpcyBoZXJlLCBidXQgY2Fu J3QgcHJvbWlzZSBhbnl0aGluZy4KRm9yIG1lIGl0IGlzIGFsc28gb2sgaWYgeW91IHRha2Ugb3Zl ciB0aGlzIHBhdGNoc2V0LgoKQlIKQ2hyaXN0b3BoCgo+Cj4gICBBbmRyZWEKPgo+Cj4gRnJvbSA3 OWQyNTM2MWRkZDRhMTRkYjZjZTk0YWVjMTQwZWZiZGYyZDg5Njg0IE1vbiBTZXAgMTcgMDA6MDA6 MDAgMjAwMQo+IEZyb206IEFuZHJlYSBQYXJyaSA8cGFycmkuYW5kcmVhQGdtYWlsLmNvbT4KPiBE YXRlOiBXZWQsIDE4IE9jdCAyMDIzIDAyOjIyOjI4ICswMjAwCj4gU3ViamVjdDogW1BBVENIXSBy aXNjdjogSW1wbGVtZW50IExSK1dSUy1iYXNlZCBzbXBfY29uZF9sb2FkX3tyZWxheGVkLGFjcXVp cmV9KCkKPgo+IFRoZSBaYXdycyBleHRlbnNpb24gZGVmaW5lcyBpbnN0cnVjdGlvbnMgYWxsb3dp bmcgYSBjb3JlIHRvIGVudGVyCj4gYSBsb3ctcG93ZXIgc3RhdGUgYW5kIHdhaXQgb24gYSBzdG9y ZSB0byBhIG1lbW9yeSBsb2NhdGlvbi4KPgo+IEludHJvZHVjZSB0aGUgWmF3cnMtaW5zdHJ1Y3Rp b24gV1JTLlNUTyBhbmQgdXNlIGl0IGluIHRoZSBwb2xsaW5nCj4gbG9vcHMgb2YgdGhlIG1hY3Jv cyBzbXBfY29uZF9sb2FkX3tyZWxheGVkLGFjcXVpcmV9KCkuCj4KPiBTaWduZWQtb2ZmLWJ5OiBB bmRyZWEgUGFycmkgPHBhcnJpLmFuZHJlYUBnbWFpbC5jb20+Cj4gW2Jhc2VkIG9uIHRoZSBhcm02 NCBpbXBsZW1lbnRhdGlvbiBhbmQgd29yayBmcm9tIEhlaWtvIGFuZCBDaHJpc3RvcGhdCj4gLS0t Cj4gIGFyY2gvcmlzY3YvS2NvbmZpZyAgICAgICAgICAgICAgICB8IDE0ICsrKysrKysrKwo+ICBh cmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2JhcnJpZXIuaCAgfCAyNiArKysrKysrKysrKysrKysrCj4g IGFyY2gvcmlzY3YvaW5jbHVkZS9hc20vY21weGNoZy5oICB8IDUxICsrKysrKysrKysrKysrKysr KysrKysrKysrKysrKysKPiAgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9od2NhcC5oICAgIHwgIDMg Ky0KPiAgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9pbnNuLWRlZi5oIHwgIDIgKysKPiAgYXJjaC9y aXNjdi9rZXJuZWwvY3B1ZmVhdHVyZS5jICAgIHwgIDEgKwo+ICA2IGZpbGVzIGNoYW5nZWQsIDk1 IGluc2VydGlvbnMoKyksIDIgZGVsZXRpb25zKC0pCj4KPiBkaWZmIC0tZ2l0IGEvYXJjaC9yaXNj di9LY29uZmlnIGIvYXJjaC9yaXNjdi9LY29uZmlnCj4gaW5kZXggZDYwN2FiMGY3YzZkYS4uZmY0 OWY5MGQxNzViYSAxMDA2NDQKPiAtLS0gYS9hcmNoL3Jpc2N2L0tjb25maWcKPiArKysgYi9hcmNo L3Jpc2N2L0tjb25maWcKPiBAQCAtNDg5LDYgKzQ4OSwyMCBAQCBjb25maWcgUklTQ1ZfSVNBX1NW UEJNVAo+Cj4gICAgICAgICAgICBJZiB5b3UgZG9uJ3Qga25vdyB3aGF0IHRvIGRvIGhlcmUsIHNh eSBZLgo+Cj4gK2NvbmZpZyBSSVNDVl9JU0FfWkFXUlMKPiArICAgICAgIGJvb2wgIlphd3JzIGV4 dGVuc2lvbiBzdXBwb3J0IGZvciB3YWl0LW9uLXJlc2VydmF0aW9uLXNldCBpbnN0cnVjdGlvbnMi Cj4gKyAgICAgICBkZXBlbmRzIG9uIFJJU0NWX0FMVEVSTkFUSVZFCj4gKyAgICAgICBkZWZhdWx0 IHkKPiArICAgICAgIGhlbHAKPiArICAgICAgICAgIEFkZHMgc3VwcG9ydCB0byBkeW5hbWljYWxs eSBkZXRlY3QgdGhlIHByZXNlbmNlIG9mIHRoZSBaYXdycwo+ICsgICAgICAgICAgZXh0ZW5zaW9u IGFuZCBlbmFibGUgaXRzIHVzYWdlLgo+ICsKPiArICAgICAgICAgIFRoZSBaYXdycyBleHRlbnNp b24gZGVmaW5lcyBhIHBhaXIgb2YgaW5zdHJ1Y3Rpb25zIHRvIGJlIHVzZWQKPiArICAgICAgICAg IGluIHBvbGxpbmcgbG9vcHMgdGhhdCBhbGxvd3MgYSBjb3JlIHRvIGVudGVyIGEgbG93LXBvd2Vy IHN0YXRlCj4gKyAgICAgICAgICBhbmQgd2FpdCBvbiBhIHN0b3JlIHRvIGEgbWVtb3J5IGxvY2F0 aW9uLgo+ICsKPiArICAgICAgICAgIElmIHlvdSBkb24ndCBrbm93IHdoYXQgdG8gZG8gaGVyZSwg c2F5IFkuCj4gKwo+ICBjb25maWcgVE9PTENIQUlOX0hBU19WCj4gICAgICAgICBib29sCj4gICAg ICAgICBkZWZhdWx0IHkKPiBkaWZmIC0tZ2l0IGEvYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9iYXJy aWVyLmggYi9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2JhcnJpZXIuaAo+IGluZGV4IDExMDc1MjU5 NDIyOGUuLjdhYjdhMjhlNzIyMTAgMTAwNjQ0Cj4gLS0tIGEvYXJjaC9yaXNjdi9pbmNsdWRlL2Fz bS9iYXJyaWVyLmgKPiArKysgYi9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2JhcnJpZXIuaAo+IEBA IC03MSw2ICs3MSwzMiBAQCBkbyB7ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICBcCj4gICAqLwo+ICAjZGVmaW5lIHNtcF9tYl9f YWZ0ZXJfc3BpbmxvY2soKSAgICAgICBSSVNDVl9GRU5DRShpb3J3LGlvcncpCj4KPiArI2RlZmlu ZSBzbXBfY29uZF9sb2FkX3JlbGF4ZWQocHRyLCBjb25kX2V4cHIpICAgICAgICAgICAgICAgICAg ICAgICAgICBcCj4gKyh7ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgdHlwZW9mKHB0cikgX19QVFIg PSAocHRyKTsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAg IF9fdW5xdWFsX3NjYWxhcl90eXBlb2YoKnB0cikgVkFMOyAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICBcCj4gKyAgICAgICBmb3IgKDs7KSB7ICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgICAgICAgICBWQUwgPSBSRUFE X09OQ0UoKl9fUFRSKTsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAg ICAgICAgICAgaWYgKGNvbmRfZXhwcikgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICBcCj4gKyAgICAgICAgICAgICAgICAgICAgICAgYnJlYWs7ICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgICAgICAgICBfX2NtcHdhaXRf cmVsYXhlZChfX1BUUiwgVkFMKTsgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAg IH0gICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICBcCj4gKyAgICAgICAodHlwZW9mKCpwdHIpKVZBTDsgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgXAo+ICt9KQo+ICsKPiArI2RlZmluZSBzbXBfY29u ZF9sb2FkX2FjcXVpcmUocHRyLCBjb25kX2V4cHIpICAgICAgICAgICAgICAgICAgICAgICAgICBc Cj4gKyh7ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgdHlwZW9mKHB0cikgX19QVFIgPSAocHRyKTsg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgIF9fdW5xdWFs X3NjYWxhcl90eXBlb2YoKnB0cikgVkFMOyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBc Cj4gKyAgICAgICBmb3IgKDs7KSB7ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgICAgICAgICBWQUwgPSBzbXBfbG9hZF9hY3F1 aXJlKF9fUFRSKTsgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgICAgICAgICAg aWYgKGNvbmRfZXhwcikgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBc Cj4gKyAgICAgICAgICAgICAgICAgICAgICAgYnJlYWs7ICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgICAgICAgICBfX2NtcHdhaXRfcmVsYXhlZChf X1BUUiwgVkFMKTsgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgIH0gICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBc Cj4gKyAgICAgICAodHlwZW9mKCpwdHIpKVZBTDsgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgXAo+ICt9KQo+ICsKPiAgI2luY2x1ZGUgPGFzbS1nZW5lcmljL2Jh cnJpZXIuaD4KPgo+ICAjZW5kaWYgLyogX19BU1NFTUJMWV9fICovCj4gZGlmZiAtLWdpdCBhL2Fy Y2gvcmlzY3YvaW5jbHVkZS9hc20vY21weGNoZy5oIGIvYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9j bXB4Y2hnLmgKPiBpbmRleCAyZjQ3MjZkM2NmY2MyLi42NWJjMjEzNzlmNDBlIDEwMDY0NAo+IC0t LSBhL2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vY21weGNoZy5oCj4gKysrIGIvYXJjaC9yaXNjdi9p bmNsdWRlL2FzbS9jbXB4Y2hnLmgKPiBAQCAtOCw4ICs4LDExIEBACj4KPiAgI2luY2x1ZGUgPGxp bnV4L2J1Zy5oPgo+Cj4gKyNpbmNsdWRlIDxhc20vYWx0ZXJuYXRpdmUtbWFjcm9zLmg+Cj4gICNp bmNsdWRlIDxhc20vYmFycmllci5oPgo+ICAjaW5jbHVkZSA8YXNtL2ZlbmNlLmg+Cj4gKyNpbmNs dWRlIDxhc20vaHdjYXAuaD4KPiArI2luY2x1ZGUgPGFzbS9pbnNuLWRlZi5oPgo+Cj4gICNkZWZp bmUgX194Y2hnX3JlbGF4ZWQocHRyLCBuZXcsIHNpemUpICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgXAo+ICAoeyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiBAQCAtMzYwLDQgKzM2Myw1MiBAQAo+ICAg ICAgICAgYXJjaF9jbXB4Y2hnX3JlbGF4ZWQoKHB0ciksIChvKSwgKG4pKTsgICAgICAgICAgICAg ICAgICAgICAgICAgIFwKPiAgfSkKPgo+ICsjZGVmaW5lIF9fQ01QV0FJVF9DQVNFKHcsIHN6KSAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArc3RhdGljIGlubGlu ZSB2b2lkIF9fY21wd2FpdF9jYXNlXyMjc3oodm9sYXRpbGUgdm9pZCAqcHRyLCAgICAgICAgICAg ICBcCj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgdW5zaWduZWQgbG9u ZyB2YWwpICAgICAgICAgICAgICAgXAo+ICt7ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgIHVuc2ln bmVkIGxvbmcgdG1wOyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICBcCj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgYXNtIHZvbGF0aWxlKEFMVEVSTkFUSVZF KCAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgICAgICAg ICAgX19ub3BzKDQpLCAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICBcCj4gKyAgICAgICAgICAgICAgICJsci4iICN3ICJcdCIgIiVbdG1wXSwgJVt2XVxuXHQiICAg ICAgICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgICAgICAgICAieG9yICAgICVbdG1wXSwg JVt0bXBdLCAlW3ZhbF1cblx0IiAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgICAgICAg ICAgImJuZXogICAlW3RtcF0sIDFmXG5cdCIgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICBcCj4gKyAgICAgICAgICAgICAgIFdSU19zdG8gIlxuXHQiICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgICAgICAgICAiMTpcbiIsICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgICAgICAg ICAgMCwgUklTQ1ZfSVNBX0VYVF9aQVdSUywgQ09ORklHX1JJU0NWX0lTQV9aQVdSUykgICAgICAg ICBcCj4gKyAgICAgICA6IFt0bXBdICI9JnIiICh0bXApLCBbdl0gIitBIiAoKih1IyNzeiAqKXB0 cikgICAgICAgICAgICAgICAgICAgXAo+ICsgICAgICAgOiBbdmFsXSAickoiICh2YWwpICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgIDogIm1l bW9yeSIpOyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICBcCj4gK30KPiArCj4gK19fQ01QV0FJVF9DQVNFKHcsIDMyKTsKPiArX19DTVBXQUlUX0NBU0Uo ZCwgNjQpOwo+ICsKPiArI3VuZGVmIF9fQ01QV0FJVF9DQVNFCj4gKwo+ICsjZGVmaW5lIF9fQ01Q V0FJVF9HRU4oKSAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgXAo+ICtzdGF0aWMgX19hbHdheXNfaW5saW5lIHZvaWQgX19jbXB3YWl0KHZvbGF0 aWxlIHZvaWQgKnB0ciwgICAgICAgICAgICAgIFwKPiArICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgIHVuc2lnbmVkIGxvbmcgdmFsLCAgICAgICAgICAgICAgICBcCj4gKyAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBpbnQgc2l6ZSkgICAgICAgICAgICAgICAg ICAgICAgICAgXAo+ICt7ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgIHN3aXRjaCAoc2l6ZSkgeyAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBcCj4gKyAgICAg ICBjYXNlIDQ6ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgXAo+ICsgICAgICAgICAgICAgICByZXR1cm4gX19jbXB3YWl0X2Nhc2VfMzIocHRy LCB2YWwpOyAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgIGNhc2UgODogICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBcCj4gKyAgICAg ICAgICAgICAgIHJldHVybiBfX2NtcHdhaXRfY2FzZV82NChwdHIsIHZhbCk7ICAgICAgICAgICAg ICAgICAgICAgXAo+ICsgICAgICAgZGVmYXVsdDogICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgICAgICAgICAgQlVJTERfQlVH KCk7ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBcCj4gKyAgICAg ICB9ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgXAo+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgIFwKPiArICAgICAgIHVucmVhY2hhYmxlKCk7ICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBcCj4gK30KPiAr Cj4gK19fQ01QV0FJVF9HRU4oKQo+ICsKPiArI3VuZGVmIF9fQ01QV0FJVF9HRU4KPiArCj4gKyNk ZWZpbmUgX19jbXB3YWl0X3JlbGF4ZWQocHRyLCB2YWwpICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgXAo+ICsgICAgICAgX19jbXB3YWl0KChwdHIpLCAodW5zaWduZWQgbG9uZyko dmFsKSwgc2l6ZW9mKCoocHRyKSkpCj4gKwo+ICAjZW5kaWYgLyogX0FTTV9SSVNDVl9DTVBYQ0hH X0ggKi8KPiBkaWZmIC0tZ2l0IGEvYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9od2NhcC5oIGIvYXJj aC9yaXNjdi9pbmNsdWRlL2FzbS9od2NhcC5oCj4gaW5kZXggYjdiNTgyNThmNmM3Yy4uYWZhYmNi Zjg0OTUyNiAxMDA2NDQKPiAtLS0gYS9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2h3Y2FwLmgKPiAr KysgYi9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2h3Y2FwLmgKPiBAQCAtNTgsNiArNTgsNyBAQAo+ ICAjZGVmaW5lIFJJU0NWX0lTQV9FWFRfWklDU1IgICAgICAgICAgICA0MAo+ICAjZGVmaW5lIFJJ U0NWX0lTQV9FWFRfWklGRU5DRUkgICAgICAgICA0MQo+ICAjZGVmaW5lIFJJU0NWX0lTQV9FWFRf WklIUE0gICAgICAgICAgICA0Mgo+ICsjZGVmaW5lIFJJU0NWX0lTQV9FWFRfWkFXUlMgICAgICAg ICAgICA0Mwo+Cj4gICNkZWZpbmUgUklTQ1ZfSVNBX0VYVF9NQVggICAgICAgICAgICAgIDY0Cj4K PiBAQCAtNjksOCArNzAsNiBAQAo+Cj4gICNpZm5kZWYgX19BU1NFTUJMWV9fCj4KPiAtI2luY2x1 ZGUgPGxpbnV4L2p1bXBfbGFiZWwuaD4KPiAtCj4gIHVuc2lnbmVkIGxvbmcgcmlzY3ZfZ2V0X2Vs Zl9od2NhcCh2b2lkKTsKPgo+ICBzdHJ1Y3QgcmlzY3ZfaXNhX2V4dF9kYXRhIHsKPiBkaWZmIC0t Z2l0IGEvYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9pbnNuLWRlZi5oIGIvYXJjaC9yaXNjdi9pbmNs dWRlL2FzbS9pbnNuLWRlZi5oCj4gaW5kZXggNjk2MGJlYjc1ZjMyOS4uZmVjYjc0NGVkN2IyOSAx MDA2NDQKPiAtLS0gYS9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2luc24tZGVmLmgKPiArKysgYi9h cmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2luc24tZGVmLmgKPiBAQCAtMTk2LDQgKzE5Niw2IEBACj4g ICAgICAgICBJTlNOX0koT1BDT0RFX01JU0NfTUVNLCBGVU5DMygyKSwgX19SRCgwKSwgICAgICAg ICAgICAgIFwKPiAgICAgICAgICAgICAgICBSUzEoYmFzZSksIFNJTU0xMig0KSkKPgo+ICsjZGVm aW5lIFdSU19zdG8gICAgICAgICIubG9uZyAweDAxZDAwMDczIgo+ICsKPiAgI2VuZGlmIC8qIF9f QVNNX0lOU05fREVGX0ggKi8KPiBkaWZmIC0tZ2l0IGEvYXJjaC9yaXNjdi9rZXJuZWwvY3B1ZmVh dHVyZS5jIGIvYXJjaC9yaXNjdi9rZXJuZWwvY3B1ZmVhdHVyZS5jCj4gaW5kZXggMWNmYmJhNjVk MTFhZS4uMDQ0NjgyZjU0Zjc4ZiAxMDA2NDQKPiAtLS0gYS9hcmNoL3Jpc2N2L2tlcm5lbC9jcHVm ZWF0dXJlLmMKPiArKysgYi9hcmNoL3Jpc2N2L2tlcm5lbC9jcHVmZWF0dXJlLmMKPiBAQCAtMTgx LDYgKzE4MSw3IEBAIGNvbnN0IHN0cnVjdCByaXNjdl9pc2FfZXh0X2RhdGEgcmlzY3ZfaXNhX2V4 dFtdID0gewo+ICAgICAgICAgX19SSVNDVl9JU0FfRVhUX0RBVEEoc3ZpbnZhbCwgUklTQ1ZfSVNB X0VYVF9TVklOVkFMKSwKPiAgICAgICAgIF9fUklTQ1ZfSVNBX0VYVF9EQVRBKHN2bmFwb3QsIFJJ U0NWX0lTQV9FWFRfU1ZOQVBPVCksCj4gICAgICAgICBfX1JJU0NWX0lTQV9FWFRfREFUQShzdnBi bXQsIFJJU0NWX0lTQV9FWFRfU1ZQQk1UKSwKPiArICAgICAgIF9fUklTQ1ZfSVNBX0VYVF9EQVRB KHphd3JzLCBSSVNDVl9JU0FfRVhUX1pBV1JTKSwKPiAgfTsKPgo+ICBjb25zdCBzaXplX3Qgcmlz Y3ZfaXNhX2V4dF9jb3VudCA9IEFSUkFZX1NJWkUocmlzY3ZfaXNhX2V4dCk7Cj4gLS0KPiAyLjM0 LjEKPgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGlu dXgtcmlzY3YgbWFpbGluZyBsaXN0CmxpbnV4LXJpc2N2QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0 cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1yaXNjdgo=