From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42367) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YlRC4-0002Ys-Sg for qemu-devel@nongnu.org; Thu, 23 Apr 2015 20:10:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YlRC1-0000jz-MX for qemu-devel@nongnu.org; Thu, 23 Apr 2015 20:10:08 -0400 Received: from mail-qc0-f175.google.com ([209.85.216.175]:35134) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YlRC1-0000iX-HN for qemu-devel@nongnu.org; Thu, 23 Apr 2015 20:10:05 -0400 Received: by qcbii10 with SMTP id ii10so18214247qcb.2 for ; Thu, 23 Apr 2015 17:10:05 -0700 (PDT) MIME-Version: 1.0 Sender: peter.crosthwaite@petalogix.com In-Reply-To: References: <851b48b5b90c2808d3b275025f77e37a67fdd09d.1427108387.git.peter.crosthwaite@xilinx.com> Date: Thu, 23 Apr 2015 17:10:05 -0700 Message-ID: From: Peter Crosthwaite Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH target-arm v4 08/16] net: cadence_gem: Split state struct and type into header List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Edgar Iglesias , zach.pfeffer@xilinx.com, Ryota Ozaki , QEMU Developers , Alistair Francis , "michals@xilinx.com" On Thu, Apr 23, 2015 at 10:51 AM, Peter Maydell wrote: > On 23 March 2015 at 11:05, Peter Crosthwaite > wrote: >> To allow using the device with modern SoC programming conventions. The >> state struct needs to be visible to embed the device in SoC containers. >> >> Reviewed-by: Alistair Francis >> Signed-off-by: Peter Crosthwaite >> --- >> changed since v1: >> Fix /* Public */ comment spacing (Alistair review) >> >> hw/net/cadence_gem.c | 43 +------------------------------------- >> include/hw/net/cadence_gem.h | 49 ++++++++++++++++++++++++++++++++++++++++++++ >> 2 files changed, 50 insertions(+), 42 deletions(-) >> create mode 100644 include/hw/net/cadence_gem.h >> >> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c >> index 5994306..dafe914 100644 >> --- a/hw/net/cadence_gem.c >> +++ b/hw/net/cadence_gem.c >> @@ -24,8 +24,7 @@ >> >> #include /* For crc32 */ >> >> -#include "hw/sysbus.h" >> -#include "net/net.h" >> +#include "hw/net/cadence_gem.h" >> #include "net/checksum.h" >> >> #ifdef CADENCE_GEM_ERR_DEBUG >> @@ -141,8 +140,6 @@ >> #define GEM_DESCONF6 (0x00000294/4) >> #define GEM_DESCONF7 (0x00000298/4) >> >> -#define CADENCE_GEM_MAXREG (0x00000640/4) /* Last valid GEM address */ >> - >> /*****************************************/ >> #define GEM_NWCTRL_TXSTART 0x00000200 /* Transmit Enable */ >> #define GEM_NWCTRL_TXENA 0x00000008 /* Transmit Enable */ >> @@ -349,44 +346,6 @@ static inline void rx_desc_set_sar(unsigned *desc, int sar_idx) >> desc[1] |= R_DESC_1_RX_SAR_MATCH; >> } >> >> -#define TYPE_CADENCE_GEM "cadence_gem" >> -#define CADENCE_GEM(obj) OBJECT_CHECK(CadenceGEMState, (obj), TYPE_CADENCE_GEM) >> - >> -typedef struct CadenceGEMState { >> - SysBusDevice parent_obj; >> - >> - MemoryRegion iomem; >> - NICState *nic; >> - NICConf conf; >> - qemu_irq irq; >> - >> - /* GEM registers backing store */ >> - uint32_t regs[CADENCE_GEM_MAXREG]; >> - /* Mask of register bits which are write only */ >> - uint32_t regs_wo[CADENCE_GEM_MAXREG]; >> - /* Mask of register bits which are read only */ >> - uint32_t regs_ro[CADENCE_GEM_MAXREG]; >> - /* Mask of register bits which are clear on read */ >> - uint32_t regs_rtc[CADENCE_GEM_MAXREG]; >> - /* Mask of register bits which are write 1 to clear */ >> - uint32_t regs_w1c[CADENCE_GEM_MAXREG]; >> - >> - /* PHY registers backing store */ >> - uint16_t phy_regs[32]; >> - >> - uint8_t phy_loop; /* Are we in phy loopback? */ >> - >> - /* The current DMA descriptor pointers */ >> - uint32_t rx_desc_addr; >> - uint32_t tx_desc_addr; >> - >> - uint8_t can_rx_state; /* Debug only */ >> - >> - unsigned rx_desc[2]; >> - >> - bool sar_active[4]; >> -} CadenceGEMState; >> - >> /* The broadcast MAC address: 0xFFFFFFFFFFFF */ >> static const uint8_t broadcast_addr[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; >> >> diff --git a/include/hw/net/cadence_gem.h b/include/hw/net/cadence_gem.h >> new file mode 100644 >> index 0000000..12de820 >> --- /dev/null >> +++ b/include/hw/net/cadence_gem.h >> @@ -0,0 +1,49 @@ >> +#ifndef CADENCE_GEM_H_ > > This new file needs a copyright-and-license comment, and the > include guard should lose the trailing '_', but otherwise > Reviewed-by: Peter Maydell > Fixed. Thanks. Regards, Peter > thanks > -- PMM >