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Date: Tue, 12 May 2015 01:10:49 -0700
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From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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Subject: Re: [Qemu-devel] [PULL 00/19] target-arm queue
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>

On Tue, May 12, 2015 at 1:01 AM, Peter Maydell <peter.maydell@linaro.org> w=
rote:
> On 11 May 2015 at 14:40, Peter Maydell <peter.maydell@linaro.org> wrote:
>> This is mostly the GIC TZ changes, with a couple of other
>> minor bugfixes.
>>
>> -- PMM
>>
>> The following changes since commit b951cda21d6b232f138ccf008e12bce8ddc95=
465:
>>
>>   Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into =
staging (2015-05-11 12:01:09 +0100)
>>
>> are available in the git repository at:
>>
>>
>>   git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm=
-20150511
>>
>> for you to fetch changes up to 49855cdaed78f66f501df6e18b8b3b7012cea2eb:
>>
>>   hw/arm/highbank.c: Wire FIQ between CPU <> GIC (2015-05-11 14:28:54 +0=
100)
>
> Oops:
>
> hw/intc/arm_gic_kvm.c: In function =E2=80=98kvm_arm_gic_put=E2=80=99:
> hw/intc/arm_gic_kvm.c:357:12: error: =E2=80=98GICState=E2=80=99 has no me=
mber named =E2=80=98enabled=E2=80=99
> hw/intc/arm_gic_kvm.c: In function =E2=80=98kvm_arm_gic_get=E2=80=99:
> hw/intc/arm_gic_kvm.c:458:6: error: =E2=80=98GICState=E2=80=99 has no mem=
ber named =E2=80=98enabled=E2=80=99
>
> I could have sworn I'd tested that. Will fix & respin...
>

Feel like grabbing the new Zynq series (v9) with it? :)

Regards,
Peter

> -- PMM
>