From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48592) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WPRbD-0004B9-9E for qemu-devel@nongnu.org; Mon, 17 Mar 2014 03:04:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WPRb8-0007Sg-SF for qemu-devel@nongnu.org; Mon, 17 Mar 2014 03:04:39 -0400 Received: from mail-we0-f179.google.com ([74.125.82.179]:37153) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WPRb8-0007SZ-J3 for qemu-devel@nongnu.org; Mon, 17 Mar 2014 03:04:34 -0400 Received: by mail-we0-f179.google.com with SMTP id x48so4080679wes.24 for ; Mon, 17 Mar 2014 00:04:33 -0700 (PDT) MIME-Version: 1.0 Sender: peter.crosthwaite@petalogix.com In-Reply-To: <1394134385-1727-19-git-send-email-peter.maydell@linaro.org> References: <1394134385-1727-1-git-send-email-peter.maydell@linaro.org> <1394134385-1727-19-git-send-email-peter.maydell@linaro.org> Date: Mon, 17 Mar 2014 17:04:33 +1000 Message-ID: From: Peter Crosthwaite Content-Type: text/plain; charset=ISO-8859-1 Subject: Re: [Qemu-devel] [PATCH v4 18/21] target-arm: Move arm_log_exception() into internals.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Rob Herring , Patch Tracking , Michael Matz , Claudio Fontana , Alexander Graf , "qemu-devel@nongnu.org Developers" , Laurent Desnogues , Dirk Mueller , Will Newton , =?ISO-8859-1?Q?Alex_Benn=E9e?= , "kvmarm@lists.cs.columbia.edu" , Christoffer Dall , Richard Henderson On Fri, Mar 7, 2014 at 5:33 AM, Peter Maydell wrote: > Move arm_log_exception() into internals.h so we can use it from > helper-a64.c for the AArch64 exception entry code. > > Signed-off-by: Peter Maydell Reviewed-by: Peter Crosthwaite > --- > target-arm/helper.c | 31 ------------------------------- > target-arm/internals.h | 31 +++++++++++++++++++++++++++++++ > 2 files changed, 31 insertions(+), 31 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 3a976f7..e461914 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -2849,37 +2849,6 @@ static void do_v7m_exception_exit(CPUARMState *env) > pointer. */ > } > > -/* Exception names for debug logging; note that not all of these > - * precisely correspond to architectural exceptions. > - */ > -static const char * const excnames[] = { > - [EXCP_UDEF] = "Undefined Instruction", > - [EXCP_SWI] = "SVC", > - [EXCP_PREFETCH_ABORT] = "Prefetch Abort", > - [EXCP_DATA_ABORT] = "Data Abort", > - [EXCP_IRQ] = "IRQ", > - [EXCP_FIQ] = "FIQ", > - [EXCP_BKPT] = "Breakpoint", > - [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit", > - [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage", > - [EXCP_STREX] = "QEMU intercept of STREX", > -}; > - > -static inline void arm_log_exception(int idx) > -{ > - if (qemu_loglevel_mask(CPU_LOG_INT)) { > - const char *exc = NULL; > - > - if (idx >= 0 && idx < ARRAY_SIZE(excnames)) { > - exc = excnames[idx]; > - } > - if (!exc) { > - exc = "unknown"; > - } > - qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc); > - } > -} > - > void arm_v7m_cpu_do_interrupt(CPUState *cs) > { > ARMCPU *cpu = ARM_CPU(cs); > diff --git a/target-arm/internals.h b/target-arm/internals.h > index 97a76c2..e15136b 100644 > --- a/target-arm/internals.h > +++ b/target-arm/internals.h > @@ -39,6 +39,37 @@ static inline bool excp_is_internal(int excp) > || excp == EXCP_STREX; > } > > +/* Exception names for debug logging; note that not all of these > + * precisely correspond to architectural exceptions. > + */ > +static const char * const excnames[] = { > + [EXCP_UDEF] = "Undefined Instruction", > + [EXCP_SWI] = "SVC", > + [EXCP_PREFETCH_ABORT] = "Prefetch Abort", > + [EXCP_DATA_ABORT] = "Data Abort", > + [EXCP_IRQ] = "IRQ", > + [EXCP_FIQ] = "FIQ", > + [EXCP_BKPT] = "Breakpoint", > + [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit", > + [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage", > + [EXCP_STREX] = "QEMU intercept of STREX", > +}; > + > +static inline void arm_log_exception(int idx) > +{ > + if (qemu_loglevel_mask(CPU_LOG_INT)) { > + const char *exc = NULL; > + > + if (idx >= 0 && idx < ARRAY_SIZE(excnames)) { > + exc = excnames[idx]; > + } > + if (!exc) { > + exc = "unknown"; > + } > + qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc); > + } > +} > + > /* Scale factor for generic timers, ie number of ns per tick. > * This gives a 62.5MHz timer. > */ > -- > 1.9.0 > >