From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CD53C7618B for ; Wed, 24 Jul 2019 08:58:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 41B3F217D9 for ; Wed, 24 Jul 2019 08:58:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gKSuVhkA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726687AbfGXI6S (ORCPT ); Wed, 24 Jul 2019 04:58:18 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:42202 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725999AbfGXI6R (ORCPT ); Wed, 24 Jul 2019 04:58:17 -0400 Received: by mail-wr1-f66.google.com with SMTP id x1so31054883wrr.9 for ; Wed, 24 Jul 2019 01:58:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=+RGbZm1eciu20PQ8K6tF6H+QNRIWNrVYIPAsS3IZOGw=; b=gKSuVhkAPXEHjSfyv7hCFaAwcimAC12QQb//SoVNMVfDYgdlJh0/u6za13CaJi1KNK Yhe88wKGs1Fbw0gsRtEV6VwOjTePgaWP/LBYhE4HSiflOGU6ocw7DnSkFBw1tJ2s0VSx tEydSi1ZE1R1YiURro6utx0GyKHQRRMB0pLSWCLDMj9Qyx6eY+pyAW1J5EfnmGFYg3bF SrnWQ9tzbl4Kj2f79Yhig7nDPqX6Dnvre4xtHcPQyGLjuYeL78NLKifDFMaFaJUSHVOw RK/dqeONWggH88EXgWfSIM15ssSrMYL82V7or3/mdcA2sb8ZPv5NlG+UwtSmYOB0Mxhd bZMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=+RGbZm1eciu20PQ8K6tF6H+QNRIWNrVYIPAsS3IZOGw=; b=IfnI6dnzm5hWJo4RPWYH2F33/mzgISqe23DPkPhiRTvl8lo7uf3pE6Ql9YYyurBSYl kHDKrWBqSO8gmRoEuS/99s8Nf2ogOJOuMfLvpnRdIWxNT8m4mdCbaxSN3l+yFlDb3Hy5 kd8ZG5zq3WBbYd2QYdhp9g/UEwzvv8+/6L6+4Bnbk3OA89/rS/7MF443Qkpif2sCtwX7 obgETlsC4k832RghNfMutLm1naefz+qQvPy7ZBYdlGFDQxVPruhGeAesIuMgNbdCxs9F IOiAGpPYZN02BRw0DjAmRPj+kbgcSpx93PC7GfJ9HU4i8qQYX2bUHL+qe9R3nEZcmNHm 6vOQ== X-Gm-Message-State: APjAAAVbeS1Ae+8gp0f3f3RByQ31I7skOwsK01IIgv9gZhg9Q4FBZY9t LLLgokraXGHFk8O56svZkEjBnI+oPt/k/UK3mUo= X-Google-Smtp-Source: APXvYqyPfV+wRoNminVBPIYU0k3mTByronNa0d5GsaFz0875MLgxFgsfvzSD0QjUkklYPTRcf4r/DD3UHxMnXvpGh2w= X-Received: by 2002:adf:db46:: with SMTP id f6mr35916182wrj.212.1563958695456; Wed, 24 Jul 2019 01:58:15 -0700 (PDT) MIME-Version: 1.0 References: <20190722124833.28757-1-daniel.baluta@nxp.com> <20190722124833.28757-6-daniel.baluta@nxp.com> <1563800148.2311.9.camel@pengutronix.de> In-Reply-To: <1563800148.2311.9.camel@pengutronix.de> From: Daniel Baluta Date: Wed, 24 Jul 2019 11:58:04 +0300 Message-ID: Subject: Re: [alsa-devel] [PATCH 05/10] ASoC: fsl_sai: Add support to enable multiple data lines To: Lucas Stach Cc: Daniel Baluta , Mark Brown , Linux-ALSA , Viorel Suman , Timur Tabi , Xiubo Li , linuxppc-dev@lists.ozlabs.org, "S.j. Wang" , "Angus Ainslie (Purism)" , Takashi Iwai , Nicolin Chen , dl-linux-imx , Pengutronix Kernel Team , Fabio Estevam , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jul 22, 2019 at 3:58 PM Lucas Stach wrote: > > Am Montag, den 22.07.2019, 15:48 +0300 schrieb Daniel Baluta: > > SAI supports up to 8 Rx/Tx data lines which can be enabled > > using TCE/RCE bits of TCR3/RCR3 registers. > > > > Data lines to be enabled are read from DT fsl,dl_mask property. > > By default (if no DT entry is provided) only data line 0 is enabled. > > > > Note: > > We can only enable consecutive data lines starting with data line #0. > > Why is the property a bitmask then? To me this sounds like we want to > have the number of lanes in the DT and convert to the bitmask inside > the driver. Actually my comment might be wrong. I have read the documentation again and it seems that: We can only enable consecutive data lines *ONLY* if combine mode is enabled. Thus, if combine mode is disabled we can independently enable any data line. I will clarify this with IP owner and correct the patch accordingly. > > > > Signed-off-by: Daniel Baluta > > --- > > sound/soc/fsl/fsl_sai.c | 10 +++++++++- > > sound/soc/fsl/fsl_sai.h | 6 ++++-- > > 2 files changed, 13 insertions(+), 3 deletions(-) > > > > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c > > index 768341608695..d0fa02188b7c 100644 > > --- a/sound/soc/fsl/fsl_sai.c > > +++ b/sound/soc/fsl/fsl_sai.c > > @@ -601,7 +601,7 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, > > > > > regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), > > > FSL_SAI_CR3_TRCE_MASK, > > > - FSL_SAI_CR3_TRCE); > > > + FSL_SAI_CR3_TRCE(sai->soc_data->dl_mask[tx]); > > > > > ret = snd_pcm_hw_constraint_list(substream->runtime, 0, > > > SNDRV_PCM_HW_PARAM_RATE, &fsl_sai_rate_constraints); > > @@ -887,6 +887,14 @@ static int fsl_sai_probe(struct platform_device *pdev) > > > } > > > } > > > > > + /* active data lines mask for TX/RX, defaults to 1 (only the first > > > + * data line is enabled > > + */ > > Comment style not in line with Linux coding style. Will fix. Thanks Lucas for review. Should be like this, right? /* * comment */ checkpatch.pl warned me only about the end of the comment :). From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D143C7618B for ; Wed, 24 Jul 2019 09:00:30 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A5E4F217D9 for ; Wed, 24 Jul 2019 09:00:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gKSuVhkA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A5E4F217D9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45tq7H1RspzDqKw for ; Wed, 24 Jul 2019 19:00:27 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2a00:1450:4864:20::441; helo=mail-wr1-x441.google.com; envelope-from=daniel.baluta@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="gKSuVhkA"; dkim-atps=neutral Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45tq4r2XnZzDqD5 for ; Wed, 24 Jul 2019 18:58:19 +1000 (AEST) Received: by mail-wr1-x441.google.com with SMTP id y4so46067696wrm.2 for ; Wed, 24 Jul 2019 01:58:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=+RGbZm1eciu20PQ8K6tF6H+QNRIWNrVYIPAsS3IZOGw=; b=gKSuVhkAPXEHjSfyv7hCFaAwcimAC12QQb//SoVNMVfDYgdlJh0/u6za13CaJi1KNK Yhe88wKGs1Fbw0gsRtEV6VwOjTePgaWP/LBYhE4HSiflOGU6ocw7DnSkFBw1tJ2s0VSx tEydSi1ZE1R1YiURro6utx0GyKHQRRMB0pLSWCLDMj9Qyx6eY+pyAW1J5EfnmGFYg3bF SrnWQ9tzbl4Kj2f79Yhig7nDPqX6Dnvre4xtHcPQyGLjuYeL78NLKifDFMaFaJUSHVOw RK/dqeONWggH88EXgWfSIM15ssSrMYL82V7or3/mdcA2sb8ZPv5NlG+UwtSmYOB0Mxhd bZMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=+RGbZm1eciu20PQ8K6tF6H+QNRIWNrVYIPAsS3IZOGw=; b=A+dbrLU2RS2zETNcJSC979PRAfSANJdzbrPT2tuCjVvm57DBtnqCWe5vmXILGirWoG iIP5nTdekw2Lftv88GjglM5PbYLC0UrqqzO97CDsaLBAU1CN/hFJed+tqaUS/bIIH+MB V/blzRuQXyhU/kw5EdVaOCJj+qLvybdTsnCyBzD0q2w8Nyz1EiqFf+jFZHsHDtfowhDQ QGs/llMFH+bZTzXEtX6B0Xq3smOfEGe2FtiKMXwVMNNdGvCzpIYIDMauRupphtNM/43E OoMbB4nGtjBcVcqBpRb33nv9TIG7FDg8tZw87cnHLESKjR50m0gdRVZvd9b21r2qn++6 WEoQ== X-Gm-Message-State: APjAAAWSN7IOpYekrAPZQn+lsczaJ9AFDLHjtrZU7gjpZqYR8LsVfaUe 07y2+dc0Yl5x1RRk7bgJQ+nT/rWWeUJLwvP9xNU= X-Google-Smtp-Source: APXvYqyPfV+wRoNminVBPIYU0k3mTByronNa0d5GsaFz0875MLgxFgsfvzSD0QjUkklYPTRcf4r/DD3UHxMnXvpGh2w= X-Received: by 2002:adf:db46:: with SMTP id f6mr35916182wrj.212.1563958695456; Wed, 24 Jul 2019 01:58:15 -0700 (PDT) MIME-Version: 1.0 References: <20190722124833.28757-1-daniel.baluta@nxp.com> <20190722124833.28757-6-daniel.baluta@nxp.com> <1563800148.2311.9.camel@pengutronix.de> In-Reply-To: <1563800148.2311.9.camel@pengutronix.de> From: Daniel Baluta Date: Wed, 24 Jul 2019 11:58:04 +0300 Message-ID: Subject: Re: [alsa-devel] [PATCH 05/10] ASoC: fsl_sai: Add support to enable multiple data lines To: Lucas Stach Content-Type: text/plain; charset="UTF-8" X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux-ALSA , Fabio Estevam , Pengutronix Kernel Team , Timur Tabi , Xiubo Li , linuxppc-dev@lists.ozlabs.org, "S.j. Wang" , "Angus Ainslie \(Purism\)" , Takashi Iwai , Linux Kernel Mailing List , Nicolin Chen , Mark Brown , dl-linux-imx , Viorel Suman , Daniel Baluta Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Mon, Jul 22, 2019 at 3:58 PM Lucas Stach wrote: > > Am Montag, den 22.07.2019, 15:48 +0300 schrieb Daniel Baluta: > > SAI supports up to 8 Rx/Tx data lines which can be enabled > > using TCE/RCE bits of TCR3/RCR3 registers. > > > > Data lines to be enabled are read from DT fsl,dl_mask property. > > By default (if no DT entry is provided) only data line 0 is enabled. > > > > Note: > > We can only enable consecutive data lines starting with data line #0. > > Why is the property a bitmask then? To me this sounds like we want to > have the number of lanes in the DT and convert to the bitmask inside > the driver. Actually my comment might be wrong. I have read the documentation again and it seems that: We can only enable consecutive data lines *ONLY* if combine mode is enabled. Thus, if combine mode is disabled we can independently enable any data line. I will clarify this with IP owner and correct the patch accordingly. > > > > Signed-off-by: Daniel Baluta > > --- > > sound/soc/fsl/fsl_sai.c | 10 +++++++++- > > sound/soc/fsl/fsl_sai.h | 6 ++++-- > > 2 files changed, 13 insertions(+), 3 deletions(-) > > > > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c > > index 768341608695..d0fa02188b7c 100644 > > --- a/sound/soc/fsl/fsl_sai.c > > +++ b/sound/soc/fsl/fsl_sai.c > > @@ -601,7 +601,7 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, > > > > > regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), > > > FSL_SAI_CR3_TRCE_MASK, > > > - FSL_SAI_CR3_TRCE); > > > + FSL_SAI_CR3_TRCE(sai->soc_data->dl_mask[tx]); > > > > > ret = snd_pcm_hw_constraint_list(substream->runtime, 0, > > > SNDRV_PCM_HW_PARAM_RATE, &fsl_sai_rate_constraints); > > @@ -887,6 +887,14 @@ static int fsl_sai_probe(struct platform_device *pdev) > > > } > > > } > > > > > + /* active data lines mask for TX/RX, defaults to 1 (only the first > > > + * data line is enabled > > + */ > > Comment style not in line with Linux coding style. Will fix. Thanks Lucas for review. Should be like this, right? /* * comment */ checkpatch.pl warned me only about the end of the comment :).