* Re: [PATCHv2] perf/x86/intel/uncore: add support for Haswell ULT IMC uncore
2015-04-20 22:34 [PATCHv2] perf/x86/intel/uncore: add support for Haswell ULT IMC uncore Sonny Rao
@ 2015-04-20 22:35 ` Bjorn Helgaas
2015-04-21 7:29 ` Ingo Molnar
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Bjorn Helgaas @ 2015-04-20 22:35 UTC (permalink / raw)
To: Sonny Rao
Cc: linux-kernel, Stephane Eranian, Peter Zijlstra, Paul Mackerras,
Ingo Molnar, Arnaldo Carvalho de Melo, Thomas Gleixner,
H. Peter Anvin, x86, linux-pci
On Mon, Apr 20, 2015 at 5:34 PM, Sonny Rao <sonnyrao@chromium.org> wrote:
> This uncore is the same as the Haswell desktop part but uses a
> different PCI ID.
>
> Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
You don't need my ack, and I don't know enough to review the perf
stuff anyway, but the way you handled the PCI device ID looks great to
me.
> ---
> arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
> index 3001015..ca75e70 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
> @@ -1,6 +1,9 @@
> /* Nehalem/SandBridge/Haswell uncore support */
> #include "perf_event_intel_uncore.h"
>
> +/* Uncore IMC PCI Id */
> +#define PCI_DEVICE_ID_INTEL_HSW_U_IMC 0x0a04
> +
> /* SNB event control */
> #define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
> #define SNB_UNC_CTL_UMASK_MASK 0x0000ff00
> @@ -472,6 +475,10 @@ static const struct pci_device_id hsw_uncore_pci_ids[] = {
> PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_IMC),
> .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
> },
> + { /* IMC */
> + PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_U_IMC),
> + .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
> + },
> { /* end: all zeroes */ },
> };
>
> @@ -502,6 +509,7 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = {
> IMC_DEV(IVB_IMC, &ivb_uncore_pci_driver), /* 3rd Gen Core processor */
> IMC_DEV(IVB_E3_IMC, &ivb_uncore_pci_driver), /* Xeon E3-1200 v2/3rd Gen Core processor */
> IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */
> + IMC_DEV(HSW_U_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core ULT Mobile Processor */
> { /* end marker */ }
> };
>
> --
> 2.1.2
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCHv2] perf/x86/intel/uncore: add support for Haswell ULT IMC uncore
2015-04-20 22:34 [PATCHv2] perf/x86/intel/uncore: add support for Haswell ULT IMC uncore Sonny Rao
2015-04-20 22:35 ` Bjorn Helgaas
@ 2015-04-21 7:29 ` Ingo Molnar
2015-04-21 7:33 ` [tip:x86/urgent] perf/x86/intel/uncore: Add support for Intel Haswell ULT (lower power Mobile Processor) IMC uncore PMUs tip-bot for Sonny Rao
2015-04-22 14:10 ` [tip:perf/urgent] " tip-bot for Sonny Rao
3 siblings, 0 replies; 5+ messages in thread
From: Ingo Molnar @ 2015-04-21 7:29 UTC (permalink / raw)
To: Sonny Rao
Cc: linux-kernel, Stephane Eranian, Peter Zijlstra, Paul Mackerras,
Ingo Molnar, Arnaldo Carvalho de Melo, Thomas Gleixner,
H. Peter Anvin, x86, Bjorn Helgaas, linux-pci
* Sonny Rao <sonnyrao@chromium.org> wrote:
> This uncore is the same as the Haswell desktop part but uses a
> different PCI ID.
>
> Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
> ---
> arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
> index 3001015..ca75e70 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
> @@ -1,6 +1,9 @@
> /* Nehalem/SandBridge/Haswell uncore support */
> #include "perf_event_intel_uncore.h"
>
> +/* Uncore IMC PCI Id */
> +#define PCI_DEVICE_ID_INTEL_HSW_U_IMC 0x0a04
> +
> /* SNB event control */
> #define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
> #define SNB_UNC_CTL_UMASK_MASK 0x0000ff00
> @@ -472,6 +475,10 @@ static const struct pci_device_id hsw_uncore_pci_ids[] = {
> PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_IMC),
> .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
> },
> + { /* IMC */
> + PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_U_IMC),
> + .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
> + },
> { /* end: all zeroes */ },
> };
>
> @@ -502,6 +509,7 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = {
> IMC_DEV(IVB_IMC, &ivb_uncore_pci_driver), /* 3rd Gen Core processor */
> IMC_DEV(IVB_E3_IMC, &ivb_uncore_pci_driver), /* Xeon E3-1200 v2/3rd Gen Core processor */
> IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */
> + IMC_DEV(HSW_U_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core ULT Mobile Processor */
> { /* end marker */ }
> };
So now it becomes rather inconsistent:
- PCI_DEVICE_ID_INTEL_HSW_IMC is defined in include/linux/pci_ids.h
- PCI_DEVICE_ID_INTEL_HSW_U_IMC is defined in arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
Could you please also send a patch on top of this one that moves the
other, related PCI IDs as well?
Thanks,
Ingo
^ permalink raw reply [flat|nested] 5+ messages in thread* [tip:x86/urgent] perf/x86/intel/uncore: Add support for Intel Haswell ULT (lower power Mobile Processor) IMC uncore PMUs
2015-04-20 22:34 [PATCHv2] perf/x86/intel/uncore: add support for Haswell ULT IMC uncore Sonny Rao
2015-04-20 22:35 ` Bjorn Helgaas
2015-04-21 7:29 ` Ingo Molnar
@ 2015-04-21 7:33 ` tip-bot for Sonny Rao
2015-04-22 14:10 ` [tip:perf/urgent] " tip-bot for Sonny Rao
3 siblings, 0 replies; 5+ messages in thread
From: tip-bot for Sonny Rao @ 2015-04-21 7:33 UTC (permalink / raw)
To: linux-tip-commits
Cc: a.p.zijlstra, linux-kernel, bhelgaas, eranian, paulus, sonnyrao,
mingo, tglx, acme, hpa
Commit-ID: 5324e72e00012126101aee6f3e62977055a3b5ee
Gitweb: http://git.kernel.org/tip/5324e72e00012126101aee6f3e62977055a3b5ee
Author: Sonny Rao <sonnyrao@chromium.org>
AuthorDate: Mon, 20 Apr 2015 15:34:07 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 21 Apr 2015 09:31:17 +0200
perf/x86/intel/uncore: Add support for Intel Haswell ULT (lower power Mobile Processor) IMC uncore PMUs
This uncore is the same as the Haswell desktop part but uses a
different PCI ID.
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/1429569247-16697-1-git-send-email-sonnyrao@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
index 3001015..ca75e70 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
@@ -1,6 +1,9 @@
/* Nehalem/SandBridge/Haswell uncore support */
#include "perf_event_intel_uncore.h"
+/* Uncore IMC PCI Id */
+#define PCI_DEVICE_ID_INTEL_HSW_U_IMC 0x0a04
+
/* SNB event control */
#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
#define SNB_UNC_CTL_UMASK_MASK 0x0000ff00
@@ -472,6 +475,10 @@ static const struct pci_device_id hsw_uncore_pci_ids[] = {
PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_IMC),
.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
},
+ { /* IMC */
+ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_U_IMC),
+ .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
+ },
{ /* end: all zeroes */ },
};
@@ -502,6 +509,7 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = {
IMC_DEV(IVB_IMC, &ivb_uncore_pci_driver), /* 3rd Gen Core processor */
IMC_DEV(IVB_E3_IMC, &ivb_uncore_pci_driver), /* Xeon E3-1200 v2/3rd Gen Core processor */
IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */
+ IMC_DEV(HSW_U_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core ULT Mobile Processor */
{ /* end marker */ }
};
^ permalink raw reply related [flat|nested] 5+ messages in thread* [tip:perf/urgent] perf/x86/intel/uncore: Add support for Intel Haswell ULT (lower power Mobile Processor) IMC uncore PMUs
2015-04-20 22:34 [PATCHv2] perf/x86/intel/uncore: add support for Haswell ULT IMC uncore Sonny Rao
` (2 preceding siblings ...)
2015-04-21 7:33 ` [tip:x86/urgent] perf/x86/intel/uncore: Add support for Intel Haswell ULT (lower power Mobile Processor) IMC uncore PMUs tip-bot for Sonny Rao
@ 2015-04-22 14:10 ` tip-bot for Sonny Rao
3 siblings, 0 replies; 5+ messages in thread
From: tip-bot for Sonny Rao @ 2015-04-22 14:10 UTC (permalink / raw)
To: linux-tip-commits
Cc: acme, mingo, eranian, tglx, hpa, sonnyrao, linux-kernel, paulus,
a.p.zijlstra, bhelgaas
Commit-ID: 80bcffb376a6890dd7452b12c1ba032f8f24fef6
Gitweb: http://git.kernel.org/tip/80bcffb376a6890dd7452b12c1ba032f8f24fef6
Author: Sonny Rao <sonnyrao@chromium.org>
AuthorDate: Mon, 20 Apr 2015 15:34:07 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 22 Apr 2015 08:27:43 +0200
perf/x86/intel/uncore: Add support for Intel Haswell ULT (lower power Mobile Processor) IMC uncore PMUs
This uncore is the same as the Haswell desktop part but uses a
different PCI ID.
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/1429569247-16697-1-git-send-email-sonnyrao@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
index 3001015..ca75e70 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c
@@ -1,6 +1,9 @@
/* Nehalem/SandBridge/Haswell uncore support */
#include "perf_event_intel_uncore.h"
+/* Uncore IMC PCI Id */
+#define PCI_DEVICE_ID_INTEL_HSW_U_IMC 0x0a04
+
/* SNB event control */
#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
#define SNB_UNC_CTL_UMASK_MASK 0x0000ff00
@@ -472,6 +475,10 @@ static const struct pci_device_id hsw_uncore_pci_ids[] = {
PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_IMC),
.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
},
+ { /* IMC */
+ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_U_IMC),
+ .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
+ },
{ /* end: all zeroes */ },
};
@@ -502,6 +509,7 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = {
IMC_DEV(IVB_IMC, &ivb_uncore_pci_driver), /* 3rd Gen Core processor */
IMC_DEV(IVB_E3_IMC, &ivb_uncore_pci_driver), /* Xeon E3-1200 v2/3rd Gen Core processor */
IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */
+ IMC_DEV(HSW_U_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core ULT Mobile Processor */
{ /* end marker */ }
};
^ permalink raw reply related [flat|nested] 5+ messages in thread