From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tamas Lengyel Subject: Re: [PATCH v2 1/2] x86/mem_event: Deliver gla fault EPT violation information Date: Thu, 7 Aug 2014 23:53:31 +0200 Message-ID: References: <1407440824-3281-1-git-send-email-tamas.lengyel@zentific.com> <53E3F215.7050205@oracle.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2587676845716211050==" Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XFVct-0001bK-5V for xen-devel@lists.xenproject.org; Thu, 07 Aug 2014 21:53:35 +0000 Received: by mail-qg0-f45.google.com with SMTP id f51so5187794qge.32 for ; Thu, 07 Aug 2014 14:53:31 -0700 (PDT) In-Reply-To: <53E3F215.7050205@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Boris Ostrovsky Cc: kevin.tian@intel.com, Ian Campbell , Stefano Stabellini , Jun Nakajima , eddie.dong@intel.com, Ian Jackson , Aravind.Gopalakrishnan@amd.com, suravee.suthikulpanit@amd.com, "xen-devel@lists.xenproject.org" List-Id: xen-devel@lists.xenproject.org --===============2587676845716211050== Content-Type: multipart/alternative; boundary=001a11336d5c9fba160500111ed5 --001a11336d5c9fba160500111ed5 Content-Type: text/plain; charset=ISO-8859-1 On Thu, Aug 7, 2014 at 11:39 PM, Boris Ostrovsky wrote: > On 08/07/2014 03:47 PM, Tamas K Lengyel wrote: > >> On Intel EPT the exit qualification generated by a violation also >> includes a bit (EPT_GLA_FAULT) which describes the following information: >> Set if the access causing the EPT violation is to a guest-physical >> address that is the translation of a linear address. Clear if the access >> causing the EPT violation is to a paging-structure entry as part of a page >> walk or the update of an accessed or dirty bit. >> >> For more information see Table 27-7 in the Intel SDM. >> >> This patch extends the mem_event system to deliver this extra >> information, which could be useful for determining the cause of a violation. >> >> v2: Split gla_fault into fault_in_gpt and fault_gla to be more compatible >> with the AMD implementation. >> >> Signed-off-by: Tamas K Lengyel >> --- >> xen/arch/x86/hvm/hvm.c | 8 ++++++-- >> xen/arch/x86/hvm/svm/svm.c | 2 +- >> xen/arch/x86/hvm/vmx/vmx.c | 23 ++++++++++++++++++++++- >> xen/arch/x86/mm/p2m.c | 5 ++++- >> xen/include/asm-x86/hvm/hvm.h | 5 ++++- >> xen/include/asm-x86/p2m.h | 3 ++- >> xen/include/public/mem_event.h | 4 +++- >> 7 files changed, 42 insertions(+), 8 deletions(-) >> >> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c >> index e834406..d7b5e2b 100644 >> --- a/xen/arch/x86/hvm/hvm.c >> +++ b/xen/arch/x86/hvm/hvm.c >> @@ -2725,6 +2725,8 @@ void hvm_inject_page_fault(int errcode, unsigned >> long cr2) >> int hvm_hap_nested_page_fault(paddr_t gpa, >> bool_t gla_valid, >> unsigned long gla, >> + bool_t fault_in_gpt, >> + bool_t fault_gla, >> bool_t access_r, >> bool_t access_w, >> bool_t access_x) >> @@ -2832,8 +2834,10 @@ int hvm_hap_nested_page_fault(paddr_t gpa, >> if ( violation ) >> { >> - if ( p2m_mem_access_check(gpa, gla_valid, gla, access_r, >> - access_w, access_x, &req_ptr) ) >> + if ( p2m_mem_access_check(gpa, gla_valid, gla, >> + fault_in_gpt, fault_gla, >> + access_r, access_w, access_x, >> + &req_ptr) ) >> { >> fall_through = 1; >> } else { >> diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c >> index 76616ac..9e35e7a 100644 >> --- a/xen/arch/x86/hvm/svm/svm.c >> +++ b/xen/arch/x86/hvm/svm/svm.c >> @@ -1403,7 +1403,7 @@ static void svm_do_nested_pgfault(struct vcpu *v, >> p2m_access_t p2ma; >> struct p2m_domain *p2m = NULL; >> - ret = hvm_hap_nested_page_fault(gpa, 0, ~0ul, >> + ret = hvm_hap_nested_page_fault(gpa, 0, ~0ul, 0, 0, >> > > > Why not pass the actual bits that the HW provides? > The actual bits could be passed but it makes no difference at this point since the AMD side isn't setup to work with mem_event. When it is integrated, those bits could and should be passed accordingly. Tamas > > -boris > > > > 1, /* All NPFs count as reads */ >> npfec & PFEC_write_access, >> npfec & PFEC_insn_fetch); >> diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c >> index 2caa04a..7ebf289 100644 >> --- a/xen/arch/x86/hvm/vmx/vmx.c >> +++ b/xen/arch/x86/hvm/vmx/vmx.c >> @@ -2353,6 +2353,7 @@ static void ept_handle_violation(unsigned long >> qualification, paddr_t gpa) >> p2m_type_t p2mt; >> int ret; >> struct domain *d = current->domain; >> + bool_t fault_in_gpt, fault_gla; >> if ( tb_init_done ) >> { >> @@ -2371,11 +2372,31 @@ static void ept_handle_violation(unsigned long >> qualification, paddr_t gpa) >> } >> if ( qualification & EPT_GLA_VALID ) >> + { >> __vmread(GUEST_LINEAR_ADDRESS, &gla); >> + >> + if ( qualification & EPT_GLA_FAULT ) >> + { >> + fault_in_gpt = 0; >> + fault_gla = 1; >> + } >> + else >> + { >> + fault_in_gpt = 1; >> + fault_gla = 0; >> + } >> + } >> else >> + { >> gla = ~0ull; >> + fault_in_gpt = 0; >> + fault_gla = 0; >> + } >> ret = hvm_hap_nested_page_fault(gpa, >> - !!(qualification & EPT_GLA_VALID), >> gla, >> + !!(qualification & EPT_GLA_VALID), >> + gla, >> + fault_in_gpt, >> + fault_gla, >> !!(qualification & >> EPT_READ_VIOLATION), >> !!(qualification & >> EPT_WRITE_VIOLATION), >> !!(qualification & >> EPT_EXEC_VIOLATION)); >> diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c >> index bca9f0f..132f0d2 100644 >> --- a/xen/arch/x86/mm/p2m.c >> +++ b/xen/arch/x86/mm/p2m.c >> @@ -1323,7 +1323,8 @@ void p2m_mem_paging_resume(struct domain *d) >> } >> } >> -bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_valid, unsigned >> long gla, >> +bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_valid, unsigned long >> gla, >> + bool_t fault_in_gpt, bool_t fault_gla, >> bool_t access_r, bool_t access_w, bool_t >> access_x, >> mem_event_request_t **req_ptr) >> { >> @@ -1405,6 +1406,8 @@ bool_t p2m_mem_access_check(paddr_t gpa, bool_t >> gla_valid, unsigned long gla, >> req->offset = gpa & ((1 << PAGE_SHIFT) - 1); >> req->gla_valid = gla_valid; >> req->gla = gla; >> + req->fault_in_gpt = fault_in_gpt; >> + req->fault_gla = fault_gla; >> req->access_r = access_r; >> req->access_w = access_w; >> req->access_x = access_x; >> diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm. >> h >> index 0ebd478..de755b6 100644 >> --- a/xen/include/asm-x86/hvm/hvm.h >> +++ b/xen/include/asm-x86/hvm/hvm.h >> @@ -456,7 +456,10 @@ static inline void hvm_invalidate_regs_fields(struct >> cpu_user_regs *regs) >> } >> int hvm_hap_nested_page_fault(paddr_t gpa, >> - bool_t gla_valid, unsigned long gla, >> + bool_t gla_valid, >> + unsigned long gla, >> + bool_t fault_in_gpt, >> + bool_t fault_gla, >> bool_t access_r, >> bool_t access_w, >> bool_t access_x); >> diff --git a/xen/include/asm-x86/p2m.h b/xen/include/asm-x86/p2m.h >> index 0ddbadb..59803c5 100644 >> --- a/xen/include/asm-x86/p2m.h >> +++ b/xen/include/asm-x86/p2m.h >> @@ -597,7 +597,8 @@ void p2m_mem_paging_resume(struct domain *d); >> * been promoted with no underlying vcpu pause. If the req_ptr has been >> populated, >> * then the caller must put the event in the ring (once having released >> get_gfn* >> * locks -- caller must also xfree the request. */ >> -bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_valid, unsigned long >> gla, >> +bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_valid, unsigned long >> gla, >> + bool_t fault_in_gpt, bool_t fault_gla, >> bool_t access_r, bool_t access_w, bool_t >> access_x, >> mem_event_request_t **req_ptr); >> /* Resumes the running of the VCPU, restarting the last instruction */ >> diff --git a/xen/include/public/mem_event.h b/xen/include/public/mem_ >> event.h >> index 3831b41..1ba6863 100644 >> --- a/xen/include/public/mem_event.h >> +++ b/xen/include/public/mem_event.h >> @@ -62,7 +62,9 @@ typedef struct mem_event_st { >> uint16_t access_w:1; >> uint16_t access_x:1; >> uint16_t gla_valid:1; >> - uint16_t available:12; >> + uint16_t fault_in_gpt:1; >> + uint16_t fault_gla:1; >> + uint16_t available:10; >> uint16_t reason; >> } mem_event_request_t, mem_event_response_t; >> > > --001a11336d5c9fba160500111ed5 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable



On Thu, Aug 7, 2014 at 11:39 PM, Boris Ostrovsky = <boris.o= strovsky@oracle.com> wrote:
On 0= 8/07/2014 03:47 PM, Tamas K Lengyel wrote:
On Intel EPT the exit qualification generated by a violation also includes = a bit (EPT_GLA_FAULT) which describes the following information:
Set if the access causing the EPT violation is to a guest-physical address = that is the translation of a linear address. Clear if the access causing th= e EPT violation is to a paging-structure entry as part of a page walk or th= e update of an accessed or dirty bit.

For more information see Table 27-7 in the Intel SDM.

This patch extends the mem_event system to deliver this extra information, = which could be useful for determining the cause of a violation.

v2: Split gla_fault into fault_in_gpt and fault_gla to be more compatible w= ith the AMD implementation.

Signed-off-by: Tamas K Lengyel <tamas.lengyel@zentific.com>
---
=A0 xen/arch/x86/hvm/hvm.c =A0 =A0 =A0 =A0 | =A08 ++++++--
=A0 xen/arch/x86/hvm/svm/svm.c =A0 =A0 | =A02 +-
=A0 xen/arch/x86/hvm/vmx/vmx.c =A0 =A0 | 23 ++++++++++++++++++++++-
=A0 xen/arch/x86/mm/p2m.c =A0 =A0 =A0 =A0 =A0| =A05 ++++-
=A0 xen/include/asm-x86/hvm/hvm.h =A0| =A05 ++++-
=A0 xen/include/asm-x86/p2m.h =A0 =A0 =A0| =A03 ++-
=A0 xen/include/public/mem_event.h | =A04 +++-
=A0 7 files changed, 42 insertions(+), 8 deletions(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index e834406..d7b5e2b 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2725,6 +2725,8 @@ void hvm_inject_page_fault(int errcode, unsigned long= cr2)
=A0 int hvm_hap_nested_page_fault(paddr_t gpa,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t gla_= valid,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 unsigned lo= ng gla,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bool_t fault_i= n_gpt,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bool_t fault_g= la,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t acce= ss_r,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t acce= ss_w,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t acce= ss_x)
@@ -2832,8 +2834,10 @@ int hvm_hap_nested_page_fault(paddr_t gpa, =A0 =A0 =A0 =A0 =A0 =A0 if ( violation )
=A0 =A0 =A0 =A0 =A0 {
- =A0 =A0 =A0 =A0 =A0 =A0if ( p2m_mem_access_check(gpa, gla_valid, gla, acc= ess_r,
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0access_w, access_x, &req_ptr) )
+ =A0 =A0 =A0 =A0 =A0 =A0if ( p2m_mem_access_check(gpa, gla_valid, gla,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0fault_in_gpt, fault_gla,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0access_r, access_w, access_x,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0&req_ptr) )
=A0 =A0 =A0 =A0 =A0 =A0 =A0 {
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 fall_through =3D 1;
=A0 =A0 =A0 =A0 =A0 =A0 =A0 } else {
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 76616ac..9e35e7a 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -1403,7 +1403,7 @@ static void svm_do_nested_pgfault(struct vcpu *v,
=A0 =A0 =A0 p2m_access_t p2ma;
=A0 =A0 =A0 struct p2m_domain *p2m =3D NULL;
=A0 - =A0 =A0ret =3D hvm_hap_nested_page_fault(gpa, 0, ~0ul,
+ =A0 =A0ret =3D hvm_hap_nested_page_fault(gpa, 0, ~0ul, 0, 0,


Why not pass the actual bits that the HW provides?

The actual bi= ts could be passed but it makes no difference at this point since the AMD s= ide isn't setup to work with mem_event. When it is integrated, those bi= ts could and should be passed accordingly.

Tamas

=A0

-boris



=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= 1, /* All NPFs count as reads */
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= npfec & PFEC_write_access,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= npfec & PFEC_insn_fetch);
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 2caa04a..7ebf289 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -2353,6 +2353,7 @@ static void ept_handle_violation(unsigned long qualif= ication, paddr_t gpa)
=A0 =A0 =A0 p2m_type_t p2mt;
=A0 =A0 =A0 int ret;
=A0 =A0 =A0 struct domain *d =3D current->domain;
+ =A0 =A0bool_t fault_in_gpt, fault_gla;
=A0 =A0 =A0 =A0 if ( tb_init_done )
=A0 =A0 =A0 {
@@ -2371,11 +2372,31 @@ static void ept_handle_violation(unsigned long qual= ification, paddr_t gpa)
=A0 =A0 =A0 }
=A0 =A0 =A0 =A0 if ( qualification & EPT_GLA_VALID )
+ =A0 =A0{
=A0 =A0 =A0 =A0 =A0 __vmread(GUEST_LINEAR_ADDRESS, &gla);
+
+ =A0 =A0 =A0 =A0if ( qualification & EPT_GLA_FAULT )
+ =A0 =A0 =A0 =A0{
+ =A0 =A0 =A0 =A0 =A0 =A0fault_in_gpt =3D 0;
+ =A0 =A0 =A0 =A0 =A0 =A0fault_gla =3D 1;
+ =A0 =A0 =A0 =A0}
+ =A0 =A0 =A0 =A0else
+ =A0 =A0 =A0 =A0{
+ =A0 =A0 =A0 =A0 =A0 =A0fault_in_gpt =3D 1;
+ =A0 =A0 =A0 =A0 =A0 =A0fault_gla =3D 0;
+ =A0 =A0 =A0 =A0}
+ =A0 =A0}
=A0 =A0 =A0 else
+ =A0 =A0{
=A0 =A0 =A0 =A0 =A0 gla =3D ~0ull;
+ =A0 =A0 =A0 =A0fault_in_gpt =3D 0;
+ =A0 =A0 =A0 =A0fault_gla =3D 0;
+ =A0 =A0}
=A0 =A0 =A0 ret =3D hvm_hap_nested_page_fault(gpa,
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0!!= (qualification & EPT_GLA_VALID), gla,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0!!= (qualification & EPT_GLA_VALID),
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0gl= a,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0fa= ult_in_gpt,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0fa= ult_gla,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= !!(qualification & EPT_READ_VIOLATION),
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= !!(qualification & EPT_WRITE_VIOLATION),
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= !!(qualification & EPT_EXEC_VIOLATION));
diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c
index bca9f0f..132f0d2 100644
--- a/xen/arch/x86/mm/p2m.c
+++ b/xen/arch/x86/mm/p2m.c
@@ -1323,7 +1323,8 @@ void p2m_mem_paging_resume(struct domain *d)
=A0 =A0 =A0 }
=A0 }
=A0 -bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_valid, unsigned lo= ng gla,
+bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_valid, unsigned long g= la,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bool_t fault_in_gpt, b= ool_t fault_gla,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t access_r, bo= ol_t access_w, bool_t access_x,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 mem_event_request_t= **req_ptr)
=A0 {
@@ -1405,6 +1406,8 @@ bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_v= alid, unsigned long gla,
=A0 =A0 =A0 =A0 =A0 req->offset =3D gpa & ((1 << PAGE_SHIFT) -= 1);
=A0 =A0 =A0 =A0 =A0 req->gla_valid =3D gla_valid;
=A0 =A0 =A0 =A0 =A0 req->gla =3D gla;
+ =A0 =A0 =A0 =A0req->fault_in_gpt =3D fault_in_gpt;
+ =A0 =A0 =A0 =A0req->fault_gla =3D fault_gla;
=A0 =A0 =A0 =A0 =A0 req->access_r =3D access_r;
=A0 =A0 =A0 =A0 =A0 req->access_w =3D access_w;
=A0 =A0 =A0 =A0 =A0 req->access_x =3D access_x;
diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm= /hvm.h
index 0ebd478..de755b6 100644
--- a/xen/include/asm-x86/hvm/hvm.h
+++ b/xen/include/asm-x86/hvm/hvm.h
@@ -456,7 +456,10 @@ static inline void hvm_invalidate_regs_fields(s= truct cpu_user_regs *regs)
=A0 }
=A0 =A0 int hvm_hap_nested_page_fault(paddr_t gpa,
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bool_t gla_val= id, unsigned long gla,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bool_t gla_val= id,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0unsigned long = gla,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bool_t fault_i= n_gpt,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bool_t fault_g= la,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t acce= ss_r,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t acce= ss_w,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t acce= ss_x);
diff --git a/xen/include/asm-x86/p2m.h b/xen/include/asm-x86/p2m.h
index 0ddbadb..59803c5 100644
--- a/xen/include/asm-x86/p2m.h
+++ b/xen/include/asm-x86/p2m.h
@@ -597,7 +597,8 @@ void p2m_mem_paging_resume(struct domain *d);
=A0 =A0* been promoted with no underlying vcpu pause. If the req_ptr has be= en populated,
=A0 =A0* then the caller must put the event in the ring (once having releas= ed get_gfn*
=A0 =A0* locks -- caller must also xfree the request. */
-bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_valid, unsigned long g= la,
+bool_t p2m_mem_access_check(paddr_t gpa, bool_t gla_valid, unsigned long g= la,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bool_t fault_in_gpt, b= ool_t fault_gla,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bool_t access_r, bo= ol_t access_w, bool_t access_x,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 mem_event_request_t= **req_ptr);
=A0 /* Resumes the running of the VCPU, restarting the last instruction */<= br> diff --git a/xen/include/public/mem_event.h b/xen/include/public/mem= _event.h
index 3831b41..1ba6863 100644
--- a/xen/include/public/mem_event.h
+++ b/xen/include/public/mem_event.h
@@ -62,7 +62,9 @@ typedef struct mem_event_st {
=A0 =A0 =A0 uint16_t access_w:1;
=A0 =A0 =A0 uint16_t access_x:1;
=A0 =A0 =A0 uint16_t gla_valid:1;
- =A0 =A0uint16_t available:12;
+ =A0 =A0uint16_t fault_in_gpt:1;
+ =A0 =A0uint16_t fault_gla:1;
+ =A0 =A0uint16_t available:10;
=A0 =A0 =A0 =A0 uint16_t reason;
=A0 } mem_event_request_t, mem_event_response_t;


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