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From: Tamas K Lengyel <tamas.lengyel@zentific.com>
To: Stefano Stabellini <sstabellini@kernel.org>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Julien Grall <julien.grall@arm.com>,
	Ian Jackson <ian.jackson@eu.citrix.com>
Subject: Re: [PATCH v4] xen/arm: flush icache as well when XEN_DOMCTL_cacheflush is issued
Date: Fri, 27 Jan 2017 13:54:23 -0700	[thread overview]
Message-ID: <CAErYnsjX-z+9r=J9QVahN8LhinrMHKvWwWahCg7Ho4HHO4ZuHQ@mail.gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.10.1701271154540.2884@sstabellini-ThinkPad-X260>

On Fri, Jan 27, 2017 at 1:41 PM, Stefano Stabellini
<sstabellini@kernel.org> wrote:
> On Fri, 27 Jan 2017, Tamas K Lengyel wrote:
>> When the toolstack modifies memory of a running ARM VM it may happen
>> that the underlying memory of a current vCPU PC is changed. Without
>> flushing the icache the vCPU may continue executing stale instructions.
>>
>> Also expose the xc_domain_cacheflush through xenctrl.h.
>>
>> Signed-off-by: Tamas K Lengyel <tamas.lengyel@zentific.com>
>> Acked-by: Wei Liu <wei.liu2@citrix.com>
>> ---
>> Cc: Ian Jackson <ian.jackson@eu.citrix.com>
>> Cc: Stefano Stabellini <sstabellini@kernel.org>
>> Cc: Julien Grall <julien.grall@arm.com>
>>
>> Note: patch has been verified to solve stale icache issues on the
>>       HiKey platform.
>
> Sorry to come in the discussion late, but there has been a lot of
> traffic on this in the last two days. The patch is clear and well
> written, thanks for that. However, I am concerned about the performance
> impact of the icache flush.
>
> What stale icache issues is it trying to solve?

The case where it is very easy to trigger a stale icache is during an
SMC trap on multi-core boards (like the HiKey). If the monitor
application removes the SMC from memory in the callback (through
xc_map_foreign_range), the SMC instruction will still happen
repeatedly afterwards until the CPU gives up and fetches the actual
contents of the memory. The same icache issue could get triggered any
time the user is modifying instructions in the memory of an active VM.
But flushing the dcache would also be required any time memory is
modified anywhere, so exposing the libxc function would be necessary
without the icache issue anyway.

Speaking of which, after reading
https://events.linuxfoundation.org/sites/events/files/slides/slides_17.pdf,
shouldn't the cache flush happen both before and after memory is
modified (as shown on slide 33)?

>
> This patch introduces the icache flush in flush_page_to_ram, which is
> called in two instances:
>
> 1) arch_do_domctl(XEN_DOMCTL_cacheflush) -> p2m_cache_flush -> flush_page_to_ram
>
> 2) alloc_xenheap_pages
>
> It looks like we don't need the icache flush in 2). We should probably
> avoid icache flushes for that. Julien, do you agree?
>
> I am also wondering about all the libxc/libxl callers, many of whom
> don't need an icache flush. Ideally we would have an argument in
> XEN_DOMCTL_cacheflush to specify the type of cache flush we need,
> similar to GNTTABOP_cache_flush.
>

I'm OK with that, though that would probably require a bump in
XEN_DOMCTL_INTERFACE_VERSION.

Tamas

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  reply	other threads:[~2017-01-27 20:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-27 18:25 [PATCH v4] xen/arm: flush icache as well when XEN_DOMCTL_cacheflush is issued Tamas K Lengyel
2017-01-27 20:41 ` Stefano Stabellini
2017-01-27 20:54   ` Tamas K Lengyel [this message]
2017-01-27 21:23     ` Julien Grall
2017-01-27 21:01   ` Julien Grall
2017-01-27 23:53     ` Stefano Stabellini
2017-01-28 17:04       ` Andrew Cooper
2017-01-30 16:01       ` Julien Grall
2017-01-30 17:20         ` Tamas K Lengyel
2017-01-30 21:16           ` Stefano Stabellini

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