From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0D1BFC433F5 for ; Fri, 18 Mar 2022 08:05:24 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A6E4F83CFE; Fri, 18 Mar 2022 09:05:21 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="O/BvFDgN"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1C5D983AFD; Fri, 18 Mar 2022 09:05:20 +0100 (CET) Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6C2FB83BC9 for ; Fri, 18 Mar 2022 09:05:16 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=heiko.thiery@gmail.com Received: by mail-wr1-x435.google.com with SMTP id u10so10618178wra.9 for ; Fri, 18 Mar 2022 01:05:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=a1tfpFaGuXVTzxtnnq9OeDsd6ra1XQOQuky+lKiEywA=; b=O/BvFDgN9oxq6XL7PL44NzsfKKc7yI+40LadxLYj8AsdD+nRFUBTCi+4kvvPqU4+zf kHYgGiJdQHFF0BBK2tJ6APnqOQwYe7yMpGQ08ba5vdi7Zt2Fs4eaGCng/KCVN5zOKSgY 5fdolNfukgtnGiiz4ir2SPVwraxZWB9rm2HG2z9DUpKDe1LJyzM8sBmi07P07AsBR9jD kp9VTIniiVkKxMYANlt4GRXxw8ZyBo/JuqTHAjPQjad396iqlAzwh9azIoCHa98U2grS 4rVuj1M2j6C4vZg5Mx6FqtPY4PjVUZqGjR2EXBZpP9rsyEoKXbU38q/JnhOBatzSGezJ m7bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=a1tfpFaGuXVTzxtnnq9OeDsd6ra1XQOQuky+lKiEywA=; b=8PS2T0fTMGWwmJERIV96aH0VaIj+4l4j8bFiPJXjTkaYo9zJznH+/wXHKbOOoUTncd so5VYy+4gD7Uka9n0giv6YYkQCxhz26fC25nVQ3Mg6C7PCTB1H+0cJ9sCdUnrwKJTZ/f vPXxyYCunoK902cQMnquQLqI8kUgk+6xp/hGDfthjrlrVpawvWinPO63PzMmuShMPCCJ pcDW8B5xvzfLcFMKr/AOYdQsVHn7qCJ3Mgw+ozowR0hvfeIlxxhseWmbUJNDxiOeM6Yo /a0Whqc49C9U0wIov6AHyEBjGOq/zkszFoTiKDehNUL/PH3vAo/ohcp1K0gMONodiC5N WiLA== X-Gm-Message-State: AOAM531yeODR0qgnRLGtY0eYzDvFAcZkULAeqwDSLIA2C056l9DKozjf UkI9pR1CsVizI0Kwea3o9bx/0MsqPTWRR/A2kEw= X-Google-Smtp-Source: ABdhPJwAp/0o7vUOOzRNOBp+ZVp3no7ks6TcZ43DEgmc4ujLDeQdD7GySQ1qItyFNeYIPD+bG7qx6G2XADAr8Y7CGjs= X-Received: by 2002:a5d:66c4:0:b0:203:f597:d5ed with SMTP id k4-20020a5d66c4000000b00203f597d5edmr1813435wrw.470.1647590715680; Fri, 18 Mar 2022 01:05:15 -0700 (PDT) MIME-Version: 1.0 References: <20220317124127.1783768-1-heiko.thiery@gmail.com> <99e5643a-ade5-655d-937f-ee6ce711a99d@gmail.com> <513bb930-59b5-d42d-70dc-f3e0d57801d8@gmail.com> In-Reply-To: <513bb930-59b5-d42d-70dc-f3e0d57801d8@gmail.com> From: Heiko Thiery Date: Fri, 18 Mar 2022 09:05:04 +0100 Message-ID: Subject: Re: [RFC] serial: mxc: get the clock frequency from the used clock for the device To: Sean Anderson Cc: u-boot@lists.denx.de, Marek Vasut , Michale Walle , Angus Ainslie , Angus Ainslie , lukma@denx.de, sbabic@denx.de, festevam@gmail.com, uboot-imx@nxp.com, peng.fan@nxp.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Hi Sean, Am Fr., 18. M=C3=A4rz 2022 um 03:19 Uhr schrieb Sean Anderson : > > On 3/17/22 3:14 PM, Heiko Thiery wrote: > > Hi Sean, > > > > Am Do., 17. M=C3=A4rz 2022 um 15:38 Uhr schrieb Sean Anderson : > >> > >> Hi Heiko, > >> > >> On 3/17/22 8:41 AM, Heiko Thiery wrote: > >>> With the clock driver enabled for the imx8mq, it was noticed that the > >>> frequency used to calculate the baud rate is always taken from the ro= ot > >>> clock of UART1. This can cause problems if UART1 is not used as conso= le > >>> and the settings are different from UART1. The result is that the con= sole > >>> output is garbage. To do this correctly the UART frequency is taken f= rom > >>> the used device. For the implementations that don't have the igp cloc= k > >>> frequency written or can't return it the old way is tried. > >>> > >>> Signed-off-by: Heiko Thiery > >>> --- > >>> drivers/serial/serial_mxc.c | 15 +++++++++++++-- > >>> 1 file changed, 13 insertions(+), 2 deletions(-) > >>> > >>> diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.= c > >>> index e4970a169b..6fdb2b2397 100644 > >>> --- a/drivers/serial/serial_mxc.c > >>> +++ b/drivers/serial/serial_mxc.c > >>> @@ -3,6 +3,7 @@ > >>> * (c) 2007 Sascha Hauer > >>> */ > >>> > >>> +#include > >>> #include > >>> #include > >>> #include > >>> @@ -266,9 +267,19 @@ __weak struct serial_device *default_serial_cons= ole(void) > >>> int mxc_serial_setbrg(struct udevice *dev, int baudrate) > >>> { > >>> struct mxc_serial_plat *plat =3D dev_get_plat(dev); > >>> - u32 clk =3D imx_get_uartclk(); > >>> + u32 rate =3D 0; > >>> + > >>> + if (IS_ENABLED(CONFIG_CLK)) { > >> > >> CONFIG_IS_ENABLED? > > > > This should be correct. The CONFIG_IS_ENABLED is a preprocessor macro > > and the IS_ENABLED can be used in c code. Or do you mean something > > else? > > I mean you should be using CONFIG_IS_ENABLED(CLK) so that this code is > correct for both SPL and U-Boot proper. But it is also fine to "try and > fail" (making this check unnecessary). > > >> > >> mx6ull at least does not have CONFIG_SPL_CLK enabled. > > > > I expect that in that case it will fallback to the old behavior ... not= ? > > Yes, if you handle -ENOSYS correctly. > > >> > >>> + struct clk clk; > >>> + if(!clk_get_by_name(dev, "ipg", &clk)) > >>> + rate =3D clk_get_rate(&clk); > > You may also need to enable this clock. What would be the right place to enable the clock? in mxc_serial_probe()? > > >>> + } > >>> + > >>> + /* as fallback we try to get the clk rate that way */ > >>> + if (rate =3D=3D 0) > >> > >> !rate || IS_ERR_VALUE(rate) > >> > >>> + rate =3D imx_get_uartclk(); > >>> > >>> - _mxc_serial_setbrg(plat->reg, clk, baudrate, plat->use_dte); > >>> + _mxc_serial_setbrg(plat->reg, rate, baudrate, plat->use_dte); > >>> > >>> return 0; > >>> } > >>> > >> --Sean > > > >