From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A642C43334 for ; Sun, 19 Jun 2022 14:54:19 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9061A84307; Sun, 19 Jun 2022 16:54:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Ja7564MP"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A3E5C84307; Sun, 19 Jun 2022 16:54:15 +0200 (CEST) Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A45EF83F6B for ; Sun, 19 Jun 2022 16:54:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=heiko.thiery@gmail.com Received: by mail-wm1-x333.google.com with SMTP id m39-20020a05600c3b2700b0039c511ebbacso6586189wms.3 for ; Sun, 19 Jun 2022 07:54:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=PJXzrkDKe/QzRG0bLLYvZNbiq2vnH6pOKqrpC2xiD0g=; b=Ja7564MPsborpwf8H+ipqW+Sz9aTGJ4MIN1VH27Ha7eNDH7N68PBTeCueQ+QLTv/vj unSvSu/JXLB5vtkQd6XskuiOXkGKuep4GsEjl24LfiDUAjBsQwzib/QlCT4JpVDQpfzU o4xEURzwDt7zsZS1OfRXQA56YeQwi7EgbAwpJLsrRCgmC1sWdZgdp+JRhIwj377bMlZs N1glTh8ko011Np9xovnIYpKdCZkWrMYX5JDnavB9cZ5ygZh1t9EVFwRGgZuMD6svlVft uvbH8EQp9RSglHQfzpWFltabcl5hZLtAbr8O0DbckkR3BYJnnv/TwzmcEMDkmy8jTI6g kKLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=PJXzrkDKe/QzRG0bLLYvZNbiq2vnH6pOKqrpC2xiD0g=; b=2do01pLN0JAdb/fjCiFjUTxKoc/vzkJXkZM6rgDzS7uPmqxaN2FZKFZwU1qXams2v0 qWCGGKty14xLbUKnO7LwXEMG029mI8s77RfznyTjTI1IDTgWmS9t27N98WYQDbCkPgN2 GZ4d8MdWoWWJW69bfCJt9wXZa1pXnb5TLf2MwmWxBRdpaSeTEEkZPIVkVnOhLu+m7VRm tWrHnFweyug8784oIB9t256dTrpBGXCLzrlzmpC/l/lWbwMtl69tfHrLO+knbVukq3rb ZSzD2AGt+TP3K/uAuDt1rU3eMwFFqjNL7pa/d+y5nXQfqlzir196ZI7Jjae+hpbjPwVg 1Pzw== X-Gm-Message-State: AOAM530gkuSljDJSdqoHvoibYSaFWT6N3/exm6AP+Hs4SXY9oLPsM0xx HO4BYmwFN17YbqVhFuL7t257/VdVb6bFJxjSxL8= X-Google-Smtp-Source: ABdhPJzn4V7MckK+1cpSsObYny/ellyiF3c9DyPAdgxljaMkPXCR1bIWmj8N0HIatsEq4kFAmqcQLonA82rFVUIzpmU= X-Received: by 2002:a05:600c:19d4:b0:39c:7ec6:c7cc with SMTP id u20-20020a05600c19d400b0039c7ec6c7ccmr30608819wmq.141.1655650451196; Sun, 19 Jun 2022 07:54:11 -0700 (PDT) MIME-Version: 1.0 References: <20220613211005.30871-1-heiko.thiery@gmail.com> In-Reply-To: From: Heiko Thiery Date: Sun, 19 Jun 2022 16:53:59 +0200 Message-ID: Subject: Re: [PATCH v4] imx: add i.MX8MN DDR3L evk board support To: Michael Nazzareno Trimarchi Cc: Marek Vasut , U-Boot-Denx , Ying-Chun Liu , Peng Fan , Fabio Estevam , Marcel Ziswiler , Tim Harvey , Sean Anderson , =?UTF-8?Q?Thomas_Sch=C3=A4fer?= , Stefano Babic , Fabio Estevam Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Hi, Am So., 19. Juni 2022 um 16:51 Uhr schrieb Michael Nazzareno Trimarchi : > > Hi > > Il dom 19 giu 2022, 16:47 Heiko Thiery ha scritt= o: >> >> Hi, >> >> Am So., 19. Juni 2022 um 16:40 Uhr schrieb Michael Nazzareno Trimarchi >> : >> > >> > Hi Heiko >> > >> > On Sun, Jun 19, 2022 at 8:12 AM Heiko Thiery = wrote: >> > > >> > > Hi, >> > > >> > > Am So., 19. Juni 2022 um 07:59 Uhr schrieb Michael Nazzareno Trimarc= hi >> > > : >> > > > >> > > > Hi >> > > > >> > > > Il sab 18 giu 2022, 23:56 Heiko Thiery ha= scritto: >> > > >> >> > > >> Hi Michael, Hi Marek, >> > > >> >> > > >> Am Mi., 15. Juni 2022 um 08:43 Uhr schrieb Michael Nazzareno Trim= archi >> > > >> : >> > > >> > >> > > >> > Hi Heiko >> > > >> > >> > > >> > On Wed, Jun 15, 2022 at 8:23 AM Heiko Thiery wrote: >> > > >> > > >> > > >> > > Hi Marek, >> > > >> > > >> > > >> > > [SNIP] >> > > >> > > >> > > >> > > > > diff --git a/board/freescale/imx8mn_evk/spl.c b/board/fre= escale/imx8mn_evk/spl.c >> > > >> > > > > index 14cb51368f..0d9909a662 100644 >> > > >> > > > > --- a/board/freescale/imx8mn_evk/spl.c >> > > >> > > > > +++ b/board/freescale/imx8mn_evk/spl.c >> > > >> > > > > @@ -83,6 +83,15 @@ int power_init_board(void) >> > > >> > > > > #ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE >> > > >> > > > > /* Set VDD_SOC/VDD_DRAM to 0.8v for low drive mod= e */ >> > > >> > > > > pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10); >> > > >> > > > > +#elif defined(CONFIG_TARGET_IMX8MN_DDR3L_EVK) >> > > >> > > > > + /* Set VDD_SOC to 0.85v for DDR3L at 1600MTS */ >> > > >> > > > > + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14); >> > > >> > > > > + >> > > >> > > > > + /* Disable the BUCK2 */ >> > > >> > > > > + pmic_reg_write(dev, PCA9450_BUCK2CTRL, 0x48); >> > > >> > > > > + >> > > >> > > > > + /* Set NVCC_DRAM to 1.35v */ >> > > >> > > > > + pmic_reg_write(dev, PCA9450_BUCK6OUT, 0x1E); >> > > >> > > > > #else >> > > >> > > > >> > > >> > > > All this part is not done by the spl pmic driver? >> > > >> > > >> > > >> > > I saw that you added the PCA9450 driver. Do you know if this >> > > >> > > initialization can be done by the driver when CONFIG_SPL_DM_R= EGULATOR >> > > >> > > is enabled? If I see this correctly, it can't be done. Is tha= t >> > > >> > > correct? >> > > >> > >> > > >> > +&i2c1 { >> > > >> > + u-boot,dm-spl; >> > > >> > +}; >> > > >> > + >> > > >> > +&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { >> > > >> > + u-boot,dm-spl; >> > > >> > +}; >> > > >> > + >> > > >> > +&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { >> > > >> > + u-boot,dm-spl; >> > > >> > +}; >> > > >> > + >> > > >> > +&pinctrl_i2c1 { >> > > >> > + u-boot,dm-spl; >> > > >> > +}; >> > > >> > + >> > > >> > +&pinctrl_pmic { >> > > >> > + u-boot,dm-spl; >> > > >> > +}; >> > > >> > + >> > > >> > >> > > >> > Maybe something like this should work. Now question is about sh= ould be >> > > >> > done in pre-reloc or not >> > > >> >> > > >> It took me a little while to understand what was meant by this. I= n the >> > > >> meantime I could >> > > >> change the PMIC/Regulator initialization to DT/DM and can make th= e setting so. >> > > >> What is not clear to me yet is at which point this should be done >> > > >> (regulators_enable_boot_on()). Currently I do it in the board/spl >> > > >> specific board_init_f(). >> > > >> >> > > >> Do any of you have any advice here? >> > > > >> > > > >> > > > After having a discussion with you, i found that maybe i have some= problem and some of the setting should be done before ddr inizialization. = I will take a look on it on afternoon. I know marek was working on some way= to probe driver during binding and we need even to be sure that this can h= appen before memory training. >> > > > >> > > >> > > Currently I added it in board_init_f() right before spl_dram_init() >> > > [1] and it works. I also tried to put it in power_init_board() [2] b= ut >> > > this does not work. >> > > >> > > [1] https://elixir.bootlin.com/u-boot/v2022.04/source/board/freescal= e/imx8mn_evk/spl.c#L162 >> > > [2] https://elixir.bootlin.com/u-boot/v2022.04/source/board/freescal= e/imx8mn_evk/spl.c#L62 >> > >> > Does it work if you mark pre-reoloc, pmic, i2c, and pinctrl? >> >> I added on all nodes the u-boot,dm-pre-reloc but this does not help >> when trying to do the init in power_init_board(). > > > From code I navigate spl_early_init should bind the driver in pre-reloc What function should be called to probe the driver? Currently I use regulators_enable_boot_on(). > Michael >> >> >> > >> > Michael >> > >> > > >> > > -- >> > > Heiko >> > > >> > > > Michael >> > > >> >> > > >> >> > > >> Thanks >> > > >> -- >> > > >> Heiko >> > > >> >> > > >> > Michael >> > > >> > > >> > > >> > > -- >> > > >> > > Heiko >> > > >> > >> > > >> > >> > > >> > >> > > >> > -- >> > > >> > Michael Nazzareno Trimarchi >> > > >> > Co-Founder & Chief Executive Officer >> > > >> > M. +39 347 913 2170 >> > > >> > michael@amarulasolutions.com >> > > >> > __________________________________ >> > > >> > >> > > >> > Amarula Solutions BV >> > > >> > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL >> > > >> > T. +31 (0)85 111 9172 >> > > >> > info@amarulasolutions.com >> > > >> > www.amarulasolutions.com >> > >> > >> > >> > -- >> > Michael Nazzareno Trimarchi >> > Co-Founder & Chief Executive Officer >> > M. +39 347 913 2170 >> > michael@amarulasolutions.com >> > __________________________________ >> > >> > Amarula Solutions BV >> > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL >> > T. +31 (0)85 111 9172 >> > info@amarulasolutions.com >> > www.amarulasolutions.com