From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751299AbdAPK0p (ORCPT ); Mon, 16 Jan 2017 05:26:45 -0500 Received: from mail-io0-f196.google.com ([209.85.223.196]:33572 "EHLO mail-io0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750880AbdAPK0n (ORCPT ); Mon, 16 Jan 2017 05:26:43 -0500 MIME-Version: 1.0 In-Reply-To: References: <20170116020958.62767-1-bruherrera@gmail.com> <20170116020958.62767-2-bruherrera@gmail.com> From: Bruno Herrera Date: Mon, 16 Jan 2017 08:26:21 -0200 Message-ID: Subject: Re: [v2 2/3] ARM: dts: STM32 Add USB FS host mode support To: Alexandre Torgue Cc: Rob Herring , Mark Rutland , Maxime Coquelin , Russell King , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Alex, On Mon, Jan 16, 2017 at 6:57 AM, Alexandre Torgue wrote: > Hi Bruno, > > On 01/16/2017 03:09 AM, Bruno Herrera wrote: >> >> This patch adds the USB pins and nodes for USB HS/FS cores working at FS >> speed, >> using embedded PHY. >> >> Signed-off-by: Bruno Herrera > > > Sorry, but what is patch 1 & pacth 3 status ? My bad, I'll add the status of the patch series version 3. > > For this one, can split it in 3 patches (one patch for SOC and one for each > board) please. > No problem. > > >> --- >> arch/arm/boot/dts/stm32f429-disco.dts | 30 ++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/stm32f429.dtsi | 35 >> ++++++++++++++++++++++++++++++++++- >> arch/arm/boot/dts/stm32f469-disco.dts | 30 ++++++++++++++++++++++++++++++ >> 3 files changed, 94 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/stm32f429-disco.dts >> b/arch/arm/boot/dts/stm32f429-disco.dts >> index 7d0415e..374c5ed 100644 >> --- a/arch/arm/boot/dts/stm32f429-disco.dts >> +++ b/arch/arm/boot/dts/stm32f429-disco.dts >> @@ -88,6 +88,16 @@ >> gpios = <&gpioa 0 0>; >> }; >> }; >> + >> + /* This turns on vbus for otg for host mode (dwc2) */ >> + vcc5v_otg: vcc5v-otg-regulator { >> + compatible = "regulator-fixed"; >> + gpio = <&gpioc 4 0>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&usbotg_pwren_h>; >> + regulator-name = "vcc5_host1"; >> + regulator-always-on; >> + }; >> }; >> >> &clk_hse { >> @@ -99,3 +109,23 @@ >> pinctrl-names = "default"; >> status = "okay"; >> }; >> + >> +&usbotg_hs { >> + compatible = "st,stm32-fsotg", "snps,dwc2"; >> + dr_mode = "host"; >> + pinctrl-0 = <&usbotg_fs_pins_b>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&pinctrl { >> + usb-host { >> + usbotg_pwren_h: usbotg-pwren-h { >> + pins { >> + pinmux = ; >> + bias-disable; >> + drive-push-pull; >> + }; >> + }; >> + }; >> +}; > > > Pinctrl muxing has to be defined/declared in stm32f429.dtsi > This is board specific logic and it vary from board to board, should it be defined here? > > >> diff --git a/arch/arm/boot/dts/stm32f429.dtsi >> b/arch/arm/boot/dts/stm32f429.dtsi >> index e4dae0e..bc07aa8 100644 >> --- a/arch/arm/boot/dts/stm32f429.dtsi >> +++ b/arch/arm/boot/dts/stm32f429.dtsi >> @@ -206,7 +206,7 @@ >> reg = <0x40007000 0x400>; >> }; >> >> - pin-controller { >> + pinctrl: pin-controller { >> #address-cells = <1>; >> #size-cells = <1>; >> compatible = "st,stm32f429-pinctrl"; >> @@ -316,6 +316,30 @@ >> }; >> }; >> >> + usbotg_fs_pins_a: usbotg_fs@0 { >> + pins { >> + pinmux = >> , >> + >> , >> + >> ; >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <2>; >> + }; >> + }; >> + >> + usbotg_fs_pins_b: usbotg_fs@1 { >> + pins { >> + pinmux = >> , >> + >> , >> + >> ; >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <2>; >> + }; >> + }; >> + >> + >> + >> usbotg_hs_pins_a: usbotg_hs@0 { >> pins { >> pinmux = >> , >> @@ -420,6 +444,15 @@ >> status = "disabled"; >> }; >> >> + usbotg_fs: usb@50000000 { >> + compatible = "st,stm32f4xx-fsotg", "snps,dwc2"; >> + reg = <0x50000000 0x40000>; >> + interrupts = <67>; >> + clocks = <&rcc 0 39>; >> + clock-names = "otg"; >> + status = "disabled"; >> + }; >> + >> rng: rng@50060800 { >> compatible = "st,stm32-rng"; >> reg = <0x50060800 0x400>; >> diff --git a/arch/arm/boot/dts/stm32f469-disco.dts >> b/arch/arm/boot/dts/stm32f469-disco.dts >> index 8877c00..8ae6763 100644 >> --- a/arch/arm/boot/dts/stm32f469-disco.dts >> +++ b/arch/arm/boot/dts/stm32f469-disco.dts >> @@ -68,6 +68,17 @@ >> soc { >> dma-ranges = <0xc0000000 0x0 0x10000000>; >> }; >> + >> + /* This turns on vbus for otg for host mode (dwc2) */ >> + vcc5v_otg: vcc5v-otg-regulator { >> + compatible = "regulator-fixed"; >> + enable-active-high; >> + gpio = <&gpiob 2 0>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&usbotg_pwren_h>; >> + regulator-name = "vcc5_host1"; >> + regulator-always-on; >> + }; >> }; >> >> &rcc { >> @@ -81,3 +92,22 @@ >> &usart3 { >> status = "okay"; >> }; >> + >> +&usbotg_fs { >> + dr_mode = "host"; >> + pinctrl-0 = <&usbotg_fs_pins_a>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&pinctrl { >> + usb-host { >> + usbotg_pwren_h: usbotg-pwren-h { >> + pins { >> + pinmux = ; >> + bias-disable; >> + drive-push-pull; >> + }; >> + }; >> + }; >> +}; > > Same. Note that if you have 2 configuration for one feature (like it is here > for "usbotg_pwren_h"), you could index it. Not that I'm adding a dedidacted > pinctroller for stm32f469. > Sorry, but I dont know what you mean by index here. The usbotg_pwren_h (VBUS ENABLE) is attached in different port/pins for each board. Br., > Br > Alex >> >> > > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bruno Herrera Subject: Re: [v2 2/3] ARM: dts: STM32 Add USB FS host mode support Date: Mon, 16 Jan 2017 08:26:21 -0200 Message-ID: References: <20170116020958.62767-1-bruherrera@gmail.com> <20170116020958.62767-2-bruherrera@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Alexandre Torgue Cc: Rob Herring , Mark Rutland , Maxime Coquelin , Russell King , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org Hi Alex, On Mon, Jan 16, 2017 at 6:57 AM, Alexandre Torgue wrote: > Hi Bruno, > > On 01/16/2017 03:09 AM, Bruno Herrera wrote: >> >> This patch adds the USB pins and nodes for USB HS/FS cores working at FS >> speed, >> using embedded PHY. >> >> Signed-off-by: Bruno Herrera > > > Sorry, but what is patch 1 & pacth 3 status ? My bad, I'll add the status of the patch series version 3. > > For this one, can split it in 3 patches (one patch for SOC and one for each > board) please. > No problem. > > >> --- >> arch/arm/boot/dts/stm32f429-disco.dts | 30 ++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/stm32f429.dtsi | 35 >> ++++++++++++++++++++++++++++++++++- >> arch/arm/boot/dts/stm32f469-disco.dts | 30 ++++++++++++++++++++++++++++++ >> 3 files changed, 94 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/stm32f429-disco.dts >> b/arch/arm/boot/dts/stm32f429-disco.dts >> index 7d0415e..374c5ed 100644 >> --- a/arch/arm/boot/dts/stm32f429-disco.dts >> +++ b/arch/arm/boot/dts/stm32f429-disco.dts >> @@ -88,6 +88,16 @@ >> gpios = <&gpioa 0 0>; >> }; >> }; >> + >> + /* This turns on vbus for otg for host mode (dwc2) */ >> + vcc5v_otg: vcc5v-otg-regulator { >> + compatible = "regulator-fixed"; >> + gpio = <&gpioc 4 0>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&usbotg_pwren_h>; >> + regulator-name = "vcc5_host1"; >> + regulator-always-on; >> + }; >> }; >> >> &clk_hse { >> @@ -99,3 +109,23 @@ >> pinctrl-names = "default"; >> status = "okay"; >> }; >> + >> +&usbotg_hs { >> + compatible = "st,stm32-fsotg", "snps,dwc2"; >> + dr_mode = "host"; >> + pinctrl-0 = <&usbotg_fs_pins_b>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&pinctrl { >> + usb-host { >> + usbotg_pwren_h: usbotg-pwren-h { >> + pins { >> + pinmux = ; >> + bias-disable; >> + drive-push-pull; >> + }; >> + }; >> + }; >> +}; > > > Pinctrl muxing has to be defined/declared in stm32f429.dtsi > This is board specific logic and it vary from board to board, should it be defined here? > > >> diff --git a/arch/arm/boot/dts/stm32f429.dtsi >> b/arch/arm/boot/dts/stm32f429.dtsi >> index e4dae0e..bc07aa8 100644 >> --- a/arch/arm/boot/dts/stm32f429.dtsi >> +++ b/arch/arm/boot/dts/stm32f429.dtsi >> @@ -206,7 +206,7 @@ >> reg = <0x40007000 0x400>; >> }; >> >> - pin-controller { >> + pinctrl: pin-controller { >> #address-cells = <1>; >> #size-cells = <1>; >> compatible = "st,stm32f429-pinctrl"; >> @@ -316,6 +316,30 @@ >> }; >> }; >> >> + usbotg_fs_pins_a: usbotg_fs@0 { >> + pins { >> + pinmux = >> , >> + >> , >> + >> ; >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <2>; >> + }; >> + }; >> + >> + usbotg_fs_pins_b: usbotg_fs@1 { >> + pins { >> + pinmux = >> , >> + >> , >> + >> ; >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <2>; >> + }; >> + }; >> + >> + >> + >> usbotg_hs_pins_a: usbotg_hs@0 { >> pins { >> pinmux = >> , >> @@ -420,6 +444,15 @@ >> status = "disabled"; >> }; >> >> + usbotg_fs: usb@50000000 { >> + compatible = "st,stm32f4xx-fsotg", "snps,dwc2"; >> + reg = <0x50000000 0x40000>; >> + interrupts = <67>; >> + clocks = <&rcc 0 39>; >> + clock-names = "otg"; >> + status = "disabled"; >> + }; >> + >> rng: rng@50060800 { >> compatible = "st,stm32-rng"; >> reg = <0x50060800 0x400>; >> diff --git a/arch/arm/boot/dts/stm32f469-disco.dts >> b/arch/arm/boot/dts/stm32f469-disco.dts >> index 8877c00..8ae6763 100644 >> --- a/arch/arm/boot/dts/stm32f469-disco.dts >> +++ b/arch/arm/boot/dts/stm32f469-disco.dts >> @@ -68,6 +68,17 @@ >> soc { >> dma-ranges = <0xc0000000 0x0 0x10000000>; >> }; >> + >> + /* This turns on vbus for otg for host mode (dwc2) */ >> + vcc5v_otg: vcc5v-otg-regulator { >> + compatible = "regulator-fixed"; >> + enable-active-high; >> + gpio = <&gpiob 2 0>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&usbotg_pwren_h>; >> + regulator-name = "vcc5_host1"; >> + regulator-always-on; >> + }; >> }; >> >> &rcc { >> @@ -81,3 +92,22 @@ >> &usart3 { >> status = "okay"; >> }; >> + >> +&usbotg_fs { >> + dr_mode = "host"; >> + pinctrl-0 = <&usbotg_fs_pins_a>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&pinctrl { >> + usb-host { >> + usbotg_pwren_h: usbotg-pwren-h { >> + pins { >> + pinmux = ; >> + bias-disable; >> + drive-push-pull; >> + }; >> + }; >> + }; >> +}; > > Same. Note that if you have 2 configuration for one feature (like it is here > for "usbotg_pwren_h"), you could index it. Not that I'm adding a dedidacted > pinctroller for stm32f469. > Sorry, but I dont know what you mean by index here. The usbotg_pwren_h (VBUS ENABLE) is attached in different port/pins for each board. Br., > Br > Alex >> >> > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: bruherrera@gmail.com (Bruno Herrera) Date: Mon, 16 Jan 2017 08:26:21 -0200 Subject: [v2 2/3] ARM: dts: STM32 Add USB FS host mode support In-Reply-To: References: <20170116020958.62767-1-bruherrera@gmail.com> <20170116020958.62767-2-bruherrera@gmail.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Alex, On Mon, Jan 16, 2017 at 6:57 AM, Alexandre Torgue wrote: > Hi Bruno, > > On 01/16/2017 03:09 AM, Bruno Herrera wrote: >> >> This patch adds the USB pins and nodes for USB HS/FS cores working at FS >> speed, >> using embedded PHY. >> >> Signed-off-by: Bruno Herrera > > > Sorry, but what is patch 1 & pacth 3 status ? My bad, I'll add the status of the patch series version 3. > > For this one, can split it in 3 patches (one patch for SOC and one for each > board) please. > No problem. > > >> --- >> arch/arm/boot/dts/stm32f429-disco.dts | 30 ++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/stm32f429.dtsi | 35 >> ++++++++++++++++++++++++++++++++++- >> arch/arm/boot/dts/stm32f469-disco.dts | 30 ++++++++++++++++++++++++++++++ >> 3 files changed, 94 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/stm32f429-disco.dts >> b/arch/arm/boot/dts/stm32f429-disco.dts >> index 7d0415e..374c5ed 100644 >> --- a/arch/arm/boot/dts/stm32f429-disco.dts >> +++ b/arch/arm/boot/dts/stm32f429-disco.dts >> @@ -88,6 +88,16 @@ >> gpios = <&gpioa 0 0>; >> }; >> }; >> + >> + /* This turns on vbus for otg for host mode (dwc2) */ >> + vcc5v_otg: vcc5v-otg-regulator { >> + compatible = "regulator-fixed"; >> + gpio = <&gpioc 4 0>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&usbotg_pwren_h>; >> + regulator-name = "vcc5_host1"; >> + regulator-always-on; >> + }; >> }; >> >> &clk_hse { >> @@ -99,3 +109,23 @@ >> pinctrl-names = "default"; >> status = "okay"; >> }; >> + >> +&usbotg_hs { >> + compatible = "st,stm32-fsotg", "snps,dwc2"; >> + dr_mode = "host"; >> + pinctrl-0 = <&usbotg_fs_pins_b>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&pinctrl { >> + usb-host { >> + usbotg_pwren_h: usbotg-pwren-h { >> + pins { >> + pinmux = ; >> + bias-disable; >> + drive-push-pull; >> + }; >> + }; >> + }; >> +}; > > > Pinctrl muxing has to be defined/declared in stm32f429.dtsi > This is board specific logic and it vary from board to board, should it be defined here? > > >> diff --git a/arch/arm/boot/dts/stm32f429.dtsi >> b/arch/arm/boot/dts/stm32f429.dtsi >> index e4dae0e..bc07aa8 100644 >> --- a/arch/arm/boot/dts/stm32f429.dtsi >> +++ b/arch/arm/boot/dts/stm32f429.dtsi >> @@ -206,7 +206,7 @@ >> reg = <0x40007000 0x400>; >> }; >> >> - pin-controller { >> + pinctrl: pin-controller { >> #address-cells = <1>; >> #size-cells = <1>; >> compatible = "st,stm32f429-pinctrl"; >> @@ -316,6 +316,30 @@ >> }; >> }; >> >> + usbotg_fs_pins_a: usbotg_fs at 0 { >> + pins { >> + pinmux = >> , >> + >> , >> + >> ; >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <2>; >> + }; >> + }; >> + >> + usbotg_fs_pins_b: usbotg_fs at 1 { >> + pins { >> + pinmux = >> , >> + >> , >> + >> ; >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <2>; >> + }; >> + }; >> + >> + >> + >> usbotg_hs_pins_a: usbotg_hs at 0 { >> pins { >> pinmux = >> , >> @@ -420,6 +444,15 @@ >> status = "disabled"; >> }; >> >> + usbotg_fs: usb at 50000000 { >> + compatible = "st,stm32f4xx-fsotg", "snps,dwc2"; >> + reg = <0x50000000 0x40000>; >> + interrupts = <67>; >> + clocks = <&rcc 0 39>; >> + clock-names = "otg"; >> + status = "disabled"; >> + }; >> + >> rng: rng at 50060800 { >> compatible = "st,stm32-rng"; >> reg = <0x50060800 0x400>; >> diff --git a/arch/arm/boot/dts/stm32f469-disco.dts >> b/arch/arm/boot/dts/stm32f469-disco.dts >> index 8877c00..8ae6763 100644 >> --- a/arch/arm/boot/dts/stm32f469-disco.dts >> +++ b/arch/arm/boot/dts/stm32f469-disco.dts >> @@ -68,6 +68,17 @@ >> soc { >> dma-ranges = <0xc0000000 0x0 0x10000000>; >> }; >> + >> + /* This turns on vbus for otg for host mode (dwc2) */ >> + vcc5v_otg: vcc5v-otg-regulator { >> + compatible = "regulator-fixed"; >> + enable-active-high; >> + gpio = <&gpiob 2 0>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&usbotg_pwren_h>; >> + regulator-name = "vcc5_host1"; >> + regulator-always-on; >> + }; >> }; >> >> &rcc { >> @@ -81,3 +92,22 @@ >> &usart3 { >> status = "okay"; >> }; >> + >> +&usbotg_fs { >> + dr_mode = "host"; >> + pinctrl-0 = <&usbotg_fs_pins_a>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&pinctrl { >> + usb-host { >> + usbotg_pwren_h: usbotg-pwren-h { >> + pins { >> + pinmux = ; >> + bias-disable; >> + drive-push-pull; >> + }; >> + }; >> + }; >> +}; > > Same. Note that if you have 2 configuration for one feature (like it is here > for "usbotg_pwren_h"), you could index it. Not that I'm adding a dedidacted > pinctroller for stm32f469. > Sorry, but I dont know what you mean by index here. The usbotg_pwren_h (VBUS ENABLE) is attached in different port/pins for each board. Br., > Br > Alex >> >> > >