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Tue, 11 May 2021 14:56:59 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1592CC061574; Tue, 11 May 2021 11:55:53 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id h4so21144837wrt.12; Tue, 11 May 2021 11:55:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to; bh=Zs2w1HOP/qUoGoZPFD129RRQnAW6mhOM8nlH2tVXXm0=; b=U9VKy9xefUTo0JPaWnmt30KRBSx0FFWjTyU5ynccfCcKLBvhVjyiGw1DKfuVNALdpO ylLstzc11KlvCRQC28txPn0l2ENDMcUk84uNYCVYz13fFW57tz0ro3bpcm4MavuqPhdQ 67khLKO4CWEEbLV8Mq1MlUx4VIzMwAgdFx3xgPVJn3CAGq7nZUb1J8WeZxoGiQRAtcPd 557lg5tlghwF7DDzCYbKR+WAJlbgMUWEK5hn93p2AzO9qSsYMAO3vH25Tnwh/5x+pW3P c0rRBNDJn6xtBfJsuSbSCGaaylw4Adx8CvLc4cccqnl+YgTpJRFHpFDIMQ4247mZsMO0 4+PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to; bh=Zs2w1HOP/qUoGoZPFD129RRQnAW6mhOM8nlH2tVXXm0=; b=NRgxMnXIDhe6pcPoc2vG0Q8pS3eNbKuOIQ2+7yvc895vOe0rlOYX0V5YcrTGfbW0zi stB1gfx1ulXUqU008Kg+TQcEK0gFNzQJvVVvVBHcrCjtXQqrSW8/uO+esXFV5TWjoIi1 AudiYv59tOGhsviinm3Xa/1uyr6g8D6ZqrrU1CqP6iAr/O21DmFiV9GzcElXtZsMm4Ft S2OsQ2XuNYfXztlo0dHjXZKO6ZlPE0bCmaLSSF9pJxRbld3CTHb/JkduLMRIafTnnpLi 11SpQIFoRXeMWFlnTXr/bUA4FFtbYQpmrtjMN/Lfzr3JDsE9Sr7uF6yNqcMPE/oj9AsV VTlQ== X-Gm-Message-State: AOAM533LUpKAEwYqoy4SLG2gN+qjv4AVu7LbSB1GHomD75YPDs1xUUF4 jC+c0nxaJtS3UuBUe54sYC9UXyO7xnrrH38wZl4= X-Google-Smtp-Source: ABdhPJyakjIL56t5dhmPl//cGax6lJy/o0FLjV2gh72JwcB7alCTdlfruKiiPv6bYQhv49TrcFtQmAilkW7Onv68xVM= X-Received: by 2002:adf:f74d:: with SMTP id z13mr39583073wrp.147.1620759351799; Tue, 11 May 2021 11:55:51 -0700 (PDT) MIME-Version: 1.0 References: <20210225175135.91922-1-jcrouse@codeaurora.org> <20210225175135.91922-2-jcrouse@codeaurora.org> <2d3c7595-0186-7231-96dc-ae52414480ee@arm.com> <20210302155423.3e7xlal3phcz26bh@cosmicpenguin.net> In-Reply-To: <20210302155423.3e7xlal3phcz26bh@cosmicpenguin.net> From: Rob Clark Date: Tue, 11 May 2021 11:59:33 -0700 Message-ID: Subject: Re: [PATCH v3 1/3] iommu/arm-smmu: Add support for driver IOMMU fault handlers To: Robin Murphy , Jordan Crouse , linux-arm-msm , "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , Will Deacon , Linux Kernel Mailing List , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue, Mar 2, 2021 at 7:54 AM Jordan Crouse wrote: > > On Tue, Mar 02, 2021 at 12:17:24PM +0000, Robin Murphy wrote: > > On 2021-02-25 17:51, Jordan Crouse wrote: > > > Call report_iommu_fault() to allow upper-level drivers to register their > > > own fault handlers. > > > > > > Signed-off-by: Jordan Crouse > > > --- > > > > > > drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +++++++-- > > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > index d8c6bfde6a61..0f3a9b5f3284 100644 > > > --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > @@ -408,6 +408,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > > > struct arm_smmu_device *smmu = smmu_domain->smmu; > > > int idx = smmu_domain->cfg.cbndx; > > > + int ret; > > > fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR); > > > if (!(fsr & ARM_SMMU_FSR_FAULT)) > > > @@ -417,8 +418,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > iova = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_FAR); > > > cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(idx)); > > > - dev_err_ratelimited(smmu->dev, > > > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n", > > > + ret = report_iommu_fault(domain, dev, iova, > > > > Beware that "dev" here is not a struct device, so this isn't right. I'm not > > entirely sure what we *should* be passing here, since we can't easily > > attribute a context fault to a specific client device, and passing the IOMMU > > device seems a bit dubious too, so maybe just NULL? > > Agreed. The GPU doesn't use it and I doubt anything else would either since the > SMMU device is opaque to the leaf driver. Looks like other iommu drivers use a fun mix of attached device (for ones that can make assumptions about one device per domain) and the iommu dev ptr.. probably NULL is the right answer.. BR, -R > Jordan > > > Robin. > > > > > + fsynr & ARM_SMMU_FSYNR0_WNR ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ); > > > + > > > + if (ret == -ENOSYS) > > > + dev_err_ratelimited(smmu->dev, > > > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n", > > > fsr, iova, fsynr, cbfrsynra, idx); > > > arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); > > > > > _______________________________________________ > > iommu mailing list > > iommu@lists.linux-foundation.org > > https://lists.linuxfoundation.org/mailman/listinfo/iommu > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.5 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FA2DC43461 for ; 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Tue, 11 May 2021 11:55:51 -0700 (PDT) MIME-Version: 1.0 References: <20210225175135.91922-1-jcrouse@codeaurora.org> <20210225175135.91922-2-jcrouse@codeaurora.org> <2d3c7595-0186-7231-96dc-ae52414480ee@arm.com> <20210302155423.3e7xlal3phcz26bh@cosmicpenguin.net> In-Reply-To: <20210302155423.3e7xlal3phcz26bh@cosmicpenguin.net> From: Rob Clark Date: Tue, 11 May 2021 11:59:33 -0700 Message-ID: Subject: Re: [PATCH v3 1/3] iommu/arm-smmu: Add support for driver IOMMU fault handlers To: Robin Murphy , Jordan Crouse , linux-arm-msm , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , Will Deacon , Linux Kernel Mailing List , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Tue, Mar 2, 2021 at 7:54 AM Jordan Crouse wrote: > > On Tue, Mar 02, 2021 at 12:17:24PM +0000, Robin Murphy wrote: > > On 2021-02-25 17:51, Jordan Crouse wrote: > > > Call report_iommu_fault() to allow upper-level drivers to register their > > > own fault handlers. > > > > > > Signed-off-by: Jordan Crouse > > > --- > > > > > > drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +++++++-- > > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > index d8c6bfde6a61..0f3a9b5f3284 100644 > > > --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > @@ -408,6 +408,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > > > struct arm_smmu_device *smmu = smmu_domain->smmu; > > > int idx = smmu_domain->cfg.cbndx; > > > + int ret; > > > fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR); > > > if (!(fsr & ARM_SMMU_FSR_FAULT)) > > > @@ -417,8 +418,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > iova = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_FAR); > > > cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(idx)); > > > - dev_err_ratelimited(smmu->dev, > > > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n", > > > + ret = report_iommu_fault(domain, dev, iova, > > > > Beware that "dev" here is not a struct device, so this isn't right. I'm not > > entirely sure what we *should* be passing here, since we can't easily > > attribute a context fault to a specific client device, and passing the IOMMU > > device seems a bit dubious too, so maybe just NULL? > > Agreed. The GPU doesn't use it and I doubt anything else would either since the > SMMU device is opaque to the leaf driver. Looks like other iommu drivers use a fun mix of attached device (for ones that can make assumptions about one device per domain) and the iommu dev ptr.. probably NULL is the right answer.. BR, -R > Jordan > > > Robin. > > > > > + fsynr & ARM_SMMU_FSYNR0_WNR ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ); > > > + > > > + if (ret == -ENOSYS) > > > + dev_err_ratelimited(smmu->dev, > > > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n", > > > fsr, iova, fsynr, cbfrsynra, idx); > > > arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); > > > > > _______________________________________________ > > iommu mailing list > > iommu@lists.linux-foundation.org > > https://lists.linuxfoundation.org/mailman/listinfo/iommu > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1076CC43460 for ; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to; bh=Zs2w1HOP/qUoGoZPFD129RRQnAW6mhOM8nlH2tVXXm0=; b=UqlhJLphb6f1ompuReq33qF/llMWRat43zXHGHYEe7/eR9C7RWwUzcZXp+YVhdRfCB Mp7mMSxQIfXX8FjnZfZ+IubIDhpmj8DIeLfYgSeTPdwHjSMpCMoJzJhXGDFMlrKF5/UV Pjfo5hgotMu2qQGapUJV6MluIvMzLqFPuyyJhFIyn7mJq99DqE6nDUTFbyEIUCh+PtSt loB++KI+AIJyA9jWjv92sL61IsFUrMgmOzuc8mBiKIIrtmgKFJHBDU5nBdeUdB9yqaRg NoSVnS/NSWvnaMA0SET8rIRjPT5JB4c/deQBry1d01pj6MSb+k2AEdmqJi5qQtwREMbM leWQ== X-Gm-Message-State: AOAM530dGBph1auMcTmqvgLWsXLKAZY8J8PFp4qfqE1o8O3SCSg8mzy/ sHVHVgphJoTieSRPFLJH4gvPJftImHOFZ1wkajw= X-Google-Smtp-Source: ABdhPJyakjIL56t5dhmPl//cGax6lJy/o0FLjV2gh72JwcB7alCTdlfruKiiPv6bYQhv49TrcFtQmAilkW7Onv68xVM= X-Received: by 2002:adf:f74d:: with SMTP id z13mr39583073wrp.147.1620759351799; Tue, 11 May 2021 11:55:51 -0700 (PDT) MIME-Version: 1.0 References: <20210225175135.91922-1-jcrouse@codeaurora.org> <20210225175135.91922-2-jcrouse@codeaurora.org> <2d3c7595-0186-7231-96dc-ae52414480ee@arm.com> <20210302155423.3e7xlal3phcz26bh@cosmicpenguin.net> In-Reply-To: <20210302155423.3e7xlal3phcz26bh@cosmicpenguin.net> From: Rob Clark Date: Tue, 11 May 2021 11:59:33 -0700 Message-ID: Subject: Re: [PATCH v3 1/3] iommu/arm-smmu: Add support for driver IOMMU fault handlers To: Robin Murphy , Jordan Crouse , linux-arm-msm , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , Will Deacon , Linux Kernel Mailing List , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210511_115554_089371_D4196CB1 X-CRM114-Status: GOOD ( 25.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Mar 2, 2021 at 7:54 AM Jordan Crouse wrote: > > On Tue, Mar 02, 2021 at 12:17:24PM +0000, Robin Murphy wrote: > > On 2021-02-25 17:51, Jordan Crouse wrote: > > > Call report_iommu_fault() to allow upper-level drivers to register their > > > own fault handlers. > > > > > > Signed-off-by: Jordan Crouse > > > --- > > > > > > drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +++++++-- > > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > index d8c6bfde6a61..0f3a9b5f3284 100644 > > > --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c > > > @@ -408,6 +408,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > > > struct arm_smmu_device *smmu = smmu_domain->smmu; > > > int idx = smmu_domain->cfg.cbndx; > > > + int ret; > > > fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR); > > > if (!(fsr & ARM_SMMU_FSR_FAULT)) > > > @@ -417,8 +418,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > iova = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_FAR); > > > cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(idx)); > > > - dev_err_ratelimited(smmu->dev, > > > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n", > > > + ret = report_iommu_fault(domain, dev, iova, > > > > Beware that "dev" here is not a struct device, so this isn't right. I'm not > > entirely sure what we *should* be passing here, since we can't easily > > attribute a context fault to a specific client device, and passing the IOMMU > > device seems a bit dubious too, so maybe just NULL? > > Agreed. The GPU doesn't use it and I doubt anything else would either since the > SMMU device is opaque to the leaf driver. Looks like other iommu drivers use a fun mix of attached device (for ones that can make assumptions about one device per domain) and the iommu dev ptr.. probably NULL is the right answer.. BR, -R > Jordan > > > Robin. > > > > > + fsynr & ARM_SMMU_FSYNR0_WNR ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ); > > > + > > > + if (ret == -ENOSYS) > > > + dev_err_ratelimited(smmu->dev, > > > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n", > > > fsr, iova, fsynr, cbfrsynra, idx); > > > arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); > > > > > _______________________________________________ > > iommu mailing list > > iommu@lists.linux-foundation.org > > https://lists.linuxfoundation.org/mailman/listinfo/iommu > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel