From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 349B0C433DF for ; Tue, 20 Oct 2020 07:25:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C2828223BF for ; Tue, 20 Oct 2020 07:25:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="UU9fv3TX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405057AbgJTHZH (ORCPT ); Tue, 20 Oct 2020 03:25:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2405036AbgJTHZH (ORCPT ); Tue, 20 Oct 2020 03:25:07 -0400 Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB811C061755 for ; Tue, 20 Oct 2020 00:25:06 -0700 (PDT) Received: by mail-lj1-x241.google.com with SMTP id c21so886535ljn.13 for ; Tue, 20 Oct 2020 00:25:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=uFAymQB2VOJ4KqiBW6CIIX7WVz/95SQLzKrOC+AcK7M=; b=UU9fv3TX1Idl0ZF5nRqwPtZqh2KrQur59xb/KO68AV619Hi683xOkZPqV0DprRVr9C pcLP4tpdvcQwwnmg6vA1E4KUlU7e4Rlb8/cTOIOxTCgwcnYUlnUsmM50q0X22F+09m3g lYA0iwCXt64o8BKSbCRA+tSSFePqB+k+zXChXsNCo51epWTnXUwj3swFHL/Po7/+2j6I 3p0fM71PSmHp7FSRXep/2DPiMfanrUXBLnoCebm4iyn2uwonBI8CLRSDhezsFpH11bSG o57k44SMRg+fbmJGatt68vRgwCRnnlAAuViJSOZbK+3tgeDB8pH1EeMdCH4jETlJbwTm /+Iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=uFAymQB2VOJ4KqiBW6CIIX7WVz/95SQLzKrOC+AcK7M=; b=mGfhKnhVqYAB5MoY1pT/q9wpMDdbk4mmhHVIUaqjm38J8+0XZeDKdJ02Cops/PTk1G 81pQbKO6JdUsbL5W3ETvH1IDdpG4aZyzkPQcuf5CGxi4Gf0gqv61SbzYM4JUm6rg/aR4 EJCfrfuesZdqEgAgkjURLZxwQHuk1dr9oa2Q/ysjIdIi+G1HFTz2NwcHpTRaRkJ+RlBk bGja0olFt5xEMXt/g1J0CVoTNVTa6uulQ5ZjfYxnav3i8ysHKXplUNPnbGDnSI67N6nA wWPUEWOGc+yx/2Z4eu6FEzxtvBHVfVmwqcEgKf1/AadmbVH6XH+vChsnIOoJi708TCSh 4oTg== X-Gm-Message-State: AOAM5314Rjk0oh+gxgg1mypYb2a3eNjLoTQzEO6lELWV8JQa5ImcmjNm xE6P0yYYt4K8QkWjezNd4bvDR+xfwDQT/sdsnqqToQ== X-Google-Smtp-Source: ABdhPJzICliDiG4TEYZv/LnXNOTyuv/fLxshlpvP4WJfDe5kyAJCZ1j6frOcxjozui1tsGRvMnuCxXV16CPYd6o/To8= X-Received: by 2002:a2e:9a9a:: with SMTP id p26mr537984lji.4.1603178705428; Tue, 20 Oct 2020 00:25:05 -0700 (PDT) MIME-Version: 1.0 References: <1602673931-28782-1-git-send-email-sumit.garg@linaro.org> <1602673931-28782-3-git-send-email-sumit.garg@linaro.org> <294754db12f4cd8a8ec9329a44e1cf02@kernel.org> In-Reply-To: <294754db12f4cd8a8ec9329a44e1cf02@kernel.org> From: Sumit Garg Date: Tue, 20 Oct 2020 12:54:53 +0530 Message-ID: Subject: Re: [PATCH v5 2/5] irqchip/gic-v3: Enable support for SGIs to act as NMIs To: Marc Zyngier Cc: Catalin Marinas , Will Deacon , linux-arm-kernel , Thomas Gleixner , Jason Cooper , Mark Rutland , julien.thierry.kdev@gmail.com, Douglas Anderson , Daniel Thompson , Jason Wessel , Masayoshi Mizuma , ito-yuichi@fujitsu.com, kgdb-bugreport@lists.sourceforge.net, Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 19 Oct 2020 at 17:37, Marc Zyngier wrote: > > On 2020-10-14 12:12, Sumit Garg wrote: > > Add support to handle SGIs as regular NMIs. As SGIs or IPIs defaults to > > a > > There is nothing "regular" about NMIs. Okay, will do s/regular/pseudo/. > Drop "or IPIs". > s/defaults/default/ > Ack. > > special flow handler: handle_percpu_devid_fasteoi_ipi(), so skip NMI > > handler update in case of SGIs. > > > > Also, enable NMI support prior to gic_smp_init() as allocation of SGIs > > as IRQs/NMIs happen as part of this routine. > > > > Signed-off-by: Sumit Garg > > --- > > drivers/irqchip/irq-gic-v3.c | 13 +++++++++++-- > > 1 file changed, 11 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/irqchip/irq-gic-v3.c > > b/drivers/irqchip/irq-gic-v3.c > > index 16fecc0..5efc865 100644 > > --- a/drivers/irqchip/irq-gic-v3.c > > +++ b/drivers/irqchip/irq-gic-v3.c > > @@ -477,6 +477,11 @@ static int gic_irq_nmi_setup(struct irq_data *d) > > if (WARN_ON(gic_irq(d) >= 8192)) > > return -EINVAL; > > > > + if (get_intid_range(d) == SGI_RANGE) { > > + gic_irq_set_prio(d, GICD_INT_NMI_PRI); > > + return 0; > > + } > > + > > Please follow the existing control flow, or rework it to be organised by > range. Okay. > > > /* desc lock should already be held */ > > if (gic_irq_in_rdist(d)) { > > u32 idx = gic_get_ppi_index(d); > > @@ -514,6 +519,11 @@ static void gic_irq_nmi_teardown(struct irq_data > > *d) > > if (WARN_ON(gic_irq(d) >= 8192)) > > return; > > > > + if (get_intid_range(d) == SGI_RANGE) { > > + gic_irq_set_prio(d, GICD_INT_DEF_PRI); > > + return; > > + } > > Same here. Okay. -Sumit > > > + > > /* desc lock should already be held */ > > if (gic_irq_in_rdist(d)) { > > u32 idx = gic_get_ppi_index(d); > > @@ -1708,6 +1718,7 @@ static int __init gic_init_bases(void __iomem > > *dist_base, > > > > gic_dist_init(); > > gic_cpu_init(); > > + gic_enable_nmi_support(); > > gic_smp_init(); > > gic_cpu_pm_init(); > > > > @@ -1719,8 +1730,6 @@ static int __init gic_init_bases(void __iomem > > *dist_base, > > gicv2m_init(handle, gic_data.domain); > > } > > > > - gic_enable_nmi_support(); > > - > > return 0; > > > > out_free: > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny... 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=uFAymQB2VOJ4KqiBW6CIIX7WVz/95SQLzKrOC+AcK7M=; b=XsfrK1xq2cykuv5GIyEvzc9JyTaZmxwaqjNBZuZM07vipVJO5cZSL5EMuKKnqyUOnT D/qlL3gTwf8l5DdmuRJDFvcHRp/HyMRyGhazYfztRKSOerH0OeU2lBnn3up3lDBC5uMp eAfB5bwpoql3vQ8HlqN5qflfTmdzVzndFL2RXmDGnMajpWbeICCCtZ1przBUGt03ZC9Y 8zq8R1i0n9gnSdWW5mSiCwSlsct8EtSHKXxHd0LRJC5nOZvLYRPoSWinjMXjfXo9qTrY VUzmYr2SROwD/sm5T7crVG/8/XVbjCXbyiV930uQmUvEf+1MgAewTmC4mF68VCGg3Ae7 /jpw== X-Gm-Message-State: AOAM532lcObtfTJGy1W2BrCz32GfWxRMt2SVGrxo0Cf0INaXjdCaK6ff e+bkF4cHgo6GAtBm9u+I4skWu2HAFo3Bv8GPXyriyQ== X-Google-Smtp-Source: ABdhPJzICliDiG4TEYZv/LnXNOTyuv/fLxshlpvP4WJfDe5kyAJCZ1j6frOcxjozui1tsGRvMnuCxXV16CPYd6o/To8= X-Received: by 2002:a2e:9a9a:: with SMTP id p26mr537984lji.4.1603178705428; Tue, 20 Oct 2020 00:25:05 -0700 (PDT) MIME-Version: 1.0 References: <1602673931-28782-1-git-send-email-sumit.garg@linaro.org> <1602673931-28782-3-git-send-email-sumit.garg@linaro.org> <294754db12f4cd8a8ec9329a44e1cf02@kernel.org> In-Reply-To: <294754db12f4cd8a8ec9329a44e1cf02@kernel.org> From: Sumit Garg Date: Tue, 20 Oct 2020 12:54:53 +0530 Message-ID: Subject: Re: [PATCH v5 2/5] irqchip/gic-v3: Enable support for SGIs to act as NMIs To: Marc Zyngier X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201020_032507_061155_0CFDBB3F X-CRM114-Status: GOOD ( 23.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Daniel Thompson , Jason Cooper , Catalin Marinas , ito-yuichi@fujitsu.com, Douglas Anderson , Linux Kernel Mailing List , julien.thierry.kdev@gmail.com, Jason Wessel , kgdb-bugreport@lists.sourceforge.net, Thomas Gleixner , Masayoshi Mizuma , Will Deacon , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 19 Oct 2020 at 17:37, Marc Zyngier wrote: > > On 2020-10-14 12:12, Sumit Garg wrote: > > Add support to handle SGIs as regular NMIs. As SGIs or IPIs defaults to > > a > > There is nothing "regular" about NMIs. Okay, will do s/regular/pseudo/. > Drop "or IPIs". > s/defaults/default/ > Ack. > > special flow handler: handle_percpu_devid_fasteoi_ipi(), so skip NMI > > handler update in case of SGIs. > > > > Also, enable NMI support prior to gic_smp_init() as allocation of SGIs > > as IRQs/NMIs happen as part of this routine. > > > > Signed-off-by: Sumit Garg > > --- > > drivers/irqchip/irq-gic-v3.c | 13 +++++++++++-- > > 1 file changed, 11 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/irqchip/irq-gic-v3.c > > b/drivers/irqchip/irq-gic-v3.c > > index 16fecc0..5efc865 100644 > > --- a/drivers/irqchip/irq-gic-v3.c > > +++ b/drivers/irqchip/irq-gic-v3.c > > @@ -477,6 +477,11 @@ static int gic_irq_nmi_setup(struct irq_data *d) > > if (WARN_ON(gic_irq(d) >= 8192)) > > return -EINVAL; > > > > + if (get_intid_range(d) == SGI_RANGE) { > > + gic_irq_set_prio(d, GICD_INT_NMI_PRI); > > + return 0; > > + } > > + > > Please follow the existing control flow, or rework it to be organised by > range. Okay. > > > /* desc lock should already be held */ > > if (gic_irq_in_rdist(d)) { > > u32 idx = gic_get_ppi_index(d); > > @@ -514,6 +519,11 @@ static void gic_irq_nmi_teardown(struct irq_data > > *d) > > if (WARN_ON(gic_irq(d) >= 8192)) > > return; > > > > + if (get_intid_range(d) == SGI_RANGE) { > > + gic_irq_set_prio(d, GICD_INT_DEF_PRI); > > + return; > > + } > > Same here. Okay. -Sumit > > > + > > /* desc lock should already be held */ > > if (gic_irq_in_rdist(d)) { > > u32 idx = gic_get_ppi_index(d); > > @@ -1708,6 +1718,7 @@ static int __init gic_init_bases(void __iomem > > *dist_base, > > > > gic_dist_init(); > > gic_cpu_init(); > > + gic_enable_nmi_support(); > > gic_smp_init(); > > gic_cpu_pm_init(); > > > > @@ -1719,8 +1730,6 @@ static int __init gic_init_bases(void __iomem > > *dist_base, > > gicv2m_init(handle, gic_data.domain); > > } > > > > - gic_enable_nmi_support(); > > - > > return 0; > > > > out_free: > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel